İşleme Grafiği

236 İşleme

Yazar SHA1 Mesaj Tarih
Sean Keely bc0bd00746 Fix queue interception in tools.
1. Correct amd::AqlQueue::ExecutePM4 to support interception.
2. Minor fixes to AqlPacket and SoftCP.
3. Minimal change to disable interception of runtime internal queues.

Change-Id: I103fece2ebf9a188d27f01e61221c737405d7253
2017-07-12 16:39:43 -04:00
Sean Keely 29b5b5c029 Correct handling of slow clocks under linux.
Change-Id: I9a1b08d5457caa6739220603bbd37b00febc64d7
2017-07-12 12:49:49 -04:00
Sean Keely 3e50adc7ce Properly order signal copy agent tagging with copy operation.
Change-Id: Ic428c958551279fbea1b2449afba930b82804ede
2017-07-11 13:10:00 -04:00
Sean Keely c9f0427cb0 Decrement hsa_init ref counter when init fails.
Change-Id: If9376344d4b559e601932d070731132c8450104e
2017-07-07 21:21:03 -05:00
Evgeny 4174f07fd1 hsa-runtime integration
Change-Id: I48968966ffe164218ebff88d0e3a1268e96bf1dd
2017-07-05 10:55:30 -04:00
Evgeny c533229bc1 Block list extending
Change-Id: Id17efde25fce287296e80f2b37c77b15aa59b561
2017-06-23 16:37:02 -04:00
Evgeny 8618bf7e2c minor fixes, debug output, comments, using env vars, dead code
Change-Id: I08ad73b561709c1818d78a9191c96d6ad141a609
2017-06-22 18:04:26 -04:00
Ramesh Errabolu 08e0bca567 Support Perf Cntrs (PMC) and Thread Trace (SQTT) over AQL queues
Change-Id: I716b722895d90b46914c31377e791ad602acecc1
2017-06-15 12:58:31 -04:00
Kenny Ho 5b4df54b10 Revert "Implement memory fault analysis through context save area"
This reverts commit 75c9506f9d.

Change-Id: Ibf11b764b383b9be291f3009a30550e1a1e2d115
2017-06-14 14:21:53 -04:00
Evgeny 35b376e2ee GFX8 API
Change-Id: I9d0c430e4199f043226c8897f3320a7973cbdeda
2017-06-14 12:24:28 -04:00
Jay Cornwall 75c9506f9d Implement memory fault analysis through context save area
When a fatal memory fault occurs the scheduler context-saves all queues
in the process and notifies the runtime through the memory event. The
saved state contains all GPR/LDS data at the moment of the fault.

Retrieve this state and present it to the user if HSA_DEBUG_FAULT is set
to "analyze" and the wavefront caused the fault. If amdgcn-capable objdump
is in the PATH invoke this to disassemble code around the PC.

Queue lifetime is now managed by the runtime to allow querying the
context save state for all active queues.

Change-Id: I6fee662fad1c4f9aa125bf5c53d7d0ea1ab32f95
2017-06-13 23:12:28 -04:00
Evgeny 25035b8d09 Adding HSA extension AMD AQL profile library, see Readme.txt
Change-Id: Icbc1e0fb0185642eabbab411a2138ea030d22be8
2017-06-13 16:18:06 -04:00
Evgeny da831502ab Adding GFXIP and kernel code object
Change-Id: Ieb2dfea8d9e909efac583f541730d77b7d0c9679
2017-06-13 14:58:29 -05:00
Konstantin Zhuravlyov d98e99949a Update hsa_isa_t entries
- Add 7.0.2 (consumer hawaii)
  - Add 9.0.1 (gfx900 with xnack)
  - Add 9.0.2
  - Add 9.0.3

Change-Id: I6a07797027c4eaf47038837c5ae51e05b2aba0e4
2017-06-12 14:34:11 -04:00
hthangir a0957bc679 The fallback path covers not just ARM64, need this for Power as well.
Change-Id: I7bbf76f77bd3ac47a0a0987c1e880e23834588e2
2017-06-07 14:45:29 -05:00
Qingchuan Shi cd35fb280a Patch target name in code object for future-proof
Change-Id: I6f12b5e5791bd1745ec3ab76d382fad50282e733
2017-06-05 19:08:27 -04:00
Chris Freehill 801bf4398c Added async. mem. copy sample.
Change-Id: I4fbb009181056c5f293d17720214b70588d44bdf
2017-06-05 17:20:51 -04:00
Jay Cornwall 5db53ceda1 Enable SDMA on gfx9, disable on gfx8
gfx9 has passed qualification. gfx8 stability is under investigation.

Change-Id: Ia72211d47756399ecdfceafeb67c2ab34ebda834
2017-06-02 15:14:14 -05:00
Chris Freehill 1170244ae2 Added IPC sample
Change-Id: I980c430d6e091eb1abbc0df89ca74c96348bcd37
2017-05-31 09:47:16 -04:00
Chris Freehill adf201d6a5 Added rocrinfo sample
Corrected a few formatting issues with binary_search.cpp

Change-Id: I9dcc0a231c6b8c424b44f4ab17032ff51b81a1ba
2017-05-31 09:46:06 -04:00
Sean Keely c3e2a88ade Add preferred agent info to pointer info struct.
Lookup blit agent via pointer info in memory_fill.

Change-Id: I02feaf68bb9726858e8cb0ede6bc5f2b3707f5af
2017-05-31 05:16:05 -04:00
Qingchuan Shi 77e5b30c41 remove finalizer usage from image ext
Change-Id: I282f02cedce790bf42f07c588fd50e346b9ba665
2017-05-29 20:44:52 -04:00
Sean Keely e38ff18990 Unmap GPUs when allow_access removes them from system pools.
Change-Id: Ib9eb88622fded43ebd9eddbf78ad6771a5b91e77
2017-05-17 20:58:05 -04:00
Chris Freehill 8161ebb915 Refactored performance test code
Commented and flattened binary search sample.

Change-Id: Ib783292207c956d16003195924a3bcfbbde5039f
2017-05-11 14:45:45 -04:00
Konstantin Zhuravlyov a777413400 Purge warning in amd_hsa_code.cpp
Change-Id: Iaa5d7af183af5e8c069365a1f0410365b46d53d5
2017-05-08 19:39:49 -04:00
James Edwards 001d43ce56 Change rpm preinstall script to post install
Change-Id: Iccc04902699bf0ba8b5269e1129b72cf69ef7f00
2017-05-07 14:02:54 -05:00
hthangir 8aa19388a9 On GFX9+ amd_queue_t.scratch_backing_memory_location must store the queue's scratch backing store VA, not the offset.
Also fix permission in couple files.

Change-Id: I4203f8e5a36406b20562d8943ea5c341847f039a
2017-04-18 22:37:56 -05:00
Christophe Paquot 617b6fa987 Separate gfx700 and AI architectures
Registers are different and it's cleaner to do as such

Change-Id: I36eee4c9c74deb43ca4666baa87894765a5f27b8
2017-04-07 00:14:22 -04:00
Jay Cornwall f0a1c7c4c6 Fix gfx9 trap handler to retrieve correct return address
The trap protocol changed between gfx8 and gfx9. The return address
is in trap temporaries [0,1] on gfx9 rather than [4,5] on gfx8.
Unfortunately SP3 changes the meaning of the ttmp register aliases
in gfx9, further confusing the issue.

Clean up later when LLVM assembly build is introduced to the runtime.

Change-Id: I84ea9bf3736f060dd95d0361f9d5a0f9a3576178
2017-04-05 17:33:49 -05:00
Sean Keely 8a5ff78be6 Remove comments, no functional change.
Change-Id: I923c037803a847352c2c50d9d47460cb0f01f22c
2017-03-28 18:22:49 -05:00
Sean Keely 7dfeee5074 Support async. queue errors and dynamic scratch without KFD events.
Change-Id: I4e9e7a37aa7b9c96b28ce79f562760283e02b1e0
2017-03-28 19:18:18 -04:00
Sean Keely c4544906b9 Refactor signal_wait timing code and respect small timeouts.
Optimized for Gromacs and SHOC.

Change-Id: Ib674710268b41003259711a0e42d3e770a82018d
2017-03-23 23:55:48 -05:00
hthangir ba3f1cb476 We should be using the "used" gcc attribute.
Change-Id: I1589273740ae66e8d7d8186a88e2c411a2e0425c
See: https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html#Common-Variable-Attributes
2017-03-20 11:57:39 -04:00
hthangir 6c750f479d Fix the comment to specify the right type of allocation required.
Change-Id: I8bda8d64010d466d6ca5e779d2042cca3f494ecf
2017-03-20 11:56:54 -04:00
hthangir 7c6cde1871 Disable SDMA only on gfx900 until it is validated.
Change-Id: Ib960be3ca6d3fc4b664ba047243964b8c7a33f24
2017-03-20 11:55:22 -04:00
Konstantin Zhuravlyov a08d760c70 [Loader] Fix memory allocations for code objects that
are larger than swap space available

Change-Id: I321487f96fe0a18998301a9058430c19427e5a94
2017-03-11 00:57:25 -05:00
Sean Keely 5f50e97d18 Support async error code 256, invalid vendor specific packet.
Change-Id: I491f34def4c3d54403864fa42670f7847a6141cc
2017-03-10 16:20:27 -05:00
Sean Keely 2824786b3b Relax signal assertion.
Informs, in debug mode only, that a signal wait violated the HSA
spec with regard to the consuming agents list.  This list is used
for optimized signal type selection.

Change-Id: I5879f8f822d01af504ab913482b2532feb00be98
2017-03-10 16:05:34 -05:00
Christophe Paquot 05d587ef79 Add inc/ to some include
Change-Id: Id027b015c8785a132835a422d97a23b0bbce208a
2017-03-09 19:45:01 -08:00
Sean Keely 426d41e27c Adjust signal sleep to reflect null kernel latency. Performance tested on Gromacs.
Change-Id: I3851148ee8544b15d840f2c26ca73a83f8d0df2e
2017-03-09 15:20:53 -05:00
Christophe Paquot 29894df0b5 Update addrlib for gfx900.
Change-Id: I2b7b6093406c5498e9a551327701ad8973f1cf3a
2017-03-07 14:41:16 -08:00
Ramesh Errabolu 315ae6439b Extend Rocr Samples to allow collection of Perf Cntrs
Change-Id: I9c7e75128fca28b23ec54efab00bf5d32c95a877
2017-02-28 20:29:24 -06:00
James Edwards 470750cc3c Update readme regarding CMAKE_PREFIX_PATH.
Change-Id: I322789f38b1984b2527554c10cb0f3be886d3e91
2017-02-20 14:33:53 -06:00
James Edwards 57ac399652 Modify packaging cmake files to use BUILD_VERSION* instead of RELEASE_VERSION*.
Change-Id: I6f1b83c9faf0d40c1ac27d8998f4651341971b1b
2017-02-16 16:40:20 -06:00
Ramesh Errabolu 42e751519b Enable code for Perf Cntrs for gfx900 - AI family device
Change-Id: I4659da1a8db17392016fc90c8ea19b5805b5d3aa
2017-02-15 21:50:23 -06:00
James Edwards 900f272622 Fixes to HSA CMakeList.txt files
Change-Id: Idd176d24dfd22bd9a6a8860ab035fd5d1aca756d
2017-02-15 08:26:30 -06:00
James Edwards b7e06b471c Fix TeamCity builds using utils.cmake.
Change-Id: Id15a911dad06643d9457cc4d8c907fc5796772ee
2017-02-14 15:36:21 -06:00
James Edwards 73e942cd8a Modify hsa CMakeList.txt file to use PREFIX_PATH and git describe versioning.
Change-Id: I08668df07725369ecf8a2f35e74dd7d64c8ca94b
2017-02-14 08:39:16 -05:00
Konstantin Zhuravlyov 9887c26113 Bring loader in sync with stg/sc
Change-Id: Iccce07b8fa03d37c4267a2a9bd343e6614dc43e7
2017-02-10 11:21:15 -05:00
Jay Cornwall 4d62b9482a Implement code cache invalidation for Gfx9
When a new enough microcode build is running use a vendor AQL packet
to submit the PM4 IB.

Change-Id: Icd3e2b322c418477420ba4a29f4455ce340ef0d2
2017-02-09 14:15:21 -05:00