Граф коммитов

133 Коммитов

Автор SHA1 Сообщение Дата
Sean Keely bc0bd00746 Fix queue interception in tools.
1. Correct amd::AqlQueue::ExecutePM4 to support interception.
2. Minor fixes to AqlPacket and SoftCP.
3. Minimal change to disable interception of runtime internal queues.

Change-Id: I103fece2ebf9a188d27f01e61221c737405d7253
2017-07-12 16:39:43 -04:00
Sean Keely 29b5b5c029 Correct handling of slow clocks under linux.
Change-Id: I9a1b08d5457caa6739220603bbd37b00febc64d7
2017-07-12 12:49:49 -04:00
Sean Keely 3e50adc7ce Properly order signal copy agent tagging with copy operation.
Change-Id: Ic428c958551279fbea1b2449afba930b82804ede
2017-07-11 13:10:00 -04:00
Sean Keely c9f0427cb0 Decrement hsa_init ref counter when init fails.
Change-Id: If9376344d4b559e601932d070731132c8450104e
2017-07-07 21:21:03 -05:00
Evgeny 4174f07fd1 hsa-runtime integration
Change-Id: I48968966ffe164218ebff88d0e3a1268e96bf1dd
2017-07-05 10:55:30 -04:00
Ramesh Errabolu 08e0bca567 Support Perf Cntrs (PMC) and Thread Trace (SQTT) over AQL queues
Change-Id: I716b722895d90b46914c31377e791ad602acecc1
2017-06-15 12:58:31 -04:00
Kenny Ho 5b4df54b10 Revert "Implement memory fault analysis through context save area"
This reverts commit 75c9506f9d.

Change-Id: Ibf11b764b383b9be291f3009a30550e1a1e2d115
2017-06-14 14:21:53 -04:00
Jay Cornwall 75c9506f9d Implement memory fault analysis through context save area
When a fatal memory fault occurs the scheduler context-saves all queues
in the process and notifies the runtime through the memory event. The
saved state contains all GPR/LDS data at the moment of the fault.

Retrieve this state and present it to the user if HSA_DEBUG_FAULT is set
to "analyze" and the wavefront caused the fault. If amdgcn-capable objdump
is in the PATH invoke this to disassemble code around the PC.

Queue lifetime is now managed by the runtime to allow querying the
context save state for all active queues.

Change-Id: I6fee662fad1c4f9aa125bf5c53d7d0ea1ab32f95
2017-06-13 23:12:28 -04:00
Konstantin Zhuravlyov d98e99949a Update hsa_isa_t entries
- Add 7.0.2 (consumer hawaii)
  - Add 9.0.1 (gfx900 with xnack)
  - Add 9.0.2
  - Add 9.0.3

Change-Id: I6a07797027c4eaf47038837c5ae51e05b2aba0e4
2017-06-12 14:34:11 -04:00
hthangir a0957bc679 The fallback path covers not just ARM64, need this for Power as well.
Change-Id: I7bbf76f77bd3ac47a0a0987c1e880e23834588e2
2017-06-07 14:45:29 -05:00
Jay Cornwall 5db53ceda1 Enable SDMA on gfx9, disable on gfx8
gfx9 has passed qualification. gfx8 stability is under investigation.

Change-Id: Ia72211d47756399ecdfceafeb67c2ab34ebda834
2017-06-02 15:14:14 -05:00
Sean Keely c3e2a88ade Add preferred agent info to pointer info struct.
Lookup blit agent via pointer info in memory_fill.

Change-Id: I02feaf68bb9726858e8cb0ede6bc5f2b3707f5af
2017-05-31 05:16:05 -04:00
Sean Keely e38ff18990 Unmap GPUs when allow_access removes them from system pools.
Change-Id: Ib9eb88622fded43ebd9eddbf78ad6771a5b91e77
2017-05-17 20:58:05 -04:00
Konstantin Zhuravlyov a777413400 Purge warning in amd_hsa_code.cpp
Change-Id: Iaa5d7af183af5e8c069365a1f0410365b46d53d5
2017-05-08 19:39:49 -04:00
James Edwards 001d43ce56 Change rpm preinstall script to post install
Change-Id: Iccc04902699bf0ba8b5269e1129b72cf69ef7f00
2017-05-07 14:02:54 -05:00
hthangir 8aa19388a9 On GFX9+ amd_queue_t.scratch_backing_memory_location must store the queue's scratch backing store VA, not the offset.
Also fix permission in couple files.

Change-Id: I4203f8e5a36406b20562d8943ea5c341847f039a
2017-04-18 22:37:56 -05:00
Jay Cornwall f0a1c7c4c6 Fix gfx9 trap handler to retrieve correct return address
The trap protocol changed between gfx8 and gfx9. The return address
is in trap temporaries [0,1] on gfx9 rather than [4,5] on gfx8.
Unfortunately SP3 changes the meaning of the ttmp register aliases
in gfx9, further confusing the issue.

Clean up later when LLVM assembly build is introduced to the runtime.

Change-Id: I84ea9bf3736f060dd95d0361f9d5a0f9a3576178
2017-04-05 17:33:49 -05:00
Sean Keely 8a5ff78be6 Remove comments, no functional change.
Change-Id: I923c037803a847352c2c50d9d47460cb0f01f22c
2017-03-28 18:22:49 -05:00
Sean Keely 7dfeee5074 Support async. queue errors and dynamic scratch without KFD events.
Change-Id: I4e9e7a37aa7b9c96b28ce79f562760283e02b1e0
2017-03-28 19:18:18 -04:00
Sean Keely c4544906b9 Refactor signal_wait timing code and respect small timeouts.
Optimized for Gromacs and SHOC.

Change-Id: Ib674710268b41003259711a0e42d3e770a82018d
2017-03-23 23:55:48 -05:00
hthangir ba3f1cb476 We should be using the "used" gcc attribute.
Change-Id: I1589273740ae66e8d7d8186a88e2c411a2e0425c
See: https://gcc.gnu.org/onlinedocs/gcc/Common-Variable-Attributes.html#Common-Variable-Attributes
2017-03-20 11:57:39 -04:00
hthangir 6c750f479d Fix the comment to specify the right type of allocation required.
Change-Id: I8bda8d64010d466d6ca5e779d2042cca3f494ecf
2017-03-20 11:56:54 -04:00
hthangir 7c6cde1871 Disable SDMA only on gfx900 until it is validated.
Change-Id: Ib960be3ca6d3fc4b664ba047243964b8c7a33f24
2017-03-20 11:55:22 -04:00
Konstantin Zhuravlyov a08d760c70 [Loader] Fix memory allocations for code objects that
are larger than swap space available

Change-Id: I321487f96fe0a18998301a9058430c19427e5a94
2017-03-11 00:57:25 -05:00
Sean Keely 5f50e97d18 Support async error code 256, invalid vendor specific packet.
Change-Id: I491f34def4c3d54403864fa42670f7847a6141cc
2017-03-10 16:20:27 -05:00
Sean Keely 2824786b3b Relax signal assertion.
Informs, in debug mode only, that a signal wait violated the HSA
spec with regard to the consuming agents list.  This list is used
for optimized signal type selection.

Change-Id: I5879f8f822d01af504ab913482b2532feb00be98
2017-03-10 16:05:34 -05:00
Christophe Paquot 05d587ef79 Add inc/ to some include
Change-Id: Id027b015c8785a132835a422d97a23b0bbce208a
2017-03-09 19:45:01 -08:00
Sean Keely 426d41e27c Adjust signal sleep to reflect null kernel latency. Performance tested on Gromacs.
Change-Id: I3851148ee8544b15d840f2c26ca73a83f8d0df2e
2017-03-09 15:20:53 -05:00
James Edwards 470750cc3c Update readme regarding CMAKE_PREFIX_PATH.
Change-Id: I322789f38b1984b2527554c10cb0f3be886d3e91
2017-02-20 14:33:53 -06:00
James Edwards 900f272622 Fixes to HSA CMakeList.txt files
Change-Id: Idd176d24dfd22bd9a6a8860ab035fd5d1aca756d
2017-02-15 08:26:30 -06:00
James Edwards b7e06b471c Fix TeamCity builds using utils.cmake.
Change-Id: Id15a911dad06643d9457cc4d8c907fc5796772ee
2017-02-14 15:36:21 -06:00
James Edwards 73e942cd8a Modify hsa CMakeList.txt file to use PREFIX_PATH and git describe versioning.
Change-Id: I08668df07725369ecf8a2f35e74dd7d64c8ca94b
2017-02-14 08:39:16 -05:00
Konstantin Zhuravlyov 9887c26113 Bring loader in sync with stg/sc
Change-Id: Iccce07b8fa03d37c4267a2a9bd343e6614dc43e7
2017-02-10 11:21:15 -05:00
Jay Cornwall 4d62b9482a Implement code cache invalidation for Gfx9
When a new enough microcode build is running use a vendor AQL packet
to submit the PM4 IB.

Change-Id: Icd3e2b322c418477420ba4a29f4455ce340ef0d2
2017-02-09 14:15:21 -05:00
Sean Keely 505d722b7d Fix Api table copy operation and tools version checking.
Change-Id: Ia76d16f3ea6d0abb931813f90bc3bc2119da5999
2017-02-07 14:26:20 -05:00
Sean Keely bc43f97964 Use fixed size type for queue type arguments.
Change-Id: I81b605c9cc9b18bcef043a4f0292212241ce5987
2017-02-07 01:22:30 -05:00
Jay Cornwall 28f51d5808 Fix Gfx9 write pointer setup
Should point directly to amd_queue_t.write_dispatch_id. Only noticeable
with HWS enabled which is not yet stable.

Change-Id: I169906d45225379a3ca2729ff04d298fdbb9a9fb
2017-02-06 14:06:12 -05:00
Jay Cornwall 9e575ea96a Add support for ARM
- Build system fixes
- No user-mode high-precision timer by default, use clock_gettime
- Use C11 aligned_alloc pending C++17 std::aligned_alloc

Change-Id: I268365bdfd11d1e817a89584b9e086ee5b86e1dc
2017-01-31 16:43:49 -08:00
Jay Cornwall 7e0a5f9c00 Add support for gfx900
- Route AQL doorbell directly to HW doorbell
- Reuse precompiled Gfx8 shaders on Gfx9 (ISA is compatible)
- Add a warning for unimplemented code cache invalidation

Change-Id: I92096584a1404e35779c96ae6bdc3e0e7fd04721
2017-01-30 16:36:28 -06:00
Sean Keely 796d31d94d Remove old names from API table interfaces.
Change-Id: I41ca38b596e1dac85e871f583e3ffe7078b790e7
2017-01-27 17:45:26 -06:00
Christophe Paquot 9ae1e15750 Adding the new APIs to the .def files and fixed a couple of things
Change-Id: I247a60b8cdbd4acfed72fb6d78ac7faf69d8a556
2017-01-27 16:51:50 -05:00
Jay Cornwall 1cd46afe6d Implement SDMA path for Gfx9
Gfx9 requires monotonic write pointer and doorbell.
Cound fields are 1-based compared with 0-based pre-Gfx9.

- Restructure implementation to use monotonic ring indices
- Remove redundant submission size checks (handled by AcquireWriteAddress)
- Unify copy/fill per-command limit (documentation is unclear)

Change-Id: I57c1675221d2e63aa319fee700d9951671e1bd65
2017-01-26 13:11:21 -05:00
Christophe Paquot a324f21a46 Add new 1.1 image APIs
Note: Implementation same as 1.0 APIs for now.
      The followup change will have the complete implementation.

Change-Id: Ife633f74ff27eee0bb9b0c46952cf5233b0114e8
2017-01-20 19:37:03 -05:00
Ramesh Errabolu 8ab28d1a51 Add agent properties for Tools
Change-Id: I7bc49d35dc559f9c9058aae591b88c5ecc4b3ce5
2017-01-16 13:50:18 -06:00
Christophe Paquot 31d379c821 Add image 1.1 API changes to current code base
Initial work to import the latest (1.1) hsa_ext_image extension.

Change-Id: I51d70ef26f97250c884b3def2088be0d7eb04eb3
2017-01-12 14:49:54 -08:00
Kent Russell 5162a76616 Revert " Add image 1.1 API changes to current code base"
Currently HSA HW Profiler is failing to build due to this patch

This reverts commit e0ce8855dd.

Change-Id: Iabb2b958f33ba614a24b61bb370905b3b7362708
2017-01-12 06:43:54 -05:00
Christophe Paquot e0ce8855dd Add image 1.1 API changes to current code base
Initial work to import the latest (1.1) hsa_ext_image extension.

Change-Id: I4d55adb09ba4d4dbd43d47a4bc54077d4bc531d2
2017-01-11 17:31:37 -05:00
Sean Keely 0e17cc2887 Allow reducing max occupancy (max scratch waves) when applications request large amounts of scratch.
Also emit error messages to stderr if no async queue error callback was registered and queue fault messages are enabled (on by default).
Queue fault messages are controlled with env key HSA_ENABLE_QUEUE_FAULT_MESSAGE.

Change-Id: I496487b8d048b83aa95b9784e92928211f167b17
2016-12-20 16:52:59 -06:00
James Edwards 433a3bcde8 Readme and comment updates to ROCm 1.4
Change-Id: I2864a9c475b9ceb2fa08bfc35999c7e0e043b26d
2016-12-16 11:43:36 -06:00
Chris Freehill 160f8c5880 HSA Enabled IPC support
Uncommented HSA IPC code.
Changed hsa_amd_ipc_memory_t to be 8 uint32_t's instead of 9 to
match spec

Change-Id: Id1523125e9b876a23c3743df1be29c98b47f6725
2016-12-15 19:16:29 -05:00