Commit Graph

30 Commits

Author SHA1 Message Date
Shaoyun Liu 93d07cf916 Thunk: Add gfx906 support on thunk
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>

Conflicts:
	src/topology.c

Change-Id: I692d9295a954d4eda08eba301312014f7b3969cb
2018-05-29 15:38:26 -04:00
Jay Cornwall e2c353dc0d Allocate EOP queue local to GPU
On discrete GPUs place the EOP queue in VRAM. The reader/writer of this
queue is the CP and the size is small. Dispatch latency improves
through lower read latency in AQL completion phase.

Change-Id: Id8351dcddbd21fd7c7d699803c96434c9132db71
Signed-off-by: Jay Cornwall <Jay.Cornwall@amd.com>
2018-02-22 18:14:05 -05:00
Oak Zeng 68a2d286ca Use drm render device to map kfd BOs
Previously kfd device is used to map memory for CPU access.
However this is not compatible with how TTM handles CPU mapping
on eviction - memory won't be unmapped and remapped on restore.
This fixes the issue by mmapping memory using DRM render device.

This patch requires a coordinated kernel driver change to work.
To make it compatible with old kernel driver, some temporary codes
are included. Once the coordinated kernel driver is checked in,
the temporary codes can be removed.



Change-Id: Ie7b304c4a82b7e8d5ab703acb81d66430af4f0bc
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
2017-11-02 09:06:26 -04:00
Yong Zhao 3b852b4437 Add SVM aperture on gfx902
Because of HW design change, GPUVM aperture is no longer needed on GFX9
APUs. However, on APUs some functionalities still depend on GPUVM
aperture, so we choose to use SVM aperture instead to assume
the functionality of previous GPUVM aperture.

Change-Id: Ife7f0d598dd7989f2bcf7cdf3466d5a68703ca60
Signed-off-by: Yong Zhao <yong.zhao@amd.com>
2017-10-16 15:06:09 -04:00
Yong Zhao d0e2872011 Add gfx902 support
Change-Id: Iefc6d1bea0d1d2ea8768867c53f16cdf1279d38f
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
2017-08-03 10:27:56 -04:00
Felix Kuehling c7bd7733e5 Align large buffers to BigK or huge-page boundary
This should allow us to take advantage of BigK fragments and huge pages
and improve TLB efficiency for VRAM allocations. Huge pages only work
with 4-level page tables (gfx900 and up). BigK fragments work on older
GPUs.

Change-Id: I02e1fbf74de554e16fdaf44e44d03b47df45c3b0
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
2017-07-17 12:04:05 -04:00
Amber Lin ccfe739929 Introduce debug level to Thunk
Existing Thunk has printf/fprintf in the code while normally libraries
don't print any message. This patch introduces a print machenism similar to
how the Linux kernel prints to console based on the log level. The default
is not to print any message, but setting HSAKMT_DEBUG_LEVEL will enable the
prints.

Change-Id: Ic071e122d35a82260218e9914cde4815e69df742
Signed-off-by: Amber Lin <Amber.Lin@amd.com>
2017-06-26 16:33:17 -04:00
Amber Lin 683fc96325 Implement hsaKmtGetQueueInfo interface
For items in HsaQueueInfo, control stack information comes from KFD, CU
mask information is maintained in Thunk, and others (queue detail error
and queue type extended) are ignored (value = 0) at this point.

Change-Id: Ib21370b0f52b2bb4ebe6a9b4b6ec6139cccb25ca
Signed-off-by: Amber Lin <Amber.Lin@amd.com>
2017-06-01 14:15:54 -04:00
Harish Kasiviswanathan 3b2f064cbc Get PAGE_SIZE from system configuration
Change-Id: I87f383c443b873e13d36e80bfa034665bf493520
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
2017-05-02 16:54:32 -04:00
Amber Lin 4827b09119 Unify the device ID list
Integrate the supported device ID list distributed in topology, queue, and
pmc into one place: topology.

Change-Id: If035cf8e4a6fc6caff6c94ec627647cfb11c3d79
2017-03-06 16:26:51 -05:00
Felix Kuehling a90abcb317 Allocate paged system memory as userptr
Change-Id: I0864e678681788df37eccd9d7ebc70086e1f93bf
2017-02-02 10:32:53 -05:00
Harish Kasiviswanathan f1f62d863c Add fork support
If fork() is called, clear all duplicated data that is invalid in the
child process.

Change-Id: I4e27198060db593c630c6337b7071dfbd0d80b83
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
2017-01-12 14:38:30 -05:00
Harish Kasiviswanathan 559e31d6ff Add API entrypoints for IPC functionality
Implement three new APIs for IPC buffer sharing:
	-hsaKmtShareMemory()
	-hsaKmtRegisterSharedHandle()
	-hsaKmtRegisterSharedHandleToNodes()

Add new ioclts necessary for the above APIs.

Change-Id: Ia2b4d0dc91ec64bff959395d11c0536467404792
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
2016-11-28 16:19:22 -05:00
Lan Xiao 9cbbf30be7 libhsakmt: Add MarketingName and AMDName for all nodes - CPU & GPU
HSA thunk API is currently reporting engineering name to MarketingName
and returning NULL when querying for AMDName.

-Change current name reporting from MarketingName to AMDName.
-Use libpci to get MarketingName



Change-Id: I819a6de7b067a2e724a6695e7d800274b83a71f8
Signed-off-by: Lan Xiao <Lan.Xiao@amd.com>
2016-08-23 10:49:27 -04:00
Harish Kasiviswanathan ee1dd5d9c2 Get processor vendor from /proc/cpuinfo
Change-Id: I9039385d268ef1693fab121cbf1caf442129a12e
2016-03-15 15:37:52 -04:00
Felix Kuehling 887b32fe86 Make hsaKmtAllocMemory more compliant with the Thunk spec
Allocations from GPU nodes will return VRAM, not system memory.
Only non-paged allocation from GPU nodes is supported. System
memory can only be allocated from CPU nodes (usually node 0).

The HostAccess flag is no longer used to distinguish the memory
type. It only indicates, whether the memory is mapped for CPU
access.

Maintain compatibility with broken KfdTests by returning system
memory for paged-memory requested from GPU nodes.

Change-Id: I514defede735f55e6de436f41944125b6f2c4ccf
2016-02-10 10:29:54 -05:00
Ben Goz 7070f7ec5e Adding support to hsaKmtMapMemoryToGPUNodes
Change-Id: Iab6222402a43c3cd31b0efc5a316a6482986258e
Signed-off-by: Ben Goz <ben.goz@amd.com>
2016-02-09 17:34:29 +02:00
Harish Kasiviswanathan 5e53205b9e Don't limit number of supported HSA Nodes
Remove #define MAX_NODES 8

Change-Id: I756cadc652543dd17ea48a1c956adc08c3d2631a
2016-01-15 17:27:43 -05:00
Harish Kasiviswanathan ce83dc623f Don't limit number of supported GPUs
Stop using NUM_OF_SUPPORTED_GPUS. For now the definitions itself cannot
be removed as ioctl code is in upstream Kernel.

Change-Id: If846625a8ad5062d5483e762850c793d3c00b9d0
2016-01-15 11:44:42 -05:00
Ben Goz ea0f9d2a0b Adding support for mGPU
Change-Id: I5ed184e6a58b38d9dde48867f14513d161cf41a9
Signed-off-by: Ben Goz <ben.goz@amd.com>
2016-01-04 15:35:15 +02:00
Harish Kasiviswanathan 69662da3dc Correct parameter name for topology_is_dgpu()
The function expects device_id and not gpu_id.

Change-Id: I79794fd4e58e6e6adb26659da30f3e4d8e108434
2015-10-23 18:43:45 -04:00
Harish Kasiviswanathan 5cc56a2647 Fix init process apertures
Kernel ioctl AMDKFD_IOC_GET_PROCESS_APERTURES returns process apertures
only for GPU nodes. The current implementation assumed that this list of
GPU nodes returned by the ioctl has one to one correpondence to sysfs
topology nodes. This fails when non-GPU nodes exist in topology as in
case of Intel + gfx802

Fix this by using gpu_id (./sys/.../kfd/topology/nodes/1/gpu_id) to map
information obtained from kernel ioctl call.

Change-Id: I4ab8ae5354f12cf0b6609fc4b24182b82eb3677f
2015-10-15 15:38:14 -04:00
Harish Kasiviswanathan b6c6f79143 Fix hard-coded usage of Node 0
Use appropriate NodeId instead

Change-Id: I46af93b76978fea7bedb34457fcc0864ed4fe2d4
2015-10-14 17:27:38 -04:00
Felix Kuehling 6a5ca4bc5a Fix various dgpu memory management issues
Fix TONGA_PAGE_SIZE value and move it to libhsakmt.h for usiing it
consistently in all places that require the same alignment for the
same reason. Create a generic alignment helper macro to replace some
incorrect hand-coded size alignments.

Move virtual address and size alignments down into aperture management
functions. Alignment is a per-aperture property that is set during
fmm_init_process_apertures. Doing the alignment there ensures that
all allocations in the same aperture are aligned the same way. Finding
objects by size and address can take the alignment into account.

Also align the size of physical allocations to back aligned virtual
address allocations. CPU mappings do not need to be aligned.

Map anonymous pages over released memory mappings to allow the
backing pages to be released, while keeping the address space
reserved.

Add alignment parameter to free_exec_aligned_memory_gpu to match the
interface of allocate_exec_aligned_memory_cpu. It doesn't make sense
to allow an alignment parameter in one but assume a specific
alignment in the other.

Change-Id: I74226ca6938f4948f643e5aee1d474720cd89e78
2015-10-13 19:14:56 -04:00
Ben Goz 6170080cf6 Adding support for local memory on dGPU
Change-Id: I1a926b11730ba295605eeb37c9b1fc438bed8a64
Signed-off-by: Ben Goz <ben.goz@amd.com>
2015-09-21 14:13:15 -04:00
Ben Goz fb8378a18b Support gfx802 dGPU
Signed-off-by: Ben Goz <ben.goz@amd.com>
2015-08-30 14:13:53 +03:00
Alexey Skidanov c3b51fd827 Adding memory exception notification through hsaKmtWaitOnMultipleEvents
Signed-off-by: Alexey Skidanov <Alexey.Skidanov@amd.com>
Reviewed-by: Oded Gabbay <oded.gabbay@amd.com>
2014-11-27 16:24:06 +02:00
Oded Gabbay 94c0329fc4 Move from direct call to kfd_ioctl to wrapping kmtIoctl
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>
2014-12-29 15:37:42 +02:00
Ben Goz 678287d98b Add queues module
Signed-off-by: Ben Goz <ben.goz@amd.com>
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>
2014-07-29 13:56:50 +03:00
Oded Gabbay 85ba9efa18 Add skeleton driver which supports open and close
Signed-off-by: Oded Gabbay <oded.gabbay@amd.com>
2014-07-29 11:16:00 +03:00