Commit Graph

67 Commits

Author SHA1 Message Date
Oak Zeng 68a2d286ca Use drm render device to map kfd BOs
Previously kfd device is used to map memory for CPU access.
However this is not compatible with how TTM handles CPU mapping
on eviction - memory won't be unmapped and remapped on restore.
This fixes the issue by mmapping memory using DRM render device.

This patch requires a coordinated kernel driver change to work.
To make it compatible with old kernel driver, some temporary codes
are included. Once the coordinated kernel driver is checked in,
the temporary codes can be removed.



Change-Id: Ie7b304c4a82b7e8d5ab703acb81d66430af4f0bc
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
2017-11-02 09:06:26 -04:00
Shaoyun Liu 55fc06dac3 Add asic id for gfx906 on emulator
On thunk level, gfx906 works same as gfx900 chip

Change-Id: I727bd904284616f3b1b9b911e41ad0f19318b3ee
Signed-off-by: Shaoyun Liu <Shaoyun.Liu@amd.com>
2017-10-31 14:58:09 -04:00
Yong Zhao 3b852b4437 Add SVM aperture on gfx902
Because of HW design change, GPUVM aperture is no longer needed on GFX9
APUs. However, on APUs some functionalities still depend on GPUVM
aperture, so we choose to use SVM aperture instead to assume
the functionality of previous GPUVM aperture.

Change-Id: Ife7f0d598dd7989f2bcf7cdf3466d5a68703ca60
Signed-off-by: Yong Zhao <yong.zhao@amd.com>
2017-10-16 15:06:09 -04:00
Amber Lin 5815d9de9b Fix endless loop
Fix a while loop that can cause forever loop when cpuid instruction
doesn't work properly.

Change-Id: Iefa49d23b40c994eb4369621974a7d3c4067e47a
Signed-off-by: Amber Lin <Amber.Lin@amd.com>
2017-10-12 14:22:42 -04:00
Yong Zhao df4d8a0010 Revise gfx902 GFX version to 9.0.3
Change-Id: I6c16726ac9d096dc4ab127fb266eed105a4f9c87
Signed-off-by: Yong Zhao <yong.zhao@amd.com>
2017-10-06 14:48:38 -04:00
Yong Zhao d0e2872011 Add gfx902 support
Change-Id: Iefc6d1bea0d1d2ea8768867c53f16cdf1279d38f
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
2017-08-03 10:27:56 -04:00
Amber Lin e46743b1dd Workaround cpuid issue under Valgrind
Topology uses cpuid to get CPU cache information. However when running
under Valgrind, data returned from cpuid are not from the processor we set
affinity to. Instead they are all from one specific processor. For a quick
workaround so other teams can continue their work, this patch will report
CPU cache from that specific processor and ignore others.

Change-Id: I5cfac2329dac277f3dbde1be92fa26e085465401
Signed-off-by: Amber Lin <Amber.Lin@amd.com>
2017-07-24 12:04:17 -04:00
Amber Lin 897c4e2fff Replace printf/fprintf with pr_xxx
Libraries normally don't print messages. We use pr_err, pr_warn,
pr_info, and pr_debug to print messages to stderr when prints are
enabled for debugging.

Change-Id: I9caf719343aa618c88e7b500f9737a46702e424a
Signed-off-by: Amber Lin <Amber.Lin@amd.com>
2017-06-28 10:47:35 -04:00
Amber Lin 13aadde56e Use environment variable to force gfx version
For experimental purpose, we need an option to change compute capability
by forcing the GfxIp version. This patch allows to use environment
variable HSA_OVERRIDE_GFX_VERSION=major.minor.stepping to replace the
default version. For example:
export HSA_OVERRIDE_GFX_VERSION=9.0.1

Change-Id: I90cfbd43619d9d3aebf53321d4e058f01bcd7088
Signed-off-by: Amber Lin <Amber.Lin@amd.com>
2017-06-22 18:15:17 -04:00
Evan Quan 5b3c9f0b31 Revert "Change gfx900 compute capability to 9.0.1"
This reverts commit 5114a9368b.


Change-Id: Id9c4f43462820bf09f25674fa30e6eb04098808e
Signed-off-by: Evan Quan <evan.quan@amd.com>
2017-06-20 15:36:09 +08:00
Amber Lin 5114a9368b Change gfx900 compute capability to 9.0.1
9.0.1 is XNACK enabled gfx900 compile target. Compiler must generate ISA
that's XNACK enabled.



Change-Id: Ic4987132ef9f8d06d9e2bcdb8f7eeb875cdd2b44
Signed-off-by: Amber Lin <Amber.Lin@amd.com>
2017-06-13 17:04:42 -04:00
Kent Russell b78e0e152a Clean up thunk code
Use checkpatch.pl to fix the majority of errors. Some that remain and
will be excluded:
Use of typedefs/externs/volatile/sscanf
Lines over 80 characters

Remaining errors are due to misunderstanding the * symbol with typedefs

Also use this opportunity to spell manageable properly

Change-Id: I0b335e9cb3e1eea38bee27eaa1f582b2c9b09b38
2017-05-31 14:38:59 -04:00
Felix Kuehling 8aeb933426 Add some additional gfx900 PCI IDs
Change-Id: I5f00f3b30a27285d75c606c1308abfe032ce1d02
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
2017-05-11 16:39:19 -04:00
Harish Kasiviswanathan 3b2f064cbc Get PAGE_SIZE from system configuration
Change-Id: I87f383c443b873e13d36e80bfa034665bf493520
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
2017-05-02 16:54:32 -04:00
Amber Lin c119653add Create indirect IO links
KFD added all direct IO links to sysfs, so this patch removes all direct
links related code and modify the indirect links function to reflect the
change.

Change-Id: Iaec7b5f6c59f9034f8f960ca1fe1145d51dab367
Signed-off-by: Amber Lin <Amber.Lin@amd.com>
2017-04-07 07:18:13 -04:00
Felix Kuehling 53838c9818 Add missing gfx900 device IDs
Change-Id: Ica5deb000279a508106125461af64a3851294b0a
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
2017-03-24 16:03:46 -04:00
Amber Lin 3738a1b5f2 Re-formatting IO link code
- Typo fix: *_link_tye to *_link_type and a missing word in comments
- Replace printf with fprintf(stderr
- Shorten lines to fit in 80 characters

Change-Id: Ibeb0b98d5c59d617ae06d9854a9dde16251ded52
Signed-off-by: Amber Lin <Amber.Lin@amd.com>
2017-03-09 11:08:22 -05:00
Amber Lin b3b6367cb8 Add gfx803 DID
Add 0x67D0 to gfx803 support list.

Change-Id: Ifdb1fad4a3c42bea54856f6d5248c00ed546ad85
2017-03-07 07:25:49 -05:00
Amber Lin 4827b09119 Unify the device ID list
Integrate the supported device ID list distributed in topology, queue, and
pmc into one place: topology.

Change-Id: If035cf8e4a6fc6caff6c94ec627647cfb11c3d79
2017-03-06 16:26:51 -05:00
Amber Lin 9ba2b68fdb Add gfx900 support
Add gfx900 device to the support

Change-Id: I71f30ef43e5e0ef0e7b5f18205b6cc4767d9d861
2017-02-27 10:39:05 -05:00
Amber Lin 72b842a6dc Sync up gfx803 DIDs with KFD
Add gfx803 10/11 device IDs that were recently added to KFD.

Change-Id: Id40b117ae47bacedefa6e333fdfdf58dea92cd2d
Signed-off-by: Amber Lin <Amber.Lin@amd.com>
2017-02-01 12:05:24 -05:00
James Edwards b170e0ad8c Fix CMakeList.txt file to use correct compile options. Fix compilation errors.
Change-Id: I6229a83d0823ee7a123cdaa9efd782108aa3a03c
2016-09-30 16:36:01 -05:00
Amber Lin 660a6ebbd4 Disable CPU cache info in non-x86
CPU cache information reported by Thunk topology is obtained from cpuid
instruction. This instruction only applies to X86 systems. It can cause
compile errors on non-X86 platforms. This patch temporarily disables CPU
cache functions in topology for non-X86 platforms in order to compile.

Change-Id: If86671817b0d036cb324eebf3f354682bfb75856
2016-09-14 17:30:50 -04:00
Lan Xiao df593aa076 libhsakmt: Marketing Name and AMDName support for APUs
For APUs, use /proc/cpuinfo to get Marketing name.



Change-Id: I4a17516d26a092683f36631032be00ad44f7e7fe
Signed-off-by: Lan Xiao <Lan.Xiao@amd.com>
2016-09-02 15:16:18 -04:00
Lan Xiao 9cbbf30be7 libhsakmt: Add MarketingName and AMDName for all nodes - CPU & GPU
HSA thunk API is currently reporting engineering name to MarketingName
and returning NULL when querying for AMDName.

-Change current name reporting from MarketingName to AMDName.
-Use libpci to get MarketingName



Change-Id: I819a6de7b067a2e724a6695e7d800274b83a71f8
Signed-off-by: Lan Xiao <Lan.Xiao@amd.com>
2016-08-23 10:49:27 -04:00
Amber Lin 876384305b Add gfx803 support
Add gfx803 and gfx80311 device IDs to the support

Change-Id: I16220fd811db102c02e5e0c5b82e40ec299877af
2016-08-08 11:30:57 -04:00
shaoyunl 16d5aa0d83 libhsakmt: Add new device id for virtualized function of gfx803
Signed-off-by: Shaoyun Liu <Shaoyun.liu@amd.com>
Change-Id: I90b0bdaeaed8e9e80375e5a7a142205f2a542289
2016-05-12 13:25:01 -04:00
Felix Kuehling fa102f3b8b Report gfx70x engine ID as 7.0.1
Stepping 1 indicates higher double-precision float performance and
potentially other runtime workarounds needed for lack of PCIe atomics
on gfx70x.

Change-Id: I97185c1233e7d24caaf20a1eadea931d5a2bc664
2016-05-04 13:53:24 -04:00
Amber Lin 73ad0a1942 Correct NumCaches against the CPU node
In a NUMA system, topology should report NumCaches as the number of caches
within the node but current code reports the total caches in the system. This
patch fixes the error. This patch also uses cpuid to get cache information
instead of reading from sysfs files. See "Intel Corporation, Intel 64 and IA-32
 Architectures Software Developer's  Manual Volume 2(2A, 2B & 2C) Instruction
Set Reference" 3-179 for cpuid instruction features used in this patch.


Change-Id: I8ecece6c2b230741822620b44e66ddc201ff5112
2016-05-03 11:39:33 -04:00
Felix Kuehling 97e51ce33d Add gfx70x support
Change-Id: I400adb62b5225ef3a42da279d067fb0a62907089
2016-04-25 14:27:44 -04:00
David Ogbeide 682776d89a libhsakmt: get CPU model name from proc/cpuinfo
HSA thunk is currently only aware of GPU node
model info, CPU names are NULL.



Signed-off-by: David Ogbeide <davidboyowa.ogbeide@amd.com>
Change-Id: I3c2adbb8566a5048b44c39fff4fd8228912468ff
2016-03-23 11:11:18 -04:00
Harish Kasiviswanathan f1fbacca15 Add QPI or HT io_links
Create QPI or HT links among all NUMA nodes. For now, assume all the
NUMA nodes are interconnected with same Weight (=1).

Change-Id: Id48ba95b9d75515a186f7dc5006b19bd92743ae3
2016-03-15 21:10:53 -04:00
Harish Kasiviswanathan ee1dd5d9c2 Get processor vendor from /proc/cpuinfo
Change-Id: I9039385d268ef1693fab121cbf1caf442129a12e
2016-03-15 15:37:52 -04:00
Felix Kuehling 0ed29f5191 Report SVM heap in topology
The Runtime requested this information so they can tell easily
whether a pointer is part of HSA shared address space or not.


Change-Id: If2041ed34031636677d692bc2dc6625634027ed4
2016-03-14 11:52:36 -04:00
Harish Kasiviswanathan 8ff2bcd48d Fix indirect io_links
Connect only (Peer-to-Peer) GPUs that belong to same NUMA node. Without
this additional check non direct GPUs would also get connected.

Change-Id: I9a5ed19b8f06cd0527854cbbdb51ede99eade28b
2016-03-11 18:54:32 -05:00
Harish Kasiviswanathan 7042292c60 Add indirect io_links
Connect (Peer-to-Peer) GPUs that belong to same NUMA node.
Connect all [GPU] <--> [Non Parent NUMA] node

Change-Id: Ib4b08a6545d28b7dce4c9b1a90378bfc51bed07e
2016-03-10 15:11:17 -05:00
Harish Kasiviswanathan 1e729510d2 Allocate memory for indirect io_links
To simplify, allocate maximum needed memory for node_t->link array.
No need for realloc when indirect links are added. Trade off - for some
nodes more memory than required will be allocated.

This means the loop to compute the number of direct (reverse) io_links
for a CPU node is not necessary.

Change-Id: I2b2559142cbec3b262d0b4ea5fdebfd8f36c28fc
2016-03-10 15:10:48 -05:00
Harish Kasiviswanathan 1d1c30db7c Add reverse direct io_links
The Kernel only creates one way direct link -
	GPU(PCI_BUS) --> [Parent NUMA Node]

Create the reverse direct io_link here -
	[Parent NUMA Node] -->  GPU(PCI_BUS)

Change-Id: I829a1b1b7f34bda42871ede3472d60915e88418c
2016-03-04 15:54:03 -05:00
Harish Kasiviswanathan a80d2f2303 Add free_nodes() helper function
Change-Id: I18ae0ac91b05275d7ad9d93175bae06870080844
2016-03-03 18:33:59 -05:00
Harish Kasiviswanathan bf03058112 Fix io_links sysfs directory name typo
Change-Id: I4f6fb43c4a038b94c0f94f66ee383e83ad0ffa62
2016-02-29 11:15:29 -05:00
Ben Goz b37f99a01e Fix double free issue and pointer alignment
Change-Id: Id5bab454d53d404883a92282168b3f6cbc468cbb
Signed-off-by: Ben Goz <ben.goz@amd.com>
2016-02-12 11:21:32 -05:00
Ben Goz 7070f7ec5e Adding support to hsaKmtMapMemoryToGPUNodes
Change-Id: Iab6222402a43c3cd31b0efc5a316a6482986258e
Signed-off-by: Ben Goz <ben.goz@amd.com>
2016-02-09 17:34:29 +02:00
David Ogbeide 4e4a881940 libhsakmt: Add marketing names for GPU nodes
HSA thunk API returns null when querying for GPU node marketing
names due to empty system topology file.

- Add marketing names to device GFX IP data structs.
- Modify name retrieval to pull from data structs instead of file.



Signed-off by: David Ogbeide <davidboyowa.ogbeide@amd.com>

Change-Id: I30ea04111be7e0df2e93894f801fbeb414ffa790
2016-01-25 11:03:54 -05:00
Harish Kasiviswanathan 5e53205b9e Don't limit number of supported HSA Nodes
Remove #define MAX_NODES 8

Change-Id: I756cadc652543dd17ea48a1c956adc08c3d2631a
2016-01-15 17:27:43 -05:00
Amber Lin a5bc8360e8 Fix sibling map in CPU cache properties
Previous code only works for systems where shared_cpu_map lists 32 or less
bits. Some systems list more than 32 bits and express them as
XXXXXXXX,XXXXXXXX,.... This patch adds that calculation. Also increase
MAX_CPU_CORES and MAX_CACHES to accommodate more advanced systems.

Change-Id: Ia5c7041866456a6aa3b66f8f0f951022d7c51028
2015-11-12 08:31:51 -05:00
Amber Lin b6f65f9849 Add CPU cache information
Fill up cache properties of CPU node by reading data from /proc/cpuinfo
and /sys/devices/system/cpu/cpuX/cache/indexY



Change-Id: I0a96760575e504e38962554f192c3fe66bea3c15
2015-11-09 07:16:24 -05:00
Harish Kasiviswanathan f885e551aa Remove erroneous and redundant memory banks reported
hsaKmtGetNodeMemoryProperties -
	- Return only HSA_HEAPTYPE_SYSTEM memory for CPU only node.
	- For dGPU remove redundant HSA_HEAPTYPE_FRAME_BUFFER_PRIVATE
	  entry.

Change-Id: I0349be39b8409a0fd64a038b8b2956191356d937
2015-10-23 18:43:46 -04:00
Harish Kasiviswanathan 69662da3dc Correct parameter name for topology_is_dgpu()
The function expects device_id and not gpu_id.

Change-Id: I79794fd4e58e6e6adb26659da30f3e4d8e108434
2015-10-23 18:43:45 -04:00
Harish Kasiviswanathan cb53548c89 Unify fmm_get_aperture_xxx functions
Unify fmm_get_aperture_base and fmm_get_aperture_limit into one
function. Make the return value to HSAKMT_STATUS.

Change-Id: I0b3f563ffb268947ab891f4935f61788d0af0e01
2015-10-23 18:43:34 -04:00
Ben Goz 55b1a5dc43 Casting local memory size to uint64_t
Change-Id: I5c2010056b84ac01bb65361210d2a693e437050a
Signed-off-by: Ben Goz <ben.goz@amd.com>
2015-10-22 09:05:34 -04:00