Граф коммитов

610 Коммитов

Автор SHA1 Сообщение Дата
Philip Yang cf6745a36c libhsakmt: Set CWSR range granularity
Set CWSR svm range granularity to 0xff, then KFD will migrate the entire
CWSR range from VRAM back to system memory when recovering the CPU page
fault if rocgdb access CWSR area, this avoid the partial CWSR range
migration and stall CWSR GPU mapping issue.

This is a temporary workaround, it should be reverted once the KFD is
fixed.

Change-Id: I80a7248244574edba25b13858b7ebcf1c77b8930
Signed-off-by: Philip Yang <Philip.Yang@amd.com>


[ROCm/ROCR-Runtime commit: 85a47fa66b]
2023-10-06 10:46:40 -04:00
David Yat Sin 254e8219b3 libhsakmt: Fix incorrect flags for ext coherence
Change-Id: I89c838b9fbdb85589691f29806ae15884b25592f


[ROCm/ROCR-Runtime commit: 73efd3a14e]
2023-10-04 15:00:58 +00:00
James Zhu 0379e077b4 libhsakmt: remove share resource in performance counter
This share resource is for IOMMUv2 which is removed from
AMDGPU/KFD.

Change-Id: Ia6e9311f1adc56fac2c9e8fa05b24c5ec8c272a5
Signed-off-by: James Zhu <James.Zhu@amd.com>


[ROCm/ROCR-Runtime commit: d195deeec4]
2023-09-30 08:54:10 -04:00
James Zhu 6d52c1f332 libhsakmt: remove iommu_block which supports IOMMUv2 performance
IOMMUv2 is removed from AMDGPU/KFD.

Change-Id: I9fcf20ae9288cb40bb4b696284fc70534fb6484b
Signed-off-by: James Zhu <James.Zhu@amd.com>


[ROCm/ROCR-Runtime commit: 277d5e27ff]
2023-09-30 08:54:10 -04:00
James Zhu 9533c318bb libhsakmt: remove IOMMUv2 performance monitor support
IOMMUv2 is removed from AMDGPU/KFD.

Change-Id: Ib87f501c07d9de90e6b83b98f98daacd5913e98a
Signed-off-by: James Zhu <James.Zhu@amd.com>


[ROCm/ROCR-Runtime commit: 274b5b51ca]
2023-09-30 08:54:10 -04:00
David Yat Sin 351cbe9dc7 Add extended coherence memory flag
Add support for new flag for memory allocation that will provide
system-scope coherent atomics

Change-Id: I426d66223e8d2b570f69b4c0e61145ce9b2290d2


[ROCm/ROCR-Runtime commit: 8e06dce573]
2023-09-22 11:03:00 -04:00
Jonathan Kim c279ff343f kfdtest: add suspend and resume queues operation
Add base debug operations to suspend and resume queues.
Routine will return the number of queues successfully
suspended or resumed.

Signed-off-by: Jonathan Kim <jonathan.kim@amd.com>
Change-Id: I8f18317f70464b04231c5cf822e11d545ebfa02a


[ROCm/ROCR-Runtime commit: 5a675921ea]
2023-08-09 09:26:09 -04:00
Jonathan Kim 1435bb4887 kfdtest: add base debug class and debug attach/detach operation
Add base debug class and attach/detach operations.

Signed-off-by: Jonathan Kim <jonathan.kim@amd.com>
Change-Id: I60f3c166646f05838fec208ac2f59bba998c63f8


[ROCm/ROCR-Runtime commit: dd56b38c2f]
2023-08-08 15:59:35 -04:00
David Yat Sin b5f6c688b6 Keep libdrm device_handle on older libdrm
Even if the version of libdrm older and does not support the
amdgpu_device_get_fd function, the device_handle stored in
amdgpu_handle[] is still valid and can be returned via
hsaKmtGetAMDGPUDeviceHandle.

Change-Id: I024a3e82e6cfebac5577aefe359b067746c4023e


[ROCm/ROCR-Runtime commit: 66b66e42cd]
2023-08-01 10:52:26 -04:00
Jonathan Kim 72bd0f3a8d libhsakmt: add debug trap thunk call for testing
Add generic thunk call for debug testing that assumes
caller populations trap arguments correctly.

Signed-off-by: Jonathan Kim <jonathan.kim@amd.com>
Change-Id: I33a0bc66ca77e29f5b663d4bfe73f8684df8bfb6


[ROCm/ROCR-Runtime commit: aaab019960]
2023-07-26 10:29:27 -04:00
Alex Sierra 6fb53cdb1b src: add debug API to support GPU core dump
Functions to API added to extract the following information from KFD
Runtime information, device info and queues snapshot.

Signed-off-by: Alex Sierra <Alex.Sierra@amd.com>
Change-Id: If995ecc54497ab61189bb0f209c64af0bbb0f56f


[ROCm/ROCR-Runtime commit: 0cbf26c148]
2023-06-26 18:58:15 +00:00
Alex Sierra b5ba77994a add hsaKmtGetRuntimeCapabilities API
Queries for runtime capabilities after its being enabled

Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Change-Id: I098c0e9862c0c1d5e304b111cdc281c0ccd09691


[ROCm/ROCR-Runtime commit: 5e0a32d7b3]
2023-06-26 18:58:15 +00:00
James Zhu 498b718e83 libhsakmt: add event age tracking
Keeping last signaled event age to avoid race conditions
for HSA_EVENTTYPE_SIGNAL when event age init value is non-zero.

Change-Id: Ifb9a11a6868e5762a9f92f579e45a0a2c8fa1017
Signed-off-by: James Zhu <James.Zhu@amd.com>


[ROCm/ROCR-Runtime commit: a0cbf90b90]
2023-06-10 11:41:50 -04:00
Alex Sierra 6998fcee45 libhsakmt: include changes for upstream debugger API
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Change-Id: Id296e13dff431c7a151c5aae0b93412b1e116467


[ROCm/ROCR-Runtime commit: 728162c2c8]
2023-06-02 15:56:19 -04:00
Kent Russell c11b1022f1 fmm.c: Fix possibly initialized variable usage
If we end up in the first if clause, aperture_base is not set, unlike
the other 2 clauses. Initialize it to NULL at declaration time, and only
change its value in the final else clause, where we set it to
aperture->base

Change-Id: I2bf44dc93cae8a03e66f41cedd85d57be2115bba
Signed-off-by: Kent Russell <kent.russell@amd.com>


[ROCm/ROCR-Runtime commit: 718d95de77]
2023-05-30 15:46:14 -04:00
Xiaogang Chen 682173c851 libhsakmt: allow gpu nodeid arrary is null and number of gpu is zero.
Allow hsaKmtRegisterGraphicsHandleToNodes parameters NodeArray be null
and NumberOfNodes be zero at same time. It is the case we want the imported
buffer not be registered by kfd. Set gpu_id_array = NULL explicitly to avoid
free uninitialized gpuid array.

Report: Yat Sin, David<David.YatSin@amd.com>
Signed-off-by: Xiaogang Chen<Xiaogang.Chen@amd.com>
Change-Id: I3babc1160c9573e38dd11d81965c8de2b70cae2e


[ROCm/ROCR-Runtime commit: f6183f937e]
2023-05-29 00:15:14 -04:00
Xiaogang Chen ebce4177ad libhsakmt: have hsaKmtMapMemoryToGPU return same value as fmm_map_to_gpu.
Have hsaKmtMapMemoryToGPU return same value as fmm_map_to_gpu to keep consistency.

Signed-off-by: Xiaogang Chen<Xiaogang.Chen@amd.com>
Change-Id: Ifabb72301e1d5a6c1310973bb1321714e12a1fa6


[ROCm/ROCR-Runtime commit: 7e4e57ae5f]
2023-05-29 00:15:14 -04:00
Xiaogang Chen dd8954e83e libhsakmt: query/use render node fds that libdrm uses.
Query render node fds that libdrm uses for current process and
use them at Thunk if available.

v2: avoid naming conflict with amdgpu_device_get_fd from amdgpu.h

Signed-off-by: Xiaogang Chen<Xiaogang.Chen@amd.com>
Change-Id: Id7288c03730f4a4c9c3644e37ca4725fec71a471


[ROCm/ROCR-Runtime commit: ac1db60fc2]
2023-05-29 00:15:14 -04:00
Xiaogang Chen 6800fbec43 libhsakmt: add NodeId at HsaGraphicsResourceInfo.
Return GPU NodeId that exported the DMA buffer from amdgpu graphic driver
at fmm_register_graphics_handle.

Signed-off-by: Xiaogang Chen<Xiaogang.Chen@amd.com>
Change-Id: Iaeccce6e6d0b7e27f10b15ed89d1b5310d03d44b


[ROCm/ROCR-Runtime commit: 9bebb276be]
2023-05-29 00:15:14 -04:00
Xiaogang Chen eeec387ca2 libhsakmt: add DMABuf import without address allocation.
When gpu map info is not provided import DMABuf without VA assigned.

Signed-off-by: Xiaogang Chen<Xiaogang.Chen@amd.com>
Change-Id: I996ab4eb46977af5064126529c28a8bf20a67292


[ROCm/ROCR-Runtime commit: 989c6c617c]
2023-05-29 00:15:14 -04:00
Xiaogang Chen 4d6b75d857 libhsakmt: support allocating a fixed address at mmap_aperture.
When HsaMemFlags.ui32.FixedAddress=1 allocate fixed address at mmap_aperture.

Signed-off-by: Xiaogang Chen<Xiaogang.Chen@amd.com>
Change-Id: I1f3b532ec3c1a4fb0962126a0bd56441abaf6a9c


[ROCm/ROCR-Runtime commit: d2a37894bb]
2023-05-29 00:15:14 -04:00
Xiaogang Chen 038916c727 libhsakmt: update HsaPointerInfo for address-only allocated VRAM.
Signed-off-by: Xiaogang Chen<Xiaogang.Chen@amd.com>
Change-Id: Ib88b34dff772997d2b2e5f3c7e333cef3092ef56


[ROCm/ROCR-Runtime commit: 11ac57d293]
2023-05-29 00:15:14 -04:00
Xiaogang Chen b4b03aca20 libhsakmt: support vram-only and VA-only alloc/free.
Signed-off-by: Xiaogang.Chen <Xiaogang.Chen@amd.com>
Change-Id: I47cf53642d2ea197c08b20e84d7cae04b2d431e0


[ROCm/ROCR-Runtime commit: 0138487aa4]
2023-05-29 00:15:14 -04:00
Xiaogang Chen ee0c668706 libhsakmt: add/init a new manageable_aperture_t from NON_CANONICAL space.
This new manageable_aperture_t is used for VRAM allocation-only and
VA allocation-only.

Signed-off-by: Xiaogang Chen<Xiaogang.Chen@amd.com>
Change-Id: I3866ef9d35386d6aef7b6934ac8d4a89ef843b50


[ROCm/ROCR-Runtime commit: 0a2989083b]
2023-05-29 00:15:14 -04:00
Xiaogang Chen 51392afedb libhsakmt: Revert "libhsakmt: Update FD creation logic"
This reverts commit 89ce41694f.
Current amdgpu exposes one render node for one gpu node/partition,
revert to previous way to open render node at Thunk.

Signed-off-by: Xiaogang Chen<Xiaogang.Chen@amd.com>
Change-Id: I436be74f8e872a7ab5c4a1420b4ea884f5a00e57


[ROCm/ROCR-Runtime commit: cc4fb2d1a9]
2023-05-29 00:15:14 -04:00
Bing Ma a868d0972b libhsakmt: Add support functions for ASAN
Add support functions to remap the first page of device memory (GPU/GTT)
to share host ASAN logic.

Signed-off-by: David Yat Sin <David.YatSin@amd.com>
Change-Id: I4c27d5417ba80a172dccb0a079a597c5dc1c8f85


[ROCm/ROCR-Runtime commit: 1e6d728730]
2023-05-17 13:38:19 -04:00
xinhui pan a945a9824e thunk: Fix and optimise for pointer range search
Previous code might fail to get the correct ln node. And trigger extra
walk through of the tree. Fix it.

While walking through the tree, better to search from right to left as
the node->start likely close to *address*.

Change-Id: If86ddf73e59a1eb88225d1ea90797818e8165488
Signed-off-by: xinhui pan <xinhui.pan@amd.com>


[ROCm/ROCR-Runtime commit: 77761836ae]
2023-04-20 19:36:29 -04:00
Jesse Zhang 76c0c340f9 libhsakmt: Add compute core check for APU
We should check compute core instead of cpu core,
in order to exclude the case of APU.

Signed-off-by: Jesse zhang <jesse.zhang@amd.com>
Change-Id: I2ec2a6807f51f49f80e0e500f5d9af81c2efae37


[ROCm/ROCR-Runtime commit: 4d54d6e706]
2023-04-17 09:34:37 +08:00
Graham Sider d8960d6b57 libhsakmt: Mask stepping version for GC 9.4.3 checks
GC 9.4.3 to set gfx target version to 9.4.x dependent on revision and
capabilities. Due to this, where applicable, mask off the gfx target
stepping version and only check major/minor version (9.4). There are no
collisions due to this change since GC 9.4.3 is the only ASIC that uses
gfx target version 9.4.x.

Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I72803e594c421f054d18ccfa7e92c507128fa5be


[ROCm/ROCR-Runtime commit: 831d1ad352]
2023-04-14 12:03:23 -04:00
Graham Sider 543fe60c96 libhsakmt: Fix queue destroy SVM path free size
Use q->total_mem_alloc_size for munmap in SVM codepath of free_queue.

Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I2fecaa1ddb337b1fe71f9cbba45a0c9467eff0c0


[ROCm/ROCR-Runtime commit: ae659e5427]
2023-04-14 10:03:38 -04:00
Mukul Joshi dc0d800908 libhsakmt: Fix memory leak on queue destroy for GFX9.4.3
Currently, on queue destroy, context save restore memory is freed
only for a single XCC. Instead, we need to free the entire context
save restore memory, which was allocated for all XCCs.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Change-Id: I51ebb12fa8d5ebed41979d68e74f7c5392dca062


[ROCm/ROCR-Runtime commit: a713fb766e]
2023-04-14 10:03:38 -04:00
David Belanger 7f91f54b27 libhsakmt: EOP Removal
Do not allocate the EOP buffer when not required.

Signed-off-by: David Belanger <david.belanger@amd.com>
Change-Id: I1664a3f0a882219a72278174006cdb8d46fd4f5e


[ROCm/ROCR-Runtime commit: 252a2cf959]
2023-04-14 10:03:38 -04:00
Graham Sider 89ce41694f libhsakmt: Update FD creation logic
In multi-partition modes, e.g. CPX, we want to create new file
descriptor despite using the same render node. Update
open_drm_render_device to use a gpu_id to fd map partitioned by render
node. Different gpu_id's requesting the same render node will be added
to that render node's map list for fetching its fd. Different gpu_id's
requesting different render nodes as well as the same gpu_id's
requesting the same render node will behave as they did previously.

Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Ie153d42355d4d75b1c6ba6ff40fac3295bc87009


[ROCm/ROCR-Runtime commit: fd48f14ceb]
2023-04-13 15:25:09 -04:00
Mukul Joshi 0f7cfe5e4b libhsakmt: Update context save handling for multi XCC
Allocate debug area big enough for all XCCs in the partition. Also, fix
the cu_num calculations as driver now reports cu_num as the total number
of CUs in the partition.

Signed-off-by: Mukul Joshi <mukul.joshi@amd.com>
Change-Id: I6e80d57196b770bb3c2506bc58cb366c0046084b


[ROCm/ROCR-Runtime commit: 97a669a979]
2023-04-13 15:25:09 -04:00
Graham Sider ea4e2a82bb libhsakmt: Add Aqua Vanjaram support
Add gfx version for VGPR size per CU calc, add FAMILY_AV to KfdFamilyId,
add blacklist filter to kfdtest.exclude.

Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I9b8072e45f4d497e0a8fd3f8f97f1425238e8b42


[ROCm/ROCR-Runtime commit: 6be4461a0d]
2023-04-13 15:25:09 -04:00
Alex Sierra e4c4b6369d libhsakmt: query svm info from userptrs at fault events
Get more debug information about user pointers that were registered
through SVM API, and triggered by memory exception events.
A new kfdtest with this use case was also included inside
KFDExceptionTest.

Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Change-Id: I0ef4929afe0625b9b5cbbbebef11ede66dda60ab


[ROCm/ROCR-Runtime commit: 2a1d6ee8b5]
2023-03-22 13:34:02 -05:00
Alex Sierra 9d8a548b17 src: use SVM mechanism to register userptr memory
Register and map userptrs through Shared Virtual Memory(SVM) API at
the Kernel level when available. Using this approach, performance
will be improve as register/unregister memory will not trigger any
system call to KFD driver.

Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Change-Id: I3726b4b5e1c6a52a83786fbe0af6322eb29ae7c9


[ROCm/ROCR-Runtime commit: 63c8cf115a]
2023-03-22 13:33:35 -05:00
Felix Kuehling caf8b70da7 libhsakmt: Implement dmabuf export for RDMA
Implement hsaKmtExportDMABufHandle, which can be used for a new
upstreamable RDMA solution. It exports a DMABuf handle for an arbitrary
virtual address along with the offset of the address within the
allocation. It also checks that the size of the intended export does
not exceed the allocation.

This uses the new AMDKFD_IOC_EXPORT_DMABUF, which requires KFD ioctl
API version 1.12.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: Ie5fdb1f73ab3c7fa36c315ce326b1fb89eacc8b6


[ROCm/ROCR-Runtime commit: 332f59eb2a]
2023-02-27 14:44:11 -05:00
David Yat Sin 3d2f3991f1 Fix for unitialized variables
Change-Id: Ie8a004db699248d0cde4213077520ea503754399


[ROCm/ROCR-Runtime commit: 53d53655d7]
2023-02-14 14:19:31 +00:00
David Yat Sin 59195c9478 Fix unitialized variable warning in valgrind
Change-Id: I91e70d67671a8f7289b734407011380b6b97238a


[ROCm/ROCR-Runtime commit: fb8f42233d]
2023-02-09 17:35:53 -05:00
Xiaogang Chen 2fb44725df libhsakmt: Correct reporting of Shader Engines number.
The Shader Engines number should be shadder array_count divided by simd_arrays_per_engine
not array_count.

Signed-off-by: Xiaogang Chen<Xiaogang.Chen@amd.com>
Change-Id: I808d1fedd6b9843500719e902ecf759f5668a7d1


[ROCm/ROCR-Runtime commit: efcc9b275b]
2023-02-09 14:34:17 -05:00
David Belanger 868a9fe9a5 Revert "libhsakmt: Disabled allocation of CWSR with SVM for GFX11."
This reverts commit 1ba59d64e1.

Change-Id: I05bf82266f563c63c0b794a24b0926e7652ce42d
Signed-off-by: David Belanger <david.belanger@amd.com>


[ROCm/ROCR-Runtime commit: 0eb0bae38b]
2023-01-25 10:48:46 -05:00
David Belanger dbf94b7dd3 libhsakmt: Fixed VGPR memory size for GFX11.0 and GFX11.1.
Fixed VGPR memory size, size was too small for some GPU, causing a memory overflow.
Refactored macro code into a function.
Thanks to Jay Cornwall for locating the problem and proposing the fix.

Change-Id: Iffedea1c4f341967f02c56d810ff048225b02c16
Signed-off-by: David Belanger <david.belanger@amd.com>


[ROCm/ROCR-Runtime commit: a847a7b80e]
2023-01-25 10:45:44 -05:00
David Belanger 1ba59d64e1 libhsakmt: Disabled allocation of CWSR with SVM for GFX11.
This is a temporary work around for GPU hang issues observed on GFX11.

Change-Id: I98fbedbbd1c51fe402c2116b35ca548931a390c9
Signed-off-by: David Belanger <david.belanger@amd.com>


[ROCm/ROCR-Runtime commit: b25867c4b8]
2023-01-11 17:28:31 -05:00
Eric Huang 54e3e5ab8f Revert "libhsakmt: Remove unnecessary CPU unmap"
This reverts commit 1bb6d872ac.

It causes a regression in pytorch benchmark.

Change-Id: I96173dbd061cf38d6f451c02cb181ae51b7f625e
Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>


[ROCm/ROCR-Runtime commit: 505287412f]
2023-01-06 17:16:40 -05:00
Alex Sierra d1bbeac5fe Revert "src: use SVM mechanism to register userptr memory"
This reverts commit ea19fbb646.
There are some openMP issues that were introduced after SVM userptr
feature was added.

Signed-off-by: Alex Sierra <Alex.Sierra@amd.com>
Change-Id: I7ef87c5232a3bcbe594c743fa4b4958601845ba5


[ROCm/ROCR-Runtime commit: f2bda56d04]
2022-12-08 17:33:51 -06:00
Alex Sierra 933292eedb Revert "libhsakmt: query svm info from userptrs at fault events"
This reverts commit a89bcd0518.
There are some openMP issues that were introduced after SVM userptr
feature was added.

Signed-off-by: Alex Sierra <Alex.Sierra@amd.com>
Change-Id: I6566c9f0d39d05ecb92f38159880763f432939a5


[ROCm/ROCR-Runtime commit: d9f86ae02b]
2022-12-08 17:33:50 -06:00
Alex Sierra f0e2e1936c Revert "libhsakmt: add env var to en/dis registration through SVM"
This reverts commit 6789a0f3bd.
There are some openMP issues that were introduced after SVM userptr
feature was added.

Signed-off-by: Alex Sierra <Alex.Sierra@amd.com>
Change-Id: Ib01046571d2c84fa0fd228ecba0dee0eae3f994d


[ROCm/ROCR-Runtime commit: 21e95a4f2a]
2022-12-08 17:33:48 -06:00
Felix Kuehling 1bb6d872ac libhsakmt: Remove unnecessary CPU unmap
This is handled by __fmm_release calling aperture_release_area.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: Ib8ed300e1734f03aeb9dfc8074897ece310b8af9


[ROCm/ROCR-Runtime commit: 7787a039bd]
2022-11-28 17:18:13 -05:00
Felix Kuehling b3db03a7d5 libhsakmt: Refactor and clean up CPU mappings
Use a common helper for CPU mappings to reduce duplicate code.
Consistently use MAP_SHARED for all render_fd mappings.
Remove double-mapping for AQL queue buffers on the CPU. This workaround
is only needed on the GPU.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: Iff86c8cc9f1e5c982614b3f11129bc2cf8cbba02


[ROCm/ROCR-Runtime commit: 73b0fb3d7c]
2022-11-28 17:18:05 -05:00