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Autore SHA1 Messaggio Data
Aryan Salmanpour d2b9d267b2 SWDEV-248499 Fix a crash when printf is used with cooperative kernels 
root cause - cooperative queue is not inserted into queuePool_ (HSA queues) of ROC device calss causing a crash when creating hostcall buffers for printf

Change-Id: I3f9aceb4e5fe6a7c7a2a549a4bb0a3511fe02799
 2020-08-25 16:51:34 -04:00
Chauncey Hui 9110b09227 SWDEV-2 - Change OpenCL version number from 3187 to 3188 2020-08-25 03:00:04 -04:00
Laurent Morichetti f10435a1ef Add missing storeload memory fences 
There is no synchronize with relationship between the monitor micro-
lock and the onDeck microlock, so it is possible for an onDeck.load to
move above a contendersList.store, or a contendersList.load to move
above an ondeck.store.

To fix this issue a full memory fence (mm_mfence on x86) is needed
after the last store in the contendersList and onDeck critical regions.

Change-Id: I5beb7dfe0d21010c5bf00cd65d59b9c7af58e919
 2020-08-24 18:03:37 -04:00
Chauncey Hui e11ef5ecd4 SWDEV-2 - Change OpenCL version number from 3186 to 3187 2020-08-24 16:33:52 -04:00
Jason Tang c33470ab4d SWDEV-239502 - Create copyImageBuffer_ without flags 
Change-Id: Ifcb5992d58f3419635d2aca2d51f2dacd7cd466d
 2020-08-14 17:25:58 -04:00
agodavar e914f281ff SWDEV-245503 - Improve hipModuleLoad performance 
Change-Id: Icbcd37d9b4e6d79f296cc8693edf25689b19fa11
 2020-08-14 05:24:52 -04:00
Vlad Sytchenko 6780a9ac66 Remove unnecessary SVM commit 
Change-Id: I5cb887ead166401a59b0c980f29fd615b19745be
 2020-08-13 13:21:03 -04:00
Jason Tang db5a2d4c2d SWDEV-239502 - Fix image test regression 
Change-Id: Iea35fb0f1964d09a35131b4a20ac8f6f82850a8e
 2020-08-13 11:58:20 -04:00
German Andryeyev 6e69258b69 Enable prefetch async functionality 
Fix a typo with the name define, when compilation wasn't enabled.
Force CPU prefetch if system was forced in runtime

Change-Id: Id4b578f9fa44a45426fdb5d8ecb1da803aa42313
 2020-08-13 11:09:10 -04:00
Jason Tang 152a2dfb5a SWDEV-247463 - Fix regression: ocltst segfaults 
Change-Id: Iadb55ba45d6c8ade0757fd970ac4c6cde1805de3
 2020-08-09 11:28:09 -04:00
Jason Tang 7bb671fa55 Fix HSAIL build 
Change-Id: I34209b3ae0ce0eefc30e464fd7f081a0b62449b0
 2020-08-07 17:18:38 -04:00
German Andryeyev 0dc47d55d2 Sync the current queue for P2P staging 
P2P staging uses device queues for transfer, hence the current
queue must be in sync

Change-Id: I8372a60590eed9dde62cb4c67ef4df5df82a8e8d
 2020-08-07 14:36:50 -04:00
Jason Tang 6f8eaff4df Use ARCTURUS 
Change-Id: Ib25d150c9314180178d5cf00835a06e47c02c2a9
 2020-08-07 11:14:24 -04:00
Jason Tang f8f6bc16a1 SWDEV-246565 - Remove passing -msram-ecc to Comgr 
Change-Id: I1604a0014186a5779561da3ec3eefec65aff5c37
 2020-08-06 12:48:53 -04:00
Jatin Chaudhary 2f3df8e691 Adding device memory channel information 
Change-Id: I47dfa3daff97b1e3f42484dde5a4aa64244ac544
 2020-08-06 06:54:35 -04:00
Saleel Kudchadker ec73340348 Add Queue profling param and toggle for HIP 
Use signal timestamps if NDRange command takes forceProfile flag.

Change-Id: Ib7f187d781fd78a7346818afb3344a9378f4c104
 2020-08-06 03:09:53 -04:00
Anusha Godavarthy Surya 093f7fa3ca SWDEV-244600 - HIP BLIT code object needs to have reserved symbol name 
Change-Id: I8401fea5eab71c0f7414eec0666066d9553a6622
 2020-08-06 01:14:06 -04:00
Jason Tang 8ef5da00c7 SWDEV-246687 - Do not use std::vector reference as class member cuMask_ 
The current implementation creates default reference in the stack and assigns it to class member cuMasks_, so whenever the content of the stack changes, cuMask_ would change.

Change-Id: Iefab63c335d504b83c4ae90bd34ae76c6afb8f3c
 2020-08-05 16:57:36 -04:00
Chauncey Hui 6373242a03 SWDEV-2 - Change OpenCL version number from 3185 to 3186 2020-08-05 03:00:05 -04:00
German Andryeyev 91a25df04f Process cache coherency before mem dependency tracker 
Optimizaiton to remove extra syncs uncovered a bug with the cache
coherency layer, there runtime could lose the track of mem address
if coherency layer performed a sync.

Change-Id: I25647cfa4a4be9cdbd8577ff076a740bbdac79c8
 2020-08-04 16:33:18 -04:00
Vlad Sytchenko 9d0b0c32a9 Fix typo 
Change-Id: I8b659508f567afa126aeb7749b536b443935e3df
 2020-08-04 11:15:21 -04:00
Chauncey Hui 8f5698cb17 SWDEV-2 - Change OpenCL version number from 3184 to 3185 2020-07-31 03:00:03 -04:00
Vlad Sytchenko 24c1c48db7 Only enable HIP for Vega20 on non-ROCm platforms 
SWDEV-245906

All asics will still be supported for developer builds.

Change-Id: I0eac2246162d133fe63449c200d996fe05bd51bd
 2020-07-27 13:09:58 -04:00
Chauncey Hui e793de2ffa SWDEV-2 - Change OpenCL version number from 3183 to 3184 2020-07-25 03:00:03 -04:00
Payam 2067de1521 Fix 32bit warning 
Change-Id: I4c630d78f7bf23dda85ec8480bb2790864495667
 2020-07-24 13:14:37 -04:00
Chauncey Hui f779f655fd SWDEV-2 - Change OpenCL version number from 3182 to 3183 2020-07-23 03:00:04 -04:00
Tao Sang fdef6f722f Apply constexpr on global constant varaibles 
When HIP_ENABLE_DEFERRED_LOADING=0, many global variables will be
referenced but they are not initialized in that early time. The patch
will use constexpr to initialze global constant varables in compile
time.

Change-Id: I9d538b7abc6a0ce700ec3332b97fc144db5fc1ef
 2020-07-22 22:14:13 -04:00
Jason Tang 2800fc2fa3 SWDEV-232197 - Fix PAL build 
Change-Id: Iad306077cadfd8de1491ac0a188eee4802d8ce1f
 2020-07-22 17:10:03 -04:00
Jason Tang 65f4230494 SWDEV-232197 - Use TargetID for action_info_set_isa_name() 
Change-Id: I6661a2bbc2e55586c1b5029694d67cb54a4f23a6
 2020-07-22 13:47:17 -04:00
Freddy Paul 6b8ae3dd77 Align to new hsa cmake target usage. 
HIP or any ROCm component above HIP may not be calling
hsa-runtime directly. OpenCl and HIP are the two components
calling ROCclr and to bring in the transitive dependency of
thunk,ROCR,amd_comgr it is better to have the dependency
chain set correctly in the ROCclr cmake target. With this
change OpenCl or HIP should not be setting ROCR dependency
directly.

This helps to link OpenCl(libamdocl.so) link statically with
comgr,hsa,thunk.

Change-Id: I0d538b7abc6a0ce700ec3332b97fc144db5fc5ff
 2020-07-22 11:21:09 -04:00
Chauncey Hui c09b1ee0cc SWDEV-2 - Change OpenCL version number from 3181 to 3182 2020-07-22 03:00:05 -04:00
Alex Xie ce038f3163 SWDEV-241977 [ROCm QA] Random Soft hang observed while running TF and Caffe2 benchmarks 
Change-Id: I42016c11db15411b86e7b8130d6ba557bc22dbb7
 2020-07-22 02:03:48 -04:00
Jatin Chaudhary 48690f29e9 Adding AnyOrder Flag 
Change-Id: I6baaef42b98adfbc8cf2605e175ec007e008045f
 2020-07-22 00:25:04 -04:00
Tao Sang 214827defa Add numa lib detection in cmake 
If numa lib is in building system, define ROCCLR_NUMA_SUPPORT to
support numa; otherwise, don't support numa.

Change-Id: I3848d7fdec5a3813ff1edad9b71ff04372dc0b9a
 2020-07-21 14:58:56 -04:00
Matt Arsenault a9ffa384e8 Use alignas to effectively define padding and fix 32-bit build 
Change-Id: Ib318d2fe847625567de93c9268cf000ec35a921f
 2020-07-21 10:53:47 -04:00
Rahul Garg 60473ae542 Handle size 0 symbols 
Change-Id: I1629c5027ec5f9af48c8e9e0696829b844423096
 2020-07-21 10:10:36 -04:00
Jason Tang 8b7e0f3cfe SWDEV-232197 - Use HSA_ISA_INFO_NAME as the TargetID 
TargetID will be passed to LC compiler.

Change-Id: I0385634922c11d53b57ebd596047698c47bda72b
 2020-07-21 09:24:03 -04:00
Chauncey Hui 9812cf8079 SWDEV-2 - Change OpenCL version number from 3180 to 3181 2020-07-21 03:00:04 -04:00
Matt Arsenault 51f4aa305b Fix -Wunused-private-field 
Change-Id: Ib60e8dc2625c0c5e10fa109e452af0bc6174e763
 2020-07-20 11:23:18 -04:00
Chauncey Hui 92cdd43a28 SWDEV-2 - Change OpenCL version number from 3179 to 3180 2020-07-18 03:00:03 -04:00
Payam 2dc41007d7 cleanup warnings 
Change-Id: I3715fe6aa540c5a40fe2aa324c9fbeab1e67f717
 2020-07-17 14:25:52 -04:00
Chauncey Hui 0c84ce5608 SWDEV-2 - Change OpenCL version number from 3178 to 3179 2020-07-17 03:00:03 -04:00
Matt Arsenault 2f3e9afab7 Fix windows build 
Change-Id: I0c5fff636ec43d5c1daf888457f77ef214a29566
 2020-07-16 17:08:22 -04:00
Payam 94e623181b clean up warnings 
Change-Id: I5421ab90234278920e6080599bb40ffcb3eaa04d
 2020-07-16 09:36:26 -04:00
Chauncey Hui dfd78a65f2 SWDEV-2 - Change OpenCL version number from 3177 to 3178 2020-07-16 03:00:03 -04:00
Matt Arsenault dabda131bd Correct total size of Semaphore to be 64 
Change-Id: I20db76eab06fc8a0b3869348c537e7303dfa6466
 2020-07-15 16:51:19 -04:00
Matt Arsenault 5577eabcea Fix -Wmissing-braces 
Change-Id: I2394b6923c789f36e72242f4b196844cc0ee90ba
 2020-07-15 16:51:03 -04:00
Jason Tang 5e0bb5bd39 SWDEV-244000 - Print freeMem_ for memory accounting 
Change-Id: I5bbce213236a109e9aa69766d2d4d370b58d0d08
 2020-07-15 13:44:05 -04:00
German Andryeyev af1c4a5794 Disable sysmem alloc for SVM memory 
Device backend is responsible for memory allocation, including
possible HMM support.

Change-Id: I0e4e5ae3b9551790f4f85f0791cca63196cc896e
 2020-07-15 12:04:23 -04:00
Payam 55b5f5f06c Reset each thread's affinity to all avilable cpus 
reset happens at the start of the thread  SWDEV-240685

Change-Id: I6c35473bab67d02f76a8013ab9394f293c6f2b07
 2020-07-15 09:41:50 -04:00