نمودار کامیت

1163 کامیت‌ها

مولف SHA1 پیام تاریخ
Patel, Jaydeepkumar 2f3bc7f01c SWDEV-521011 - Allow max stack size as per ISA. (#73)
[ROCm/clr commit: 9e7248aa36]
2025-04-08 10:15:38 +05:30
Andryeyev, German 4c9cc6ba30 SWDEV-497841 - Add VmHeapArray support (#76)
Add VmHeapArray class to reduce the pressure on VA reservation, since
multiple memory pools can be active at the same time.

[ROCm/clr commit: e974f7fde1]
2025-04-03 21:04:18 +05:30
Patel, Jaydeepkumar b217d3a4e6 SWDEV-508632 - Align address to 2 MBs for hidden heap allocation. (#29)
[ROCm/clr commit: b5c9cbc236]
2025-04-02 16:33:29 +05:30
MartinezFernandez, Juan 966157cd5b Remove PCH code: the code related to PCH is dead and not used (#66)
cherry-pick of compute/ec/clr/+/1184122

Co-authored-by: Juan Manuel Martinez Caamaño <juamarti@amd.com>

[ROCm/clr commit: f580632174]
2025-03-28 10:36:19 +01:00
GunaShekar, Ajay aaba454bfc SWDEV-523853 - Use RecordRenderOps instead of RecordRenderOp (#97)
[ROCm/clr commit: 686dd56a4e]
2025-03-26 09:28:40 +05:30
Arandjelovic, Marko cc5124241b Revert SWDEV-512344 - Unmap all subbuffers (#26)
This reverts commit 0b69120cfcb5b4689d9f2037b1a01e274d85c20f.

[ROCm/clr commit: e7ada4effe]
2025-03-19 21:17:36 +05:30
Andryeyev, German 5c7c86f66d SWDEV-517481 - Add dynamic queue management (#37)
Enabled by defaulty. DEBUG_HIP_DYNAMIC_QUEUES controls the feature

[ROCm/clr commit: 28967982b2]
2025-03-19 11:22:50 -04:00
agunashe 4a5c6b8d82 SWDEV-513810 - APU: memory allocations threshold 0.75-->1
Needs further debugging but for now can test the change

Need to verify if this fixes all the below issues-
SWDEV-512754, SWDEV-511675, SWDEV-511055, SWDEV-504085, SWDEV-499503
Also verify original issues
SWDEV-471863, SWDEV-490991

Change-Id: Ic845f851de1b98e8ed9aa0f07afddec3858119e9


[ROCm/clr commit: f1b8ee7b7f]
2025-03-11 05:30:43 -04:00
Saleel Kudchadker c94c02a2e6 SWDEV-519596 - Avoid passing dep signal to SDMA
- For D2H cases avoid passing dependent signals to SDMA, the signals
  take a while to resolve on SDMA engine

Change-Id: I569635228af977847f201c82ca897002f8f2f4a8


[ROCm/clr commit: 78d0ff2dbc]
2025-03-07 17:37:21 -05:00
Pengda Xie 021ca96766 SWDEV-497619 - Ensure suballocSize is integer multiple of 4096
Change-Id: Iefc452d73566f58cfb63391a68c836f30d77dd6c


[ROCm/clr commit: b02b1858c0]
2025-03-07 15:36:57 -05:00
Branislav Brzak c81185cf26 SWDEV-516564 - SWDEV-512817 - Remove mentions of gfx940 and gfx941
Change-Id: Ia069fcb9c6948c3fc9a00961593c9dcc59609375


[ROCm/clr commit: c2d1776ebd]
2025-03-05 04:26:07 -05:00
Saleel Kudchadker c8f39ec2b0 SWDEV-502365 - Track last used command
- This change tries to save extra synchronization packets we may insert
  as we didnt track the completion signals for every command. We track
the current enqueued command until it exits the enqueue stage. We also
record the exit scope to know if we flushed the caches
- Handle correct release scopes and store completion signal as HW events
- Use a new finishCommand implementation to only wait for the command
  passed as the argument

Change-Id: Ie4350c5dd24f5d48dfa6ccbabd892f0544caadcc


[ROCm/clr commit: e03e4f3b5d]
2025-03-04 16:05:02 -05:00
Marko Arandjelovic 861491b824 SWDEV-512344 - Unmap all subbuffers
Since hipMemMap can be called for multiple device handles on the same virtual memory, the same is true for hipMemUnmap, meaning that virtual memory can be "partially unmapped".

This means that the unmap function can be called for a specific part of the reserved address, meaning that only the designated subbuffer should be released. If unmap is called on the entire reserved memory, then all subbuffers should be released.

The main point is that for every hsa_amd_vmem_map, there should be a corresponding hsa_amd_vmem_unmap. Otherwise, if entire memory is unmapped by a single unmap call, then HSA will report the memory as "in use" if an attempt is made to delete it.

Change-Id: I039308eafb820decfb1c09f60347f26cdad1a362


[ROCm/clr commit: 3ec1d2d2f1]
2025-03-02 13:41:48 -05:00
Saleel Kudchadker d0a7ae02cf SWDEV-513197 - Unify getBuffer implementation
- Use getBuffer/releaseBuffer in BlitManager
- Cleanup XferBuffer as we use ManagedBuffer for both reads/writes

Change-Id: I2661b85dd012763b17a38a743fec1b1d79125f67


[ROCm/clr commit: 37d606d193]
2025-02-28 12:47:51 -05:00
Saleel Kudchadker ef505c7cd8 SWDEV-513197 - Improve launch perf for Device Heap kernels
- If any kernel uses device heap, the launch needs to be preceeded by an
  init kernel, Save on the extra barrier packet launch/flush between the
init heap kernel and user kernel

Change-Id: I8ebc6246188200e5f673dc464bc76a53bcb8b7c6


[ROCm/clr commit: ca530c660b]
2025-02-27 19:17:51 -05:00
Rahul Manocha 90337103ac SWDEV-510849 - Restore pinned memory copy path
1) Create getBuffer method to return pinned host memory or staging buffer
2) for D2H path use managed buffer instead of static buffer
3) use staging buffer copy for 16KB < size < 1MB
4) use pinned memory copy for size > 1MB

Change-Id: I13d4d6ab60691bc6c7724239db1e11e23f0f3dc2


[ROCm/clr commit: 4bf634dfca]
2025-02-26 11:25:02 -05:00
Jacob Lambert 7da5718afb SWDEV-360440 - Prepare CLR dynamic Comgr load for V3
Change-Id: Iffd835056740ff10711468cc752b7b55078b9f8f


[ROCm/clr commit: 187648429b]
2025-02-26 11:22:18 -05:00
Julia Jiang 1495cc77eb SWDEV-513294 - fix regression on SVM sub-test failure in Conformance
Change-Id: Ic2449dd34a9cd2b623d5f8fbe89fd042566a56e3


[ROCm/clr commit: b7eaec76fc]
2025-02-20 15:40:23 -05:00
kjayapra-amd 010253430f SWDEV-516303 - Remove SDMA retainer logic to select the engine.
Change-Id: I818129444131825cdb87e06cb495afa3e5cdb683


[ROCm/clr commit: 1f583a6870]
2025-02-20 11:34:38 -05:00
German Andryeyev a7f3ad7867 SWDEV-515356 - Make the round-robin queue selection
- Add custom compare to the map of queues, which will help with
 the round-robin selection

Change-Id: Ie67a820bfb1a5b484a1b3edced967eed94228bb8


[ROCm/clr commit: ba8e740be4]
2025-02-20 11:09:54 -05:00
German Andryeyev f9d9b2c441 SWDEV-497841 - Add virtual memory heap
Add initial implementation of virtual memory heap with
dynamic virtual memory mapping support for memory pools.
DEBUG_HIP_MEM_POOL_VMHEAP controls the new method.

Change-Id: I8dc5be2e0f34ab472f1800f43bb6243639a5e500


[ROCm/clr commit: 296dce5570]
2025-02-20 10:55:49 -05:00
German Andryeyev 6f2a603277 SWDEV-497619 - Allocate extra space in CB
Compute doesn't support IB chaining, but RGP may collect
perf counters, which require more space in CB.
Increase CB size if RGP is enabled.

Change-Id: Iaa0a620ead8541a679b0dfe5e5711af5afdba545


[ROCm/clr commit: 63cf3057ba]
2025-02-20 10:40:09 -05:00
agunashe 52a1f5dbf7 SWDEV-507967 - Deprecate gfx9, gfx8, gfx7 on Windows
PAL_CLIENT_INTERFACE_MAJOR_VERSION from 872 --> 910

Change-Id: I03dfa2924ccdae4c2f13f09d5f34ee58298e1343


[ROCm/clr commit: ea804e16f8]
2025-02-17 02:59:41 -05:00
Vladana Stojiljkovic 7078aab436 SWDEV-510059 - Format CU mask properly
Change-Id: I80e94b4f3ea25f6988fc06d83aeb398e81ccddd1


[ROCm/clr commit: 061c5d877f]
2025-02-13 11:02:56 -05:00
Aidan Belton-Schure 4b4a35b86b SWDEV-508279 - Improve HIP event profiling
There are 2 functional changes to this patch:
* Use GPU timing for internal markers for HIP.
* Measure CPU time closer to GPU timer, to reduce delta between GPU/CPU timestamp measurements.

There are some smaller non-functional updates:
* waifForFence -> waitForFence typo
* Remove unused drmProfiling

Change-Id: I4c5fa600a842ab60e454888779edcac8449a902a


[ROCm/clr commit: 179801a750]
2025-02-13 04:15:40 -05:00
kjayapra-amd 1f648c7d94 SWDEV-511672 - Special case the Remote USWC memory usage for HIP, if the alloc size is large.
Change-Id: I524c1402b249cedfd58b56f494caa2ac057e1623


[ROCm/clr commit: cf6aabb823]
2025-02-11 06:42:18 -05:00
Saleel Kudchadker 71e1a0b10d SWDEV-504494 - Further copy improvements
- Fix regression for D2H pinned copies which adds systemscope release.
- Skip cpu wait for D2H unpinned copies as we can pass the signal of the
  barrier to rocr copy.
- Fix an old bug in sdmaEngineRetainCount_ logic
- Improve logging

Change-Id: If074bddb05564b15949b0d5f9bf12acd3692174e


[ROCm/clr commit: 4c95ee5e1e]
2025-02-11 00:55:52 -05:00
victzhan 7cd780c1cb SWDEV-485042 - Remove -I option passed into comgr when file type is not FILE_TYPE_ASM_TEXT
Change-Id: If8e469f881651f7b3dae364e8182ef1ba6f3a0d1


[ROCm/clr commit: ca35d93672]
2025-02-10 11:47:04 -05:00
Ioannis Assiouras 6a00aa8d61 SWDEV-508435 - Added a fix for double free of hsaImageObject
Change-Id: I9397f7c9dbbad7c249b359155df312cb920eba6c


[ROCm/clr commit: d05ecea253]
2025-02-05 22:21:24 +00:00
Ioannis Assiouras c0b728fcad SWDEV-513323 - Fix for BatchMemOp on devices with no image support
BatchMemop should be positioned before the image support kernels
because the total number of kernels is determined by BlitLinearTotal,
when there is no image support on the device.

Change-Id: I8e53caf744ba54259ac04bad1762eef21806f3f2


[ROCm/clr commit: 3e01da3dac]
2025-02-05 04:45:22 -05:00
taosang2 27e87ccca6 SWDEV-513458 - Add gfx950 target ID
Add gfx950 target ID

Cherry-picked
https://gerrit-git.amd.com/c/compute/ec/clr/+/997678
https://gerrit-git.amd.com/c/compute/ec/clr/+/1063519

Change-Id: I0228c5e87ceec366983fd4afb1c25e7f8161c2c2


[ROCm/clr commit: 29cc394510]
2025-02-04 18:30:23 -05:00
kjayapra-amd 892d7bb064 SWDEV-488290 - Remove Stream to Engine logic and rely on engine query status HSA API.
Change-Id: I469ab6679360c8ee8d4ee515678a8aa8d4578ebf


[ROCm/clr commit: cc62a82347]
2025-02-04 13:00:16 -05:00
Juan Manuel Martinez Caamaño 5356f13902 SWDEV-132637: Remove OpenCL cl_khr_depth_images workaround that is not needed anymore
The cl_khr_depth_images associated macro definition is defined twice in
the compiler: in opencl-c.h and automatically by the compiler deduced
from the cl-ext list. These two co-exist and there is no need to remove
cl_khr_depth_images from the cl-ext list.

If we remove cl_khr_depth_images from the cl-ext list, and we do not
include opencl-c.h the macro is not defined.

This fixes conformance test ./test_compiler compiler_defines_for_extensions
when using Comgr with -include opencl-c-base.h -fdeclare-opencl-builtins
without including opencl-c.h.

Before we got the error `ERROR: Supported extension cl_khr_depth_images
not defined in kernel`

This change is needed to eventually get rid of the opencl-c.pch that is embedded in comgr, and that makes implementing a compilation cache in comgr hard.

Change-Id: I76497874ebe7163966420d4ac23a0788b93a36fd


[ROCm/clr commit: 8c9e6d0fa5]
2025-02-04 03:14:31 -05:00
Jimbo Xie cc229f251f SWDEV-504383 - Cleaned up kForcedTimeout10us and removed IsHwEventReadyForcedWait
Also removed active_wait_timeout

Change-Id: I7a429f003c09a4df267b5c0983050704260094c6


[ROCm/clr commit: 4872b420c9]
2025-01-31 14:40:18 -05:00
taosang2 40df900647 SWDEV-501963 - Add missing codes for gfx950
Cherry-pick https://gerrit-git.amd.com/c/compute/ec/clr/+/1162997

Change-Id: I6b3c6bf55c61cffd43cd6f17b75998f751b75723


[ROCm/clr commit: 32daa8f384]
2025-01-31 14:34:49 -05:00
kjayapra-amd 712987ed08 SWDEV-509280 - Combine multiple definitions of callbackQueue into a single function.
Change-Id: Ibbb56136bec2beed71c202d75e8aec9e82640a4e


[ROCm/clr commit: 0324014710]
2025-01-30 15:58:11 -05:00
Saleel Kudchadker d0656c944b SWDEV-504494 - Resolve signal dependencies
- Resolve signal dependencies for barrier value packet if there are > 1
  depenent signals. Barrier Value packet accounts for only 1 dep signal
- Better log

Change-Id: Ia506ad5d80b91d598f92e7b539f41756e9b4b64b


[ROCm/clr commit: 2d450e8b06]
2025-01-29 19:49:02 +00:00
Jimbo Xie 0a30936c67 SWDEV-510869 - add gfx1153 id
Change-Id: I36d39a1db2392990ad9b01d70676c3c986435707


[ROCm/clr commit: 4abedf2a0e]
2025-01-28 18:15:46 -05:00
German Andryeyev ae379965dd SWDEV-459826 - Add a crash dump for a failed queue
The logic can analyze the AQL queue state and
find a failed AQL packet with the kernel's name

Change-Id: I1a478fa2c25462cd07a194784958bdf22454b897


[ROCm/clr commit: ea0b092af8]
2025-01-28 14:27:46 -05:00
Saleel Kudchadker c6eef97e3e SWDEV-504494 - Set active engine for SDMA
Change-Id: I4cec84e71903c5813a7063e8b9ff1ea4473f4720


[ROCm/clr commit: d208e8052f]
2025-01-27 17:54:36 -05:00
Ioannis Assiouras 8169855390 SWDEV-510319 - Fixed random segfaults in graph tests
This change fixes random segfaults in graph tests that
are seen after the change make internal callbacks non-blocking.
The callback thread that decreases the GraphExec ref count
may now run after the runtime shutdown. This can cause a segfault
because the hip::device that is accessed in GraphExec destructor
is already destroyed during runtime shutdown. This patch ensures
that the hip::device object  stays alive until after the
callback thread completes.

Change-Id: I75a6ac01f27a0b2250bbd10ed389ebfb322927af


[ROCm/clr commit: 21c223f8df]
2025-01-25 09:54:15 -05:00
Saleel Kudchadker ae7e2ecb85 SWDEV-510186 - Improve logging of kernel names
- Demangle kernel names in logs

Change-Id: I9aa58e8c109becb45ef7fc747d991bd657c4190a


[ROCm/clr commit: 9b7e0ad48a]
2025-01-24 11:43:02 -05:00
taosang2 590465543d SWDEV-507969 - Fix wrong VGPRs for some devices
Change-Id: Ia8fc19564272e2c7171d991376bf896a99085a97


[ROCm/clr commit: 799e54aa0d]
2025-01-22 10:11:47 -05:00
Jatin Chaudhary 0795f00a14 SWDEV-341217 - Initial work to use SPIRV in HIP
Change-Id: If5c09b5e86b498e7ac5eb05adf28cb7a1fac8101


[ROCm/clr commit: 6a5d19059d]
2025-01-20 03:54:23 -05:00
Aidan Belton-Schure dc2fa93f37 SWDEV-482851 - Do not release last suballocator chunk
Change-Id: Ib28dc9df68e454ee0c0c699c1ff17588fd55f802


[ROCm/clr commit: 451b0ce768]
2025-01-13 10:14:40 -05:00
Daniel Livingston 50387f6eb5 SWDEV-489003 - [Ubertrace] OCL/HIP profiles are missing event instrumentation
Adds UberTrace support for pre-dispatch markers and barrier begin/end markers.

Moves shared definitions out of palgpuopen.hpp into shared header
palcapturemgr.hpp.

Change-Id: I9f464c689e7ff12c54eca043fc1ad65e1836a64f


[ROCm/clr commit: 541c449ce2]
2025-01-10 11:28:52 -05:00
Anusha GodavarthySurya 08c92f4793 SWDEV-480209 - Make internal callbacks non-blocking
Change-Id: Ic918d08f341abfd9a7c167d09f9c723cdc43157f


[ROCm/clr commit: 683a942364]
2025-01-10 02:16:11 -05:00
Saleel Kudchadker 16f14e4b00 SWDEV-504494 - Use system scope for D2H
- When using shader copy, make sure to use release scope for the AQL
  packet. This is a potential bug but is hidden as hipMemcpyAsync always
needs synchronization(which inserts a barrier with release scope). For
hipMemcpy we use a barrier packet to make sure its blocking. Eitherways
a barrier gets always used and hides in some ways a potential bug.

Change-Id: I57fb7f769c3179e76d712471c0905104c801d7ba


[ROCm/clr commit: c9dd95bf6c]
2025-01-10 00:34:08 -05:00
Evgenii Averin ef2a812d0a SWDEV-505769 - Fix typo
Change-Id: I2d3f65ed68157718c4439a9da7d2dcdfcbb9f93d


[ROCm/clr commit: b62995ce1a]
2025-01-08 21:31:17 -05:00
Sourabh Betigeri 36f3d7647c SWDEV-505971 - Fix size mismatch of count type to uint32_t
Change-Id: Ie526f828f816e6681ef1735d5edb2db895dace57


[ROCm/clr commit: f5b2516f5d]
2025-01-08 12:47:36 -05:00