AI/rocm-systems
2
0
Форкнуть 0
Код Задачи Запросы на слияние Действия Пакеты Проекты Релизы Вики Активность
64 643 коммитов 3 Ветки 0 Теги
dbb48c3e336939e2dbbb3d2eefaddc1bca6f1c47
Граф коммитов

64643 Коммитов

This Branch
This Branch
Все ветки
Автор SHA1 Сообщение Дата
Brzak, Branislav ee2d4a0358 SWDEV-518962 - Match hipCtxGetApiVersion signature with Cuda (#327) 2025-05-26 20:28:22 +05:30
Brzak, Branislav 159f1d3d93 SWDEV-518962 - Match hipCtxGetApiVersion signature with Cuda (#81) 
[ROCm/hip commit: c80b7f7cb1]
 2025-05-26 20:28:04 +05:30
Brzak, Branislav c80b7f7cb1 SWDEV-518962 - Match hipCtxGetApiVersion signature with Cuda (#81) 2025-05-26 20:28:04 +05:30
Castillo, Juan eaa2000af5 [SWDEV-523359] fan_read_write: Add set fan speed validation check. (#61) 
[SWDEV-523359] fan_read_write: Add set fan speed validation check.
- Handled NOT_SUPPORTED status which previously caused rsmitst to false fail
- Added continute statement to proceed with rest of FanReadWrite test.
- fixed spacing line 140

Signed-off-by: Juan Castillo <juan.castillo@amd.com>

[ROCm/rocm_smi_lib commit: ac31c6e576]
 2025-05-26 09:54:41 -05:00
Castillo, Juan ac31c6e576 [SWDEV-523359] fan_read_write: Add set fan speed validation check. (#61) 
[SWDEV-523359] fan_read_write: Add set fan speed validation check.
- Handled NOT_SUPPORTED status which previously caused rsmitst to false fail
- Added continute statement to proceed with rest of FanReadWrite test.
- fixed spacing line 140

Signed-off-by: Juan Castillo <juan.castillo@amd.com>
 2025-05-26 09:54:41 -05:00
Lytovchenko, Danylo 436c25aa47 SWDEV-12345 Add PR title and commit message validation (#349) 
[ROCm/clr commit: 7f6020d599]
 2025-05-26 15:13:31 +02:00
Lytovchenko, Danylo 7f6020d599 SWDEV-12345 Add PR title and commit message validation (#349) 2025-05-26 15:13:31 +02:00
Lytovchenko, Danylo e3a6d00822 SWDEV-123456 - Add PR description validation (#354) 
[ROCm/clr commit: e12c7200b9]
 2025-05-26 15:13:15 +02:00
Lytovchenko, Danylo e12c7200b9 SWDEV-123456 - Add PR description validation (#354) 2025-05-26 15:13:15 +02:00
Lytovchenko, Danylo 600f07f580 SWDEV-123456 - add keywords scan (#395) 
[ROCm/clr commit: d42622b4c0]
 2025-05-26 15:12:43 +02:00
Lytovchenko, Danylo d42622b4c0 SWDEV-123456 - add keywords scan (#395) 2025-05-26 15:12:43 +02:00
Dittakavi, Satyanvesh 104cc15010 SWDEV-418904 - Link the hiprtc tests with hiprtc library explicitly (#201) 
[ROCm/hip-tests commit: a837598032]
 2025-05-26 18:42:10 +05:30
Dittakavi, Satyanvesh a837598032 SWDEV-418904 - Link the hiprtc tests with hiprtc library explicitly (#201) 2025-05-26 18:42:10 +05:30
Dittakavi, Satyanvesh f3da3d39fe SWDEV-508973 - Fix the catch tests failures due to change in kernel validation error codes to match CUDA (#198) 
[ROCm/hip-tests commit: 1be3aa8283]
 2025-05-26 18:41:58 +05:30
Dittakavi, Satyanvesh 1be3aa8283 SWDEV-508973 - Fix the catch tests failures due to change in kernel validation error codes to match CUDA (#198) 2025-05-26 18:41:58 +05:30
Harrymanoharan, Jessey 1868e4e595 SWDEV-531711 - Enable skipping host side abort when GPU crashes. (#380) 
Co-authored-by: kjayapra-amd <karthik.jayaprakash@amd.com>

[ROCm/clr commit: 3930ae2524]
 2025-05-26 17:52:02 +05:30
Harrymanoharan, Jessey 3930ae2524 SWDEV-531711 - Enable skipping host side abort when GPU crashes. (#380) 
Co-authored-by: kjayapra-amd <karthik.jayaprakash@amd.com>
 2025-05-26 17:52:02 +05:30
Flora Cui e884650952 rocrtst: performance::memory_async_copy test fix on DXG 
Signed-off-by: Flora Cui <flora.cui@amd.com>
 2025-05-26 15:01:27 +08:00
Flora Cui 4360679cb7 rocrtst: performance::memory_async_copy test fix on DXG 
Signed-off-by: Flora Cui <flora.cui@amd.com>


[ROCm/ROCR-Runtime commit: e884650952]
 2025-05-26 15:01:27 +08:00
Amber Lin 31d51acb26 kfdtest: blacklist KFDSVMEvictTest.QueueTest 
Temporarily blacklist KFDSVMEvictTest.QueueTest on gfx950

Signed-off-by: Amber Lin <Amber.Lin@amd.com>
 2025-05-23 01:22:11 -04:00
Amber Lin 9c6828647b kfdtest: blacklist KFDSVMEvictTest.QueueTest 
Temporarily blacklist KFDSVMEvictTest.QueueTest on gfx950

Signed-off-by: Amber Lin <Amber.Lin@amd.com>


[ROCm/ROCR-Runtime commit: 31d51acb26]
 2025-05-23 01:22:11 -04:00
Bhardwaj, Gopesh abf3f869e9 Making ROCTx API doxygen generated document more readable (#385) 
* Making ROCTx API doxygen generated document more readable

* fixing build

* Fix linking errors

* Fixing header

* Fixing Topics and Types

* doxygen configuration fixes

* Fixing build

* Fix unnecessory doc parsing warnings

* formatting and linting fixes

* rebasing SDK modular PR

* Fixing missing line

* Fixing ROCtx documentation after merge

* Removing flake changes

* changed back WARN_IF_DOC_ERROR to Yes

[ROCm/rocprofiler-sdk commit: b48fa532bc]
 2025-05-22 18:08:55 -05:00
Bhardwaj, Gopesh b48fa532bc Making ROCTx API doxygen generated document more readable (#385) 
* Making ROCTx API doxygen generated document more readable

* fixing build

* Fix linking errors

* Fixing header

* Fixing Topics and Types

* doxygen configuration fixes

* Fixing build

* Fix unnecessory doc parsing warnings

* formatting and linting fixes

* rebasing SDK modular PR

* Fixing missing line

* Fixing ROCtx documentation after merge

* Removing flake changes

* changed back WARN_IF_DOC_ERROR to Yes
 2025-05-22 18:08:55 -05:00
David Yat Sin da2607024b rocr: Perform memcpy for small code-object loads 
On large BAR systems, for small-sized code-objects, we get performance
using direct memcpy due to latencies when doing the blit-copy.
 2025-05-22 18:39:19 -04:00
David Yat Sin 342e478e7d rocr: Perform memcpy for small code-object loads 
On large BAR systems, for small-sized code-objects, we get performance
using direct memcpy due to latencies when doing the blit-copy.


[ROCm/ROCR-Runtime commit: da2607024b]
 2025-05-22 18:39:19 -04:00
David Yat Sin e969e01f54 rocr: Perform range based cache invalidates 
Invalidate only the address range that covers the newly copied
code-object. This avoids invalidating I$ for old code objects and thus
might increase I$ hit rate.
 2025-05-22 18:39:19 -04:00
David Yat Sin 9c5bb61708 rocr: Perform range based cache invalidates 
Invalidate only the address range that covers the newly copied
code-object. This avoids invalidating I$ for old code objects and thus
might increase I$ hit rate.


[ROCm/ROCR-Runtime commit: e969e01f54]
 2025-05-22 18:39:19 -04:00
Vaddireddy, Sushma 4d29b74750 Unit test fix - calculate aggregate sum based on instance size (#410) 
* Unit test fix- calculate aggregate sum based on instance size

* Update GRBM instance size

* aggregate sum

---------

Co-authored-by: Sushma Vaddireddy <svaddire@amd.com>

[ROCm/rocprofiler-sdk commit: 7045a4c689]
 2025-05-22 13:35:38 -07:00
Vaddireddy, Sushma 7045a4c689 Unit test fix - calculate aggregate sum based on instance size (#410) 
* Unit test fix- calculate aggregate sum based on instance size

* Update GRBM instance size

* aggregate sum

---------

Co-authored-by: Sushma Vaddireddy <svaddire@amd.com>
 2025-05-22 13:35:38 -07:00
Baraldi, Giovanni cfea25a13a ATT Doc updates. Fix trace-decode return error. (#406) 
* Doc updates. Some cleanup.

* Formatting

---------

Co-authored-by: Giovanni Baraldi <gbaraldi@amd.com>

[ROCm/rocprofiler-sdk commit: 3cb0c87f53]
 2025-05-22 14:50:45 -05:00
Baraldi, Giovanni 3cb0c87f53 ATT Doc updates. Fix trace-decode return error. (#406) 
* Doc updates. Some cleanup.

* Formatting

---------

Co-authored-by: Giovanni Baraldi <gbaraldi@amd.com>
 2025-05-22 14:50:45 -05:00
anujshuk-amd ef90bab236 Update transpose-rocprofiler-* tests (#210) 
- Updating counters collected and tested for on Navi-based machines
- Update add CMake function to query GPU architectures
- Update decode tests to use new functions

[ROCm/rocprofiler-systems commit: 4c24975626]
 2025-05-22 14:04:33 -04:00
anujshuk-amd 4c24975626 Update transpose-rocprofiler-* tests (#210) 
- Updating counters collected and tested for on Navi-based machines
- Update add CMake function to query GPU architectures
- Update decode tests to use new functions
 2025-05-22 14:04:33 -04:00
Belton-Schure, Aidan 983a5925c6 SWDEV-508966 - hipGetTextureAlignmentOffset return hipErrorInvalidTexture (#389) 
[ROCm/clr commit: 7aae33951b]
 2025-05-22 23:19:45 +05:30
Belton-Schure, Aidan 7aae33951b SWDEV-508966 - hipGetTextureAlignmentOffset return hipErrorInvalidTexture (#389) 2025-05-22 23:19:45 +05:30
Belton-Schure, Aidan 5d4ae6346e SWDEV-508977 - return error in global capture mode for hipEventQuery (#388) 
[ROCm/clr commit: 51dd60a64f]
 2025-05-22 23:17:57 +05:30
Belton-Schure, Aidan 51dd60a64f SWDEV-508977 - return error in global capture mode for hipEventQuery (#388) 2025-05-22 23:17:57 +05:30
Ramakrishnan, Ranjith 1785cff6a5 CMake: Remove file reorganization backward compatibility code (#176) 
The feature has already been disabled, and the related source code is no longer required
 2025-05-22 09:47:26 -07:00
Ramakrishnan, Ranjith 85cd72987f CMake: Remove file reorganization backward compatibility code (#176) 
The feature has already been disabled, and the related source code is no longer required

[ROCm/ROCR-Runtime commit: 1785cff6a5]
 2025-05-22 09:47:26 -07:00
Roy, Rakesh 0bd2233a69 SWDEV-533670 - Bump major version for ROCm 7.0 (#87) 
[ROCm/hip commit: c3050b93c6]
 2025-05-22 20:55:59 +05:30
Roy, Rakesh c3050b93c6 SWDEV-533670 - Bump major version for ROCm 7.0 (#87) 2025-05-22 20:55:59 +05:30
Stojiljkovic, Vladana 1a36230bf2 Match hipStreamAddCallback capture behavior with nvidia (#386) 
Co-authored-by: Anusha GodavarthySurya <Anusha.GodavarthySurya@amd.com>

[ROCm/clr commit: a0e946c2cc]
 2025-05-22 20:54:04 +05:30
Stojiljkovic, Vladana a0e946c2cc Match hipStreamAddCallback capture behavior with nvidia (#386) 
Co-authored-by: Anusha GodavarthySurya <Anusha.GodavarthySurya@amd.com>
 2025-05-22 20:54:04 +05:30
Stojiljkovic, Vladana 9af11abb42 Match hipLaunchCooperativeKernelMultiDevice behavior with nvidia (#385) 
Co-authored-by: Anusha GodavarthySurya <Anusha.GodavarthySurya@amd.com>

[ROCm/clr commit: 63c4020e49]
 2025-05-22 20:52:37 +05:30
Stojiljkovic, Vladana 63c4020e49 Match hipLaunchCooperativeKernelMultiDevice behavior with nvidia (#385) 
Co-authored-by: Anusha GodavarthySurya <Anusha.GodavarthySurya@amd.com>
 2025-05-22 20:52:37 +05:30
Stojiljkovic, Vladana 25084759b8 Allow hipMemAdvise capturing only in relaxed mode (#384) 
Co-authored-by: Anusha GodavarthySurya <Anusha.GodavarthySurya@amd.com>

[ROCm/clr commit: 2ddfe40de0]
 2025-05-22 20:52:00 +05:30
Stojiljkovic, Vladana 2ddfe40de0 Allow hipMemAdvise capturing only in relaxed mode (#384) 
Co-authored-by: Anusha GodavarthySurya <Anusha.GodavarthySurya@amd.com>
 2025-05-22 20:52:00 +05:30
Stojiljkovic, Vladana 3f415c28e0 Allow hipMallocManaged capturing only in relaxed mode (#383) 
Co-authored-by: Anusha GodavarthySurya <Anusha.GodavarthySurya@amd.com>

[ROCm/clr commit: 69112331ac]
 2025-05-22 20:51:30 +05:30
Stojiljkovic, Vladana 69112331ac Allow hipMallocManaged capturing only in relaxed mode (#383) 
Co-authored-by: Anusha GodavarthySurya <Anusha.GodavarthySurya@amd.com>
 2025-05-22 20:51:30 +05:30
Arandjelovic, Marko a59ada9e03 Remove ifdef guards in VMM tests (#196) 
[ROCm/hip-tests commit: 74e743dcb9]
 2025-05-22 20:49:57 +05:30