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14 Commits

Author SHA1 Message Date
Ioannis Assiouras 3cc948278e SWDEV-449052 - Fix hipMemcpyParam2D when source or destination pitch is set to zero 
When source or destination pitch is set to zero in hip_Memcpy2D struct
it should default to WidthInBytes + [src/dst]XInBytes

Change-Id: Id57b53cab40ba72ced231258da9356554c4868c3


[ROCm/clr commit: 7a1e818c82]
 2024-08-14 04:46:41 -04:00
Saleel Kudchadker cba9970220 SWDEV-408180 - Address possible cornercases 
- Address corner cases that can arise with the new
hipMemcpyDeviceToDeviceNoCU enum
- Better log

Change-Id: I6035b901f8d616741054b7a5ff4f67956329ac57


[ROCm/clr commit: 5662d4037c]
 2023-10-23 16:54:08 -04:00
taosang2 28524520e6 SWDEV-364236 - Fix layered Image issue 
Fix wrong logic to get layer index;
Make layered image's layout match cuda spec;
Fix wrong comparision of element size.
Remove amd::BufferRect from ihipMemcpyAtoHCommand()
and ihipMemcpyHtoACommand().
Change-Id: Icc6a4233fbce2e9b2dc6feb79e6bfbd761684c7d


[ROCm/clr commit: 5a0085e516]
 2023-10-19 16:06:20 -04:00
sdashmiz 2216908962 SWDEV-403638 - Fix warnings 
- disable deprecated function use warning
- disalbe size_t to .type' warning
- disable conversion from 'type1' to 'type2' warning

Signed-off-by: sdashmiz <shadi.dashmiz@amd.com>
Change-Id: I64161fd37cf56de3d132102103267ae8da40193a


[ROCm/clr commit: 38a67df312]
 2023-06-15 12:17:22 -04:00
taosang2 769f1e166e SWDEV-390626 - Support surface Apis 
Change-Id: I1691b82d597bfd722d562778f919ebf8ca530e90


[ROCm/clr commit: 53742adc08]
 2023-04-05 16:38:04 +00:00
pghafari a008845d4e SWDEV-366515 - adding HIP_AD_FORMAT_SIGNED_INT16 
Change-Id: I084d7b093049093ea032372593711f6dc0964af8


[ROCm/clr commit: 58001ae995]
 2023-02-24 12:39:13 -05:00
Ajay ca2235f671 SWDEV-353548 - assert with different behavior for Release vs Debug 
assert statement behavior
-Debug: crashes tests with SIGABORT
-Release: continues silently without

Change-Id: I7578eb16a7391ff7f9d68f1cae3bcea7f8225579


[ROCm/clr commit: be80bf5406]
 2022-10-11 14:00:28 -04:00
Jaydeep Patel a1a75f02f0 SWDEV-345020 - The bit channel description should not allow any channels after a zero channel 
Change-Id: I66e6d25c032d22f9616dc59730f1f094d30c01cf


[ROCm/clr commit: 5b4e0321d4]
 2022-07-24 21:35:26 -04:00
Ajay c4a5d11d55 SWDEV-340506 - Unit_hipMalloc3DArray_Negative fix 
Change-Id: I1fbf4be8aaef83b36749f1e253b5dba025e7f3cd


[ROCm/clr commit: eab4ea236c]
 2022-07-07 12:17:45 -04:00
sdashmiz 3e667fc98f 200~SWDEV-333583 : hipMallocArray bad channel format 
- channel format should be consistent accross parameters

Signed-off-by: sdashmiz <shadi.dashmiz@amd.com>
Change-Id: I1e7680ab9262a66e7bea4aaa21f061044b0f7956


[ROCm/clr commit: 8ed471f210]
 2022-04-29 09:15:41 -04:00
pghafari 2ee642823d SWDEV-245531 - GLInterop adding register image 
Change-Id: I075bec49b7ad5f78336586b9d55e259717c4c000


[ROCm/clr commit: 44e0c246f8]
 2022-01-23 14:59:18 -05:00
Rahul Garg 62a018191f SWDEV-297563 - Move declarations to hip 
Change-Id: Ifdab79945ea2e625e8cef5cd71d638552e9a740b


[ROCm/clr commit: 3dd9dbb359]
 2021-08-02 11:56:08 -04:00
agunashe fae697b4d6 SWDEV-293742 - Update copyrights end year for hipamd 
Change-Id: I08f620f84563a9214b59f1b943ed091b67229eab


[ROCm/clr commit: d9d9e81acb]
 2021-07-09 12:08:39 -04:00
Rahul Garg dd95d3d23c ROCMOPS-1956 - Push restructured code to hipamd 
hipamd will have AMD's ROCCLR based HIP backend implementation

Change-Id: Id7de9634519b4ce46fca71a1b61f3d5b1e3fc459


[ROCm/clr commit: 19c84bc604]
 2021-06-07 21:42:44 +00:00