Wykres commitów

159 Commity

Autor SHA1 Wiadomość Data
Sean Keely 34ac62274a Correct legacy copy path.
Legacy p2p copy path incorrectly transfered in whole pages rather than
the requested size.

Change-Id: I9aa7337754f9e32f587a0cc5305f8ffeb6196f10
2021-02-10 19:53:02 -05:00
Sean Keely 01f42dbe46 Add hsa_amd_signal_value_pointer.
Enables partial signal interop with non-HSA devices.

Change-Id: Ic39bca84ed1709cbd2cc24b1eb0f4fc6cccb39cf
2021-02-10 18:47:54 -05:00
Laurent Morichetti 9ca79d072a New trap handler ABI (v4)
Replace the stop reasons ttmp11.trap_raised and ttmp11.excp_raised
with ttmp11.wave_stopped which indicates that the trap handler has
halted the wave as the result of an event (trap, single-step or
exception).

If the wave is stopped because of a trap, also record the trap_id in
ttmp11.saved_trap_id[7:0].

Save status.halt in ttmp11.saved_status_halt, so that it can be
restored when resuming a wave (changing a wave's state from stopped to
running or single-stepping).

Change-Id: I7322f59b60e8cc1b92bf5f067dba606a3109ef49
2021-02-05 09:56:01 -08:00
Laurent Morichetti 8aec53969f Don't terminate waves halted at s_endpgm
To support single stepping the instruction preceding an s_endpgm,
unwind the PC by 8 bytes and set ttmp11[9] to notify the debugger
that the wave is halted with a modified PC.

Bump the debug r_version for this new trap handler ABI.

Change-Id: I55e4e0d65576f92da14a336266c31c513baab547
2021-01-21 20:51:38 -08:00
Laurent Morichetti 8808ed3177 Correct gfx10.3+ trap handler.
Change-Id: I77d2b41c8882014a430d741ecd777718a1f61561
2021-01-21 09:24:20 -08:00
Sean Keely 7bc6aac5d2 Correct computation of scratch slot requirements.
Each SE must be assigned equal numbers of slots and slots
must be assigned in units of whole groups.

Change-Id: I8f3677237fa6f2e2d25e3e78210c5a7a0ad792f3
2021-01-13 15:09:00 -05:00
Sean Keely 9fe8ccc3ee Revert "Revert "Cache scratch allocations.""
This reverts commit 7e2ba23566.

Change-Id: I3f3c257270016559f8b2e70151664f0931db28d2
2021-01-13 15:08:53 -05:00
Tony Tye 6bbf6b1c9c Improve Isa class
- Use consistent naming in Isa class.
- Remove unused Isa methods.
- Simplify Isa methods.

Change-Id: I7c4045d08fbfe0d94b3181db8ebc5e5ed8c8cc82
2021-01-10 18:23:54 +00:00
Tony 853ccc762e Store target ID in isa registry
Store target ID string in isa registry and use for returning agent and
isa name.

Change-Id: I72a20d8ff963c73d86392158aff3853e4c9bfdbd
2021-01-10 18:23:54 +00:00
Sean Keely 7e2ba23566 Revert "Cache scratch allocations."
This reverts commit 27e044ae4d.

Change-Id: I698b33bacb2be3de6c8185fe89597a60a79521c5
2021-01-08 11:57:40 -06:00
Sean Keely 27e044ae4d Cache scratch allocations.
Avoids calling to KFD to map/unmap scratch allocations for
every large scratch using dispatch.

Change-Id: I9fab5705251ec82b03e4f2f2ca6da7cdccabefb9
2020-11-20 15:07:01 -05:00
Sean Keely 32d0fcafa9 Limit clock synchronization to 16Hz.
Improves HIP event performance in directed benchmarks where
clock sync latency is significant.

Change-Id: I78b724a14a8f5b6a9a2b9f4d85afe9d8b81808a6
2020-11-20 15:06:13 -05:00
Konstantin Zhuravlyov 3a08d0964e Implement Target ID Proposal
Changes from Konstantin Zhuravlyov, Tony Tye

Change-Id: I532801193afa9d5b8ac2a877b5497eab661f0597
2020-11-10 13:42:35 -05:00
Sean Keely 2a0c6774fb Use SDMA for small copies in VRAM.
For small copies cache flush latency is larger than data transfer
latency in local VRAM.  Select SDMA for small copies.

Environment key HSA_FORCE_SDMA_SIZE is added for easy adjustment
of the small copy size.  This may be removed after tuning is done.

Change-Id: I733fa0ae01c616617c5de50e71226b51fd589ef2
2020-09-03 03:11:57 -05:00
Sean Keely f4fe7ddf47 Make explicit reference between init modules.
Make explicit reference to hsa_api_trace.cpp from
initialization of hsa_table_interface.cpp.  Breaks
the ability to use hsa_table_interface.cpp in plugins.

Change-Id: I22a42d3a132512b0d9ec7a1ca629b169e7f8eba7
2020-07-15 16:02:15 -04:00
Sean Keely f6e6eae86d Remove unnecessary HSA_API declarations.
The excess declarations mark implemenation functions as default
visibility.  Normally this is not an issue since our linker script
will specify which visible symbols will be permitted into the dynamic
symbol table.  However, for static linking methods which apply linker
directives during incremental linking symbol visibility must be correct
in the (non-dynamic) symbol table.

Change-Id: I13dc8dd1019368e8943920d36335a91f0c555a92
2020-07-07 16:41:34 -04:00
Laurent Morichetti 23df617150 Set the correct bit in m0 for gfx10
The size of the m0 payload for MSG_INTERRUPT has changed in gfx10. It is
now 23bit wide instead of 24bit wide in gfx9.

Since we are generating different binaries for gfx9 and gfx10, we can
conditionally set DEBUG_INTERRUPT_CONTEXT_ID_BIT to 23 for gfx9 and
22 for gfx10.

Change-Id: Ifc15a9fa4399d35328ab58b742f791f1660bcd9a
2020-06-30 22:02:41 -04:00
Ramesh Errabolu f7350c6020 Update ROCr implementation of Queue ID
Change-Id: Iec48b1978e4d01563e71cfb58aed8f1bbc446443
2020-06-26 13:25:00 -05:00
Sean Keely cc7a197ff8 Use correct queue id for gws assignment.
Change-Id: I9157951abce65b60dfe0e1db5819510a7703547f
2020-06-26 14:24:06 -04:00
Tony 91cb98dab6 Code object reader improvements
- Make code object reader use mmap when loading from a file on Linux.
- Support computing code object URI for memory either fro the loaded
  host executables, or from all mmapped files. Define the environment
  variable HSA_LOADER_ENABLE_MMAP_URI to non 0 to search the mmap
  files, otherwise only the loaded executables will be seatched.
- For mmap search, determine file size and ommit offset and size URI
  fragment when the code object is the whole file even when specifying
  a file size explicitly or specifying memory that has been mmaped.
- Always return a non-empty code object URI.
- When a code object reader is created, complete all fields to ensure
  it can be used in a multi-threaded manner using only const
  operations.
- Add missing exception handlers in the AMD vendor extentions.
- More rigorous checking for errors.

Change-Id: I07797b1dc60c5c64245142d77becf9f7c9643395
2020-06-25 12:18:50 -04:00
Sean Keely e9a4eff8a1 Update licensing and remove duplicate licenses.
Change-Id: I0aab6f310d96bf6c5a918e7a9c03713a00dc5c4a
2020-06-22 14:19:30 -04:00
Sean Keely 0be21c54a6 Move loader interface functions into rocr namespace.
For static linking all non-API functions must have internal linkage
or be in project namespace to avoid colliding with application symbols.

Change-Id: I3398e40a387cca36f3ddef2b978306c765161d72
2020-06-19 22:34:26 -04:00
Ramesh Errabolu fa13208698 Add rocr namespace to core header and impl files
Change-Id: I1e1b33f9bba1078d049bc19797889988c3e43360
2020-06-19 22:34:21 -04:00
Sean Keely ce19721c88 Update copyright date.
Change-Id: If4bf4c20cf051878bfe759080bb7345d884dd53d
2020-06-19 22:34:01 -04:00
Ramesh Errabolu 0ca0691ca7 Build ROCr core and image libraries as one shared object
Change-Id: I3a16c1227e7db2e386ab33886965596fa0fb0c87
2020-06-19 22:33:36 -04:00
Laurent Morichetti db6a781f0c Preserve the exec mask for the queue error case
Save and restore exec_lo/exec_hi around the mGetDoorbellId macro in
the signal_error case just like we do in the signal_debugger case.

Also reset the wave_id (ttmp4/ttmp5) to 0 since it isn't preserved.
0 will be detected as a new wave by the debugger api library.

Change-Id: I5123caa9431154ec1584bae85e42648c97c64c37
2020-06-18 02:25:11 -04:00
Tony 047b80ab41 Do not add offset/size to code object URI if loading from complete file
Change-Id: I7cb1e803e0bcdbc24935273af431fbcc88404bfd
2020-06-12 05:10:35 -04:00
Laurent Morichetti da6d892058 Handle address watch exceptions
Set ttmp11[8] and send a signal for the debugger when the handler
is entered because of an address watch exception.

Change-Id: Icc83a79027bb7ca1e50e19e2f00464cb9ca862f3
2020-06-02 15:25:15 -04:00
Konstantin Zhuravlyov 9eb735ec24 Add support for code object URI to ROCr
Adds the following:
	- New factory method to create a code object reader from
          file with offset and size.
	- A pair of queries on a loaded code object to get the URI name/length.
	- A bump to the AMD vendor loader extension API and its associated table.

Change-Id: I17c83e9c2447d29a43c438459395365f786a3611
2020-06-01 11:07:50 -04:00
Sean Keely 4e0bf29704 Separate memory map info printing from vmfault handler.
Allows the print utility to be called from GDB.

Change-Id: Ia27ff9ba23ad6c0117ba1278693d4c8b0473bdc1
2020-05-28 23:34:49 -04:00
Sean Keely 29b660c91e Correct IPC fragment reuse.
Memory from the suballocator may be exported via IPC.  If this
happens then the allocating process should not reuse that memory
since it would still be connected to the remote process.  IPC exported
memory must be released back to the driver.

Change-Id: I2ab0c814f63191f753fc3640cc4140ee144bf07f
2020-05-28 21:46:02 -04:00
Laurent Morichetti 584ef1e1ca Clear mode.debug_en if !status.halt
The 1st level trap handler jumps to the 2nd level trap handler on
context save requests or regular traps if (mode.debug_en
&& !status.halt) is true.

If we return from the 2nd level trap handler without status.halt=1, then
we need to make sure mode.debug_en is cleared, or we will re-enter the
2nd level trap handler again and again when trapsts.savectx is set.

Change-Id: I4db6369de8c91a32842f488a4df5c9d94fa65aa9
2020-05-19 18:31:29 -07:00
Sean Keely ddebda6433 Add USER GCR packet
Allows cache flush from SDMA.

Change-Id: Iecae0b49519b2d4da7b1c053b03f721544439e71
2020-05-16 00:59:03 -04:00
Laurent Morichetti 838c6bd6ad Set ttmp11[8] for all memory violation errors
In the case where SQ_WAVE_TRAPSTS_XNACK_ERROR_MASK is set, we also need
to set the TTMP11_EXCP_RAISED_BIT in ttmp11. If we don't, the debugger
may think that the wave is halted at launch (halted without events).

Change-Id: I8c19605bbfc145275728de4ad1979d3ba8bb478a
2020-05-12 00:44:06 -04:00
Laurent Morichetti df03a377f5 Check all s_endpgm instructions
The ROCR trap handler should check for all end program instructions
and not halt on them. Mask off the imm16 before comparing the
instruction to the s_endpgm opcode.

Change-Id: I669ffc7f5b699d7daf0c8ec5761ed7bb193f07a7
2020-05-04 19:52:53 -04:00
Laurent Morichetti 00da82f951 Add debugger support for wave halted at launch
New trap handler ABI: Record in ttmp11[8:7] the event that caused the
trap handler to be entered. We currently record 2 events, trap_raised
if an s_trap instruction was executed, or excp_raised if an exception
(MEM_VIOL or ILLEGAL_INST) was raised.

Change-Id: Ie278c8277437b3b67c2737dcd1a12fe6511df428
2020-04-29 19:29:56 -04:00
Ramesh Errabolu 89f7ef224c Extend Rocr Visible Devices functionality to include UUIDs
Change-Id: Ia2892e4033717556a422fe33dec0294fe2ca9e28
2020-04-09 00:42:53 -05:00
Ramesh Errabolu 627991b1c1 Update how code references publicly available ROCr headers
Change-Id: I357c51eb713a23704d4fee71081be46a73a71806
2020-02-21 20:01:11 -05:00
Sean Keely 6c556002d8 Correct scratch retry logic.
scratch_used_large_ was uninitialized leading to the observed hang.
DynamicScratchHandler would wait for a large scratch release despite no
large scratch having yet been allocated.  Fixes .

The patch also removes a potential race between AddScratchNotifier and
ReleaseQueueScratch.  The race condition does not exist today since both
scratch alloc and release run on the same thread.  The changes will
prevent this potential race from manifesting if the async event handler
is ever updated to use multiple threads.

Also enhances scratch occupancy reduction reporting.  Reporting now
prints the initial request size as well as the allocated size and the
effect on occupancy this has.  Occupancy is computed in terms of the
requesting dispatch grid size so may be >100%.

Change-Id: I0fc5ee01467ff4c29bdd25d545177c97862c3bd9
2020-02-21 17:09:26 -05:00
Sean Keely 0a43a107b1 Initial GWS queue support.
Queues should transition to ref counting for all queues eventually.
That cleanup will be part of shared queue pooling support.

Change-Id: I217ff5d573156678b9559da6fb81baa8cd31c617
2019-12-09 21:21:17 -05:00
Laurent Morichetti 5774d9162b Fix a typo in INSN_S_ENDPGM_OPCODE encoding.
The correct s_endpgm instruction encoding is 0xBF810000.

Change-Id: I03f304762dcaced5bf3fa4f069da7a0b287d1cd2
2019-11-12 11:54:17 -08:00
Qingchuan Shi 16a20cfb8c Adding code object list in loader.
Change-Id: Iab3541287bd56276fd32615ee59fcd590de84ca0
2019-10-30 20:31:51 -04:00
Jay Cornwall 78e754935c Merge debugger trap handler into ROCr trap handler
Debugger path is taken for (trap_id >= 3) and single step exceptions.
Other traps/exceptions behave as before.

Change-Id: I276c0eb69953709968353a57717ee017d22348a2
2019-10-30 13:56:06 -04:00
Jay Cornwall 5b64fbd0e5 Implement code cache (SQC I$, SQC K$, TCP, GL1, GL2) invalidation for gfx10
Change-Id: I8b2a59118094fbb55e3f575fa9f79959d3725d7d
2019-09-14 14:06:31 -04:00
Jay Cornwall d1c5a079cd Add binary shaders for gfx10
Change-Id: Iaf586a15a2f2aebc266da5148aa8637b092c1002
2019-09-14 14:05:35 -04:00
Jay Cornwall f8d0ccd159 Support wave32/wave64 scratch allocations on gfx10
- Use new buffer resource descriptor layout
- Handle wave32 scratch allocation error from CP
- Make wavefront size a property of scratch allocation requests
- Repurpose wave64-specific amd_queue_t.scratch_workitem_byte_size field
- Clear index_stride field in V# on gfx10, calculated per-dispatch by CP

Change-Id: If2acdf6430772abd4d6a8c792fc8c11260764dda
2019-09-13 17:22:59 -04:00
Chris Freehill 0ec781478d Make gfx10 use OSS defined packet fields
Change-Id: Icf622c22a17005aaeafb24f80a414319bebb891f
2019-09-13 08:14:24 -04:00
Christian Sigg 912c23a6d5 Adding missing includes to sdma_registers.h
Change-Id: Idb2a54f45c810508ae0ebac0ca12853df8025c7a
2019-09-04 20:15:13 -04:00
Sean Keely ec5ac95dce Remove sdma ts pool.
sdma end ts must be 256 bit aligned in oss 3.0 and prior.  Using
the ts pool requires copying into the signal and is a significant
performance penalty for small copies.

SharedSignal is 128 bytes due to alignment so can host the end ts.
Move sdma end ts into SharedSignal and remove ts pool and ts copy.

Change-Id: I7899bda36ebc9adcaad1d3a3d2b7a489857cc9e8
2019-08-29 20:24:05 -05:00
Ramesh Errabolu 8864c188b4 Initial support for xgmi sdma queues
Change-Id: I1aee379c7b9eede5f4b913cf2f9af3abb32e5baa
2019-08-24 02:03:37 -04:00