Gráfico de commits

150 Commits

Autor SHA1 Mensaje Fecha
David Yat Sin ecdebef0b9 Add agent info for fw and sdma ucode
Add two new agent info fields:
HSA_AMD_AGENT_INFO_UCODE_VERSION
HSA_AMD_AGENT_INFO_SDMA_UCODE_VERSION

Change-Id: I51cb853724b23a26e945e5c1ac32c16d0cb3bc31
2022-12-07 19:07:31 -05:00
David Belanger a0d3db6e8d Initial changes for gfx1101, based on gfx1100/gfx1102 implementation.
Change-Id: I949c1027ccabf38b4f924590e42e7327dc550f73
Signed-off-by: David Belanger <david.belanger@amd.com>
Reviewed-by: Jonathan Kim <jonathan.kim@amd.com>
2022-10-13 09:28:39 -04:00
Lang Yu d0e7c617df Query agent family id from roct
Add agent info query HSA_AMD_AGENT_INFO_ASIC_FAMILY_ID.
Then we can remove the codes to parse family id.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Change-Id: I3ac4746d3015e89b32322ebc0f8a3084f98677a4
2022-08-25 10:15:43 -04:00
David Yat Sin a7db31c5d1 Expose memory executable bit for SVM ranges
Add support to expose executable bit.

Change-Id: I054f5c3173822c369dd9908eec5c449459600ce1
Signed-off-by: David Yat Sin <David.YatSin@amd.com>
2022-08-17 12:05:42 -04:00
David Yat Sin 86e4cb1ddd Add max enum value to hsa_agent_info_t
Add max enum value to force size of enum and avoid clang compile
warnings.

Change-Id: I9cdf529517cc605a5039c3a924fd718ece16029d
2022-08-10 11:11:36 -04:00
David Yat Sin 574bea4a4c Use FAMILY_GFX1103 for gfx1103
Also adding elf entry

Change-Id: Id47ec379f2880961022b4607eb7f106b7e9d7048
2022-08-04 11:23:28 -04:00
David Yat Sin cc3bd31591 Add gfx1102 support
Change-Id: I39cbda81a7a999aa2ecfad7a3e720000f7ca3408
Signed-off-by: David Yat Sin <David.YatSin@amd.com>
2022-08-03 10:56:54 -04:00
Graham Sider 446c5e9672 Add gfx1100 support
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: Ic5d5559e43df5c73409ba900a42c6901aabae661
2022-08-03 10:56:49 -04:00
skhatri 364715cbc6 Enabled allocation of pseudo fine grain memory where memory ordering is per point to point connection
Atomic memory operations on these memory buffers are not guaranteed
to be visible at system scope

Change-Id: I4cccde114632071a000384502a83bc191e77e85b
2022-07-29 15:15:56 -04:00
Jonathan Kim f600687537 Only allow pairwise CU enable for devices with WGPs
A work group processor (WGP) require both its CU to be enabled
in order to be enabled.

The KFD will round robin distribute by even-indexed pairs so
enforce this requirement for runtime set mask calls.

Change-Id: Ic46661b01f398aa1fe24d96b5c9c31f122f967a3
2022-07-07 12:50:24 -04:00
Sean Keely dec37625ed Report nominal GPU wallclock frequency.
Adds agent info query HSA_AMD_AGENT_INFO_TIMESTAMP_FREQUENCY.

Change-Id: Ib9108d51f9df89f8566291258aab3d1b87243441
2022-06-28 11:25:18 -04:00
David Yat Sin 4ac840269c Add API for available GPU memory
Add support for AMD Agent to return amount of memory available

Change-Id: I5c32e2cebbaa2993b044250aefe434e4cc02d8c2
Signed-off-by: David Yat Sin <david.yatsin@amd.com>
2022-06-07 10:33:18 -04:00
Sean Keely c289a43e88 Allow zero agent handle in AsyncCopy APIs.
IPC use cases with RVD set can't convey proper agent handles.
Runtime discovery is required to properly route the copy in this
case.

Change-Id: I4c97e132fb4b6ac1040de1cb17fe5a3e36d6be48
2022-05-14 18:08:49 -05:00
Yifan Zhang 54c8b7900d add gfx1036 support
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Change-Id: Ifc1b3cf2e46cf753f57470ebc6b034c1a349d3d2
2022-04-29 17:52:22 -04:00
Sean Keely 64dae113b1 Minor typo fixes.
Declare the type of HSA_AMD_AGENT_INFO_COOPERATIVE_COMPUTE_UNIT_COUNT
and add a missing break statement.

Change-Id: I86ce8a2e620438e046b60cee991ce1fbe07a3e88
2022-04-26 15:51:22 -04:00
Konstantin Zhuravlyov 9265409f08 Add code object v5 support
Change-Id: I03522765056e99ed49e6c5e213ee3753852de27b
2022-04-12 08:53:27 -04:00
Sean Keely 7e73760cd0 Revert "add gfx1036 support"
Compiler is not promoted to mainline yet.

This reverts commit 2f97f17df9.

Change-Id: I7256aeb3698ee3ae640a9f457a929abe24d5ef17
2022-03-18 02:35:01 -05:00
Yifan Zhang 2f97f17df9 add gfx1036 support
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Change-Id: I075779b1369fde759c29572fa2027a3748d6ed4c
2022-03-05 13:16:19 +08:00
Sean Keely 37942c982a Add HSA_AMD_AGENT_INFO_COOPERATIVE_COMPUTE_UNIT_COUNT.
On gfx90a only a reduced number of CUs must be used for cooperative
dispatches due to CWSR and launcher interactions with asymetric
harvest.  We must use one fewer CUs per SE than the lowest count of
CUs on any SE.

Also adds env var HSA_COOP_CU_COUNT which enables the cooperative
CU count computation.  Set to 1 to enable the new computation.
This is an opt-in feature that will become enabled by default (opt-out)
in a future release.

Change-Id: Ifbb75ced3bbc15876eef44922c6a4f6fde8c4c28
2022-01-31 15:22:07 -05:00
Oak Zeng 80206af91e Add gfx1013 support
Change-Id: I7122caea3ef2254b50bde25ec545116685452116
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
2021-09-15 01:10:20 -04:00
Sean Keely 02666ec0f1 Allow passing zero bits into hsa_amd_queue_cu_set_mask.
Passing 0 into num_cu_mask_count used to be an implicit error.
This has been repurposed as a short hand for enabling all CUs.
Enabling all CUs when HSA_CU_MASK is set will cause the CU mask to
reset to whatever was set by HSA_CU_MASK which may then be queried.

Change-Id: I1d6bb2034595a78ee48fa72aa05563e8ea6c0fff
2021-08-27 20:05:24 -04:00
Sean Keely 270d042ef8 Minor interface improvement to pointer info.
Take in const void* rather than void*.  This does not break the
abi or existing code.  Existing code would need to cast away any
const which is unnecessary and annoying.

Change-Id: I28787e8fab1b600bf6871ea82835e10a4f475c5b
2021-08-04 16:43:23 -04:00
Sean Keely e3a01690a5 Add global_flags reporting to pointer info.
global_flags reporting allows discovery of an allocation's memory
model (coarse, fine, kernarg).  This is critical on gfx90a and
also allows discovery of the memory model of IPC imports.

Change-Id: Icbc3c243ca20e264af5e1931becd2419f762c7ad
2021-07-29 15:37:47 -05:00
Sean Keely e6e66e8a05 Report SVM range queries with both coarse and fine grain as indeterminate.
Previously ranges were reported as fine if and only if they were
entirely fine.  Coarse and mixed ranges were reported as coarse.
For gfx90a it is critical to know if a range is coarse or fine as
fp atomics targeting fine do not function.  Range queried reporting
coarse must be able to be trusted so must only report coarse if the
entire region is coarse.

Change-Id: I29c654a2afcd6943961eb2455e3654dfdb1283b5
2021-07-29 15:34:58 -05:00
Sean Keely 4455250be1 Add HSA_CU_MASK
New environment variable HSA_CU_MASK allows users to
specify a cu mask to every queue allocated from any
GPU.  hsa_amd_queue_cu_set_mask is restricted from
escaping this mask.

A new API hsa_amd_queue_cu_get_mask is added to query
the current cu mask.

Change-Id: I846c03a5faaca9b95067c31db84b59cc9fce2f03
2021-07-29 02:23:34 -05:00
Aaron Liu 4032070c3e Add gfx1035 for yellow carp
Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Change-Id: I1e3e44352b5825fc0f249c39aed703d4990995ca
2021-07-22 13:48:31 +08:00
Sean Keely 59ee761f81 Add support for reporting vm faults through the queue error handler.
Under xnack we can now identify the queue which generated a vm fault.
This allows users to identify which queue, and therefore which
dispatch, a vm fault came from.

Change-Id: If72ff3de05800f2b811aa7842a15eedff8b5e45a
2021-07-16 18:03:26 -05:00
Sean Keely 9e53cab613 Add agent info query for HSA_AMD_AGENT_INFO_SVM_DIRECT_HOST_ACCESS.
Allows determining if the host can directly access HMM memory that
is physically resident in vram.

Change-Id: Ie452eedd0e27fe1b511afd416f5a1cd01b3d84e8
2021-06-17 03:45:26 -04:00
Sean Keely f6c2aa1c78 Add Read Mostly attribute support.
Change-Id: Ia7c60edacb892cbf14bdb50350c0a0a627e53964
2021-06-01 23:39:12 -05:00
Chris Freehill 8cb686fdc5 Add gfx1034 support
Change-Id: I2d4bfcb9012704daf7de10739c966827bd2a09e2
2021-05-25 16:43:16 -05:00
Mike (Tianxin) Li 36c54c63f7 Revert "Get the size of VGPR and SGPR register file"
This reverts commit 344ed757e0.

Change-Id: I9988218ad1d2b6182d92aad09d18a95e77e46c01
2021-05-18 15:01:30 -04:00
Mike Li 344ed757e0 Get the size of VGPR and SGPR register file
Signed-off-by: Mike Li <Tianxinmike.Li@amd.com>
Change-Id: Ifa515ad7e1df1dd27f25f1e919b0053049531063
2021-05-13 11:54:41 -04:00
Sean Keely 77046a1aaa Revert "Revert SVM and XNACK support."
This reverts commit 5bd153974d.

Conflicts:
	opensrc/hsa-runtime/core/util/flag.h

Change-Id: I16daf41588e6139126d66af54b0693de2e7e39f3
2021-04-21 14:49:43 -05:00
Konstantin Zhuravlyov 1bdc2f6854 Update documentation of hsa_ven_amd_loader_iterate_executables
Clarify behavior of hsa_ven_amd_loader_iterate_executables during
concurrent calls of executable creation and destruction.

Change-Id: Idc3e3981d4fcc0d58d9f1b7a7578deed20aa490b
2021-04-16 20:51:48 -04:00
Konstantin Zhuravlyov 15e54d684d Expose iterator for executables
Change-Id: I0c5d39fc33c15a6eb8ee10ff181c2dcf2e042675
2021-04-16 20:51:48 -04:00
Tony Tye a97c14abea Add support for gfx909 and gfx90c
Change-Id: I88158789cdda44a173e3ca26d2c96b8e0ea0e221
2021-04-08 22:37:30 +00:00
Sean Keely 5bd153974d Revert SVM and XNACK support.
KFD is not ready yet.

Change-Id: I61deb292ddb92185d33504c2115169888d56e211
2021-04-02 02:10:59 -04:00
Sean Keely 7333c77e22 Squash merge of cfreehil/amd-temp-gfx90a onto amd-staging.
Includes some workarounds and HMM.
Conflicts:
	opensrc/hsa-runtime/core/runtime/amd_topology.cpp
	opensrc/hsa-runtime/core/util/flag.h

Change-Id: I22976f07964a43dbb228a6231777dbd599112b8d
2021-04-02 02:10:15 -04:00
Sean Keely 01f42dbe46 Add hsa_amd_signal_value_pointer.
Enables partial signal interop with non-HSA devices.

Change-Id: Ic39bca84ed1709cbd2cc24b1eb0f4fc6cccb39cf
2021-02-10 18:47:54 -05:00
Evgeny c5aae30d08 adding gfx1030 blocks
Change-Id: Ide2576939c5321dbe928183a8d9984d5ef87a61b
2021-01-29 08:50:10 -06:00
Tony b443397bcc Make supported targets consistent
Add missing target names and make all parts consistent with which
targets are supported.

- Add gfx805 as a supported target.

- Add all ELF targets to genric code.

- Make offline loader match supported targets.

Change-Id: Idab4d69edc71645aecaa83aa55e29c1aeee4c1d6
2020-11-24 03:14:31 +00:00
Konstantin Zhuravlyov 3a08d0964e Implement Target ID Proposal
Changes from Konstantin Zhuravlyov, Tony Tye

Change-Id: I532801193afa9d5b8ac2a877b5497eab661f0597
2020-11-10 13:42:35 -05:00
Evgeny 0d1e5cbcb6 aqlprofile: adding counters DISABLE get-info id
Change-Id: I90d0f6ae96b0d80c481648eecf907301fc13ab74
2020-10-12 17:12:25 -05:00
Chris Freehill 4944c74189 Add gfx1031 support
Change-Id: I855f7fe8d096331d0c1da10b10adf6b1e75a527f
2020-09-10 11:06:58 -04:00
Sean Keely 78e5c06ea8 Switch to release e_flags id for gfx1030.
Change-Id: I51c9ecdf78d6ec56ccc70ca5777bb011db35fda3
2020-08-12 16:38:16 -05:00
Sean Keely ddfe07871a Add ELF types for gfx1030.
Change-Id: If875534d698da9840e47c380d5630b6dd742ab0c
2020-08-12 16:34:17 -05:00
Sean Keely e9a4eff8a1 Update licensing and remove duplicate licenses.
Change-Id: I0aab6f310d96bf6c5a918e7a9c03713a00dc5c4a
2020-06-22 14:19:30 -04:00
Sean Keely ce19721c88 Update copyright date.
Change-Id: If4bf4c20cf051878bfe759080bb7345d884dd53d
2020-06-19 22:34:01 -04:00
Evgeny b033453537 concurrent sqtt support
Change-Id: I0e1515d4b0aab30b0a9b673120eee28d96f64d9e
2020-06-10 22:45:30 -04:00
Konstantin Zhuravlyov 9eb735ec24 Add support for code object URI to ROCr
Adds the following:
	- New factory method to create a code object reader from
          file with offset and size.
	- A pair of queries on a loaded code object to get the URI name/length.
	- A bump to the AMD vendor loader extension API and its associated table.

Change-Id: I17c83e9c2447d29a43c438459395365f786a3611
2020-06-01 11:07:50 -04:00