Commit Graph

11513 Commits

Author SHA1 Message Date
Lakhan singh Thakur 6443ff4197 [dtest] Additional tests for Memcpy
APIs tested: hipMemcpy, hipMemcpyAsync, hipMemcpyHtoD, hipMemcpyHtoDAsync
             hipMemcpyDtoH, hipMemcpyDtoHAsync, hipMemcpyDtoD,
             hipMemcpyDtoDAsync

-Scenario-1:: The aim of this test case is to cover all the negative test cases
              for 8 hipMemcpy apis
-Scenario-2:: This test launches NUM_THREADS threads. Each thread in turn tests
              the working of 8 hipmemcpy apis
-Scenario-3:: This test case verifies the working of Memcpy apis for range of
              Memory sizes from smallest one unit transfer to 1GB.

SWDEV-238517 for enhancing hip unit tests

Change-Id: Iace19cc54e865fae8450448d6f37abed88597f19


[ROCm/clr commit: becc687747]
2020-08-20 16:41:57 -04:00
Sudheer Kumar ca1b055135 [dtest] Enhanced tests for hipSetDevice and hipGetDevice
SWDEV-238517 for enhancing hip unit tests

Change-Id: I4fe169c560ce2e1fb471df67f03263903b12463b


[ROCm/clr commit: 4a110ce7ed]
2020-08-20 13:52:05 -04:00
Sourabh Betigeri c839dbc470 SWDEV-246104: Added new performance test to verify stream concurrency
Change-Id: Ieceaafd4d404b137936eb8aceecff27bbba42026


[ROCm/clr commit: 90e4f2062a]
2020-08-20 13:42:55 -04:00
Aryan Salmanpour dee8fed222 [HipPerf] add a test for measuring create/copy/destroy for hip streams
SWDEV-245290/SWDEV-247767

Change-Id: Id52e3d2f7afee52763da107eb5ed04627942d9f0


[ROCm/clr commit: 29bca5b949]
2020-08-20 13:28:36 -04:00
Jenkins 25ca4ebf94 Merge 'amd-master-next' into 'amd-npi-next'
Change-Id: Ibbb31c0a6d1d92e96a6c9abed0d4d4eb0b357008


[ROCm/clr commit: 615e32a722]
2020-08-18 09:09:47 +00:00
Todd tiantuo Li 005dcecd5c move hipFuncSetCacheConfig from hip_device to hip_module
Change-Id: If5a930e1210e76531f5ba9a0e5f5ec98ad473a19


[ROCm/clr commit: 3ac8483124]
2020-08-17 17:39:01 -04:00
Aryan Salmanpour 20fe2fd7fd SWDEV-248057 - fix the calculation of allGridSize used in multi_grid_group() API
Change-Id: Ib470094e28dcacaa4769dc5c7ab08924f5b7fa41


[ROCm/clr commit: 359c0fbb76]
2020-08-17 12:52:40 -04:00
Jatin Chaudhary 6b597909ce Adding Anyorder flag to HIP
Change-Id: Ie20931541b3febe23fa9ac36ebc0c90de75a5f0a


[ROCm/clr commit: 628a308475]
2020-08-17 08:46:52 -04:00
Jenkins 0a158e5944 Merge 'amd-master-next' into 'amd-npi-next'
Change-Id: I56b40b684a8be0dfbf330d0d1ed1ad703fde8417


[ROCm/clr commit: 65f85f0b95]
2020-08-16 09:09:40 +00:00
Rahul Garg 608fded501 Fix hipDispatchEnqueueRateMT sample
Change-Id: I7ade0dcf8b32ac90a311022d12339740b2b3df44


[ROCm/clr commit: ee3dbfac49]
2020-08-14 18:56:39 -04:00
Todd tiantuo Li 4885fa0e48 SWDEV-240803 - add hipFuncSetAttribute and hipFuncAttribute
Change-Id: I3f4d67b19d89fd348fa5b884af4a2542ee4aba60


[ROCm/clr commit: fb43f21044]
2020-08-14 17:39:29 -04:00
Jason Tang bbe0df36bf SWDEV-239502 - Create copyImageBuffer_ without flags
Change-Id: Ifcb5992d58f3419635d2aca2d51f2dacd7cd466d


[ROCm/clr commit: c33470ab4d]
2020-08-14 17:25:58 -04:00
kjayapra-amd cddec46bb7 SWDEV-237658 - Do not attach events to user invisible Marker.
Change-Id: I3a74fd2614d6e2e1d51543471bbd5ae51a713a47


[ROCm/clr commit: ea15c75c55]
2020-08-14 10:55:34 -04:00
agodavar 8b61666254 SWDEV-245503 - Improve hipModuleLoad performance
Change-Id: Icbcd37d9b4e6d79f296cc8693edf25689b19fa11


[ROCm/clr commit: e914f281ff]
2020-08-14 05:24:52 -04:00
Jenkins 1158db8bee Merge 'amd-master-next' into 'amd-npi-next'
Change-Id: I935fc8f681fad2df4e932407287a29a6a797351a


[ROCm/clr commit: e1af6830ad]
2020-08-14 09:09:52 +00:00
Freddy Paul f959aadea0 Enable developers to build hip without CMAKE_PREFIX_PATH
With recent changes in ROCclr to take HSA cmake target it require
HIP to have CMAKE_PREFIX_PATH added for install location for HSA,
amd_comgr,llvm.

User can provide CMAKE_PREFIX_PATH if above
packages are built/installed at custom location as:
cmake -DCMAKE_PREFIX_PATH="<path_hsa> <path_amd_comgr> <path_llvm>"

For default ROCm installation adding a default path will help.

Change-Id: Iefa443dc198da76b57422a641c9821c63cde4922


[ROCm/clr commit: 95729c31e8]
2020-08-13 23:13:40 -04:00
Aryan Salmanpour 15eaef319d [HipPerf] relocating/renaming some hip perf tests
Change-Id: Ie85d242cd68cd14a858e07ed27875a5196014688


[ROCm/clr commit: de1e14b252]
2020-08-13 17:28:11 -04:00
Aryan Salmanpour 1c52703636 [HipPerf] report performance based on wall time only for hipPerfDevMemReadSpeed/hipPerfDevMemWriteSpeed
Change-Id: I1fda2ec76da6fad6852d328e0a3fc39e28af57bb


[ROCm/clr commit: 1a2622dd60]
2020-08-13 14:23:58 -04:00
Vlad Sytchenko 7395ae1366 Remove unnecessary SVM commit
Change-Id: I5cb887ead166401a59b0c980f29fd615b19745be


[ROCm/clr commit: 6780a9ac66]
2020-08-13 13:21:03 -04:00
Jason Tang 8199283c0e SWDEV-239502 - Fix image test regression
Change-Id: Iea35fb0f1964d09a35131b4a20ac8f6f82850a8e


[ROCm/clr commit: db5a2d4c2d]
2020-08-13 11:58:20 -04:00
German Andryeyev a5ca15a599 Enable prefetch async functionality
Fix a typo with the name define, when compilation wasn't enabled.
Force CPU prefetch if system was forced in runtime

Change-Id: Id4b578f9fa44a45426fdb5d8ecb1da803aa42313


[ROCm/clr commit: 6e69258b69]
2020-08-13 11:09:10 -04:00
Jason Tang 91a2f86826 SWDEV-232197 - Remove refering to gfxipVersion_
Change-Id: I91b6b972e26b18dabf6deda5a142bff491c8bb45


[ROCm/clr commit: d5c97e0c31]
2020-08-12 16:34:18 -04:00
German Andryeyev 031cf9d32a Allow prefetch on the null stream
Change-Id: I87e950460361fab65ab140988fc2288bcb194f08


[ROCm/clr commit: b73673bc74]
2020-08-12 13:07:43 -04:00
Rahul Garg 420ec4eeae Return error from hipMallocManaged for size =0
Change-Id: Ida0cecf05e1df731176d41e59422d1e606cc9bd9


[ROCm/clr commit: 236ef94166]
2020-08-10 18:25:31 +00:00
Vlad Sytchenko 4a3b0190c5 Don't align 2D image buffer size
Cuda allows creating 2D textures from memory with unaligned size.
Aligning it will cause us to overshoot the size of the underlying
allocation.

Change-Id: Ia20dec2105e36ca4a8448c9c6299d0001b388d25


[ROCm/clr commit: 963c6fe4e9]
2020-08-09 15:53:52 -04:00
Jason Tang 3315ef8a45 SWDEV-247463 - Fix regression: ocltst segfaults
Change-Id: Iadb55ba45d6c8ade0757fd970ac4c6cde1805de3


[ROCm/clr commit: 152a2dfb5a]
2020-08-09 11:28:09 -04:00
Jason Tang d4cbe1a339 Fix HSAIL build
Change-Id: I34209b3ae0ce0eefc30e464fd7f081a0b62449b0


[ROCm/clr commit: 7bb671fa55]
2020-08-07 17:18:38 -04:00
Julia jiang ac119447fd SWDEV-246878-Update document HIP_porting_guide
Change-Id: I7f4c92637f31da76293048133fff5af816c752ca


[ROCm/clr commit: e93f7b6a56]
2020-08-07 14:50:01 -04:00
German Andryeyev 4a2b2e77f6 Sync the current queue for P2P staging
P2P staging uses device queues for transfer, hence the current
queue must be in sync

Change-Id: I8372a60590eed9dde62cb4c67ef4df5df82a8e8d


[ROCm/clr commit: 0dc47d55d2]
2020-08-07 14:36:50 -04:00
Aryan Salmanpour 7ec4a9af8e [HipPerf] add two subtests for measuring maximum device memory read/write speed
SWDEV-245290 / SWDEV-246220 [HIPPerf] Port OCLPerfDevMemWriteSpeed/OCLPerfDevMemReadSpeed into hip performance subtests

Change-Id: I5dc323c75cebbc17596dcb4ed9492e18c5246868


[ROCm/clr commit: b98727505d]
2020-08-07 14:21:27 -04:00
David Salinas dbeb78fa07 correct -x option in hip::device
Change-Id: I8c288e678b4357019144a024395cda1fcead61fc


[ROCm/clr commit: 996df70de9]
2020-08-07 12:33:43 -04:00
Jason Tang c926997eb8 Use ARCTURUS
Change-Id: Ib25d150c9314180178d5cf00835a06e47c02c2a9


[ROCm/clr commit: 6f8eaff4df]
2020-08-07 11:14:24 -04:00
Aryan Salmanpour 0372607c1b [HipPerf] add a test for measuring shared memory read speed
SWDEV-245290/SWDEV-247330

Change-Id: If78fa0879ff58aab84775e412a86665c7e5959e7


[ROCm/clr commit: 61dafa0397]
2020-08-07 10:07:05 -04:00
Yaxun (Sam) Liu 1ca3e4696e Let hipcc not escape space between obj files extracted from library
hipcc extracts bundles from static libraries and pass them to clang. It should
not escape spaces between objects extracted from library.

Fixes: SWDEV-246544
Change-Id: Iad3902f28a43a3986917ee37a49f10382c329940


[ROCm/clr commit: c1a498c219]
2020-08-07 09:34:27 -04:00
Jatin Chaudhary 492c85b8fb Bring .clang-format file in sync with ROCclr's
Change-Id: I1990722c0779d61f66d79a5d0649d1b64e42eaf7


[ROCm/clr commit: fb2760a8aa]
2020-08-07 05:34:44 -04:00
Jatin Chaudhary 093f0490d6 Fixing the memchannel calculation
Change-Id: Ib5f5931cc0e1ee5b7cb356c2ede0cb951ee8c9de


[ROCm/clr commit: f0d9df0b71]
2020-08-07 05:34:23 -04:00
Jatin Chaudhary bee94be69d Cuda 11 changes: https://docs.nvidia.com/cuda/cuda-runtime-api/structcudaPointerAttributes.html\#structcudaPointerAttributes
Change-Id: I8a5389b88df286043c365a734983a4c5de352102


[ROCm/clr commit: 94bfd485ef]
2020-08-07 05:33:33 -04:00
Jason Tang 04054e9b60 SWDEV-246565 - Remove passing -msram-ecc to Comgr
Change-Id: I1604a0014186a5779561da3ec3eefec65aff5c37


[ROCm/clr commit: f8f6bc16a1]
2020-08-06 12:48:53 -04:00
Julia jiang b2f831ca46 SWDEV-247185-update OpenCL build instructions in Readme
Change-Id: Id2835bfcbc3d19315c688a8160eedf367056ba5f


[ROCm/clr commit: ed1fcc7c63]
2020-08-06 12:10:36 -04:00
Saleel Kudchadker fd7ea936fe Enable queue profile only if we attach a profiler
Submit explicit profile marker for hipEventRecord to record
timestamps. Enable explicit signal profiling if the API specifies
start and stop events.

Toggle this with env var HIP_FORCE_QUEUE_PROFILING=0

Change-Id: Iae449a63ec3ebf6c2880e65d7b1dd1031a29018f


[ROCm/clr commit: dec95e58e3]
2020-08-06 11:28:16 -04:00
Jatin Chaudhary ba5507f650 Adding device memory channel information
Change-Id: I47dfa3daff97b1e3f42484dde5a4aa64244ac544


[ROCm/clr commit: 2f3df8e691]
2020-08-06 06:54:35 -04:00
Payam 1cdf2afd5e adding duration to print log for hip api calls
Change-Id: Icffa8fcacfb8ba24861d980b9553faeee4efec8c


[ROCm/clr commit: c24f884c76]
2020-08-06 06:42:21 -04:00
Saleel Kudchadker 820a456980 Add Queue profling param and toggle for HIP
Use signal timestamps if NDRange command takes forceProfile flag.

Change-Id: Ib7f187d781fd78a7346818afb3344a9378f4c104


[ROCm/clr commit: ec73340348]
2020-08-06 03:09:53 -04:00
Sarbojit Sarkar ee526f9212 Added free device memory info
Recently there were few OOM(out of Memory) issues poped. Adding trace will help know genuine OOM issue. 
Change-Id: Ie2a56bba95cead24caf1af5c807e73c383c2f5d9


[ROCm/clr commit: bc76760452]
2020-08-06 01:16:36 -04:00
Anusha Godavarthy Surya de10e7e1e6 SWDEV-244600 - HIP BLIT code object needs to have reserved symbol name
Change-Id: I8401fea5eab71c0f7414eec0666066d9553a6622


[ROCm/clr commit: 093f7fa3ca]
2020-08-06 01:14:06 -04:00
Jason Tang e1b0edf35c SWDEV-246687 - Do not use std::vector reference as class member cuMask_
The current implementation creates default reference in the stack and assigns it to class member cuMasks_, so whenever the content of the stack changes, cuMask_ would change.

Change-Id: Iefab63c335d504b83c4ae90bd34ae76c6afb8f3c


[ROCm/clr commit: 8ef5da00c7]
2020-08-05 16:57:36 -04:00
Anusha Godavarthy Surya 66be9e86d5 SWDEV-243961 Added overflow check for globalWorkSize
Change-Id: I153d99398eb4619baad8c0a52466e0d5d5f898ca


[ROCm/clr commit: 8481524416]
2020-08-05 11:18:07 -04:00
Chauncey Hui 7f5db8ed81 SWDEV-2 - Change OpenCL version number from 3185 to 3186
[ROCm/clr commit: 6373242a03]
2020-08-05 03:00:05 -04:00
German Andryeyev e34eaf17b9 Process cache coherency before mem dependency tracker
Optimizaiton to remove extra syncs uncovered a bug with the cache
coherency layer, there runtime could lose the track of mem address
if coherency layer performed a sync.

Change-Id: I25647cfa4a4be9cdbd8577ff076a740bbdac79c8


[ROCm/clr commit: 91a25df04f]
2020-08-04 16:33:18 -04:00
Vlad Sytchenko 9d72bf6523 Fix typo
Change-Id: I8b659508f567afa126aeb7749b536b443935e3df


[ROCm/clr commit: 9d0b0c32a9]
2020-08-04 11:15:21 -04:00