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12692 Commits

Author SHA1 Message Date
kjayapra-amd 4693ecf345 SWDEV-270013 - Adding code to differentiate between kern_arg + fine_grain and fine_grain segment of system memory. 
Change-Id: Id0404b2dab8561946ad0a90a77030582f7e021a4


[ROCm/clr commit: 85fafb0561]
 2021-01-28 09:48:17 -05:00
kjayapra-amd 552218f005 SWDEV-261215 - Updating file handle APIs with file sharing option to accomodate back to back hipModuleLoad calls. 
Change-Id: I8fd833b678ca38c60e2d7d02295fd01df0af5592


[ROCm/clr commit: e8208de6c1]
 2021-01-28 09:47:41 -05:00
kjayapra-amd 81c1c29bc4 SWDEV-270007 - Fixing the hipMemoryAllocateCoherent test binary path for hipMemoryAllocateCoherentDriver test path. 
Change-Id: Iae5363685d10fce32ff80ac5d6bfba460dc2b574


[ROCm/clr commit: d13124d90f]
 2021-01-28 09:47:01 -05:00
Satyanvesh Dittakavi 14be9b54a2 SWDEV-269784 - managed memory support for HIP CUDA 
Change-Id: I01f9fc64573f402031eceab24395e5cbd93007f9


[ROCm/clr commit: 0074429d05]
 2021-01-28 07:51:52 -05:00
agodavar 4017a88253 SWDEV-269400 - handle nullptr in hipFuncGetAttributes and blockSizeLimit<0 in hipModuleOccupancyMaxPotentialBlockSize 
Change-Id: Ia1c6e5713f40876b4a9c7a1c56b7b3a589c4497a


[ROCm/clr commit: 160f0edffa]
 2021-01-27 23:41:31 -05:00
agodavar 3cd436f7a4 SWDEV-270198 - hip-hcc cleanup remove lpl_ca 
Change-Id: I6cae9435397e9070efb4a953c7ba8bd3dcd98c0e


[ROCm/clr commit: 6e7ff3aaae]
 2021-01-27 23:40:58 -05:00
agodavar 53a0b62f82 SWDEV-268552 - HIP sample segfaults during hipModuleLoad, fix mmap bug 
Change-Id: I51c6061e7ac6b2524586d96fdd69b9f084b1906a


[ROCm/clr commit: 2d2f127b8a]
 2021-01-27 23:39:50 -05:00
Rahul Garg 447657f32d SWDEV-270166 - Remove Linux specific includes 
Change-Id: I929285941f28941cb41718f9fb8f618d11f1a69b


[ROCm/clr commit: fecaab1179]
 2021-01-27 12:10:37 -05:00
agodavar 0cf97308ae SWDEV-267154 - Add checks for grid and block dimensions 0 
Change-Id: I54799c0a4a42a91f6226f94a1e3ff7bc79046a98


[ROCm/clr commit: a16d91a708]
 2021-01-27 00:32:31 -05:00
Vladislav Sytchenko 29dd5f95ad SWDEV-1 - Fix Windows build 
Change-Id: I144142b2b31785fe7b1d319fb7e88eb2b41099ac


[ROCm/clr commit: 09c28dcbf4]
 2021-01-26 15:51:57 -05:00
Vladislav Sytchenko 481b25fd08 SWDEV-1 - Fix Windows build 
Change-Id: I3867b4a7175316121246a639fb8d704ad491adb6


[ROCm/clr commit: 70ac5c3bd8]
 2021-01-26 11:01:30 -05:00
Chauncey Hui a26b7cc43a SWDEV-2 - Change OpenCL version number from 3248 to 3249 
[ROCm/clr commit: a231391423]
 2021-01-26 03:00:05 -05:00
Todd tiantuo Li dcad5a921e Merge "SWDEV-267762 - add RMB(gfx1035) to deviceQuery" into amd-staging 
[ROCm/clr commit: 280b759175]
 2021-01-25 19:40:02 -05:00
Aaron En Ye Shi cdf02a8a0d SWDEV-263964 - Fix hipconfig to work on Windows 
Modify hipconfig and hipcc to properly run Windows compiler
executables. Support Windows Environmental Variables and
AMD Display Adapter info. Update flags to include quotes for
paths that have spaces, such as Program Files.

Change-Id: Ib721b318bd88be7dfa1247a30ce78c7ed6a334e8


[ROCm/clr commit: 31e772adb5]
 2021-01-25 12:53:03 -05:00
Aaron En Ye Shi 04eff63247 SWDEV-263964 - Add Windows CMake find_package(hip) 
Modify hip-config.cmake to support building on Windows
using CMake's find_package(hip). Windows CMake will work
with Ninja Generator and inheritEnvironments clang_cl_x64.

Change-Id: I03d76b5f8d695ce50ecaacb449e4eb1c1ca49700


[ROCm/clr commit: db43d7a3ac]
 2021-01-25 12:52:46 -05:00
German Andryeyev f96e973378 SWDEV-257787 - Add engine tracking per signal 
- The logic will trace compute, sdma read/write operations and
apply signals when necessary
- ROC_CPU_WAIT_FOR_SIGNAL, ROC_SYSTEM_SCOPE_SIGNAL
and ROC_SKIP_COPY_SYNC were added to control the tracking

Change-Id: I9e8e6174c63bf7784f7ab00964e2918c8667d364


[ROCm/clr commit: dbc7abaecf]
 2021-01-25 12:34:45 -05:00
Chauncey Hui 768a4383cd SWDEV-2 - Change OpenCL version number from 3247 to 3248 
[ROCm/clr commit: 99da7ecba5]
 2021-01-24 03:00:07 -05:00
Jason Tang 6fb4972c65 SWDEV-269147 - Disable ROC offline devices for now 
Change-Id: I520f3c8e56db91cbc384d08beba4e0bd4626941d


[ROCm/clr commit: 1e08a3e0cd]
 2021-01-23 14:48:07 -05:00
Chauncey Hui d7d703a7bc SWDEV-2 - Change OpenCL version number from 3246 to 3247 
[ROCm/clr commit: 29596ac3be]
 2021-01-23 03:00:04 -05:00
Vladislav Sytchenko 35655388b0 SWDEV-264411 - Disable OCLDynamicBLines test 
Change-Id: I067afa99b988e0b32edee7d27c1403d31775655c


[ROCm/clr commit: 290a16716d]
 2021-01-22 16:55:18 -05:00
Joseph Greathouse de014d4042 SWDEV-269756 - Add missing Cooperative Groups error string 
Change-Id: I1833f8bb4b48b19bb3d6cac57dda429231cf3562


[ROCm/clr commit: 51e53b6b56]
 2021-01-22 15:48:18 -06:00
Jason Tang 8eb41aee8c SWDEV-268345 - Enable address sanitizer build when ADDRESS_SANITIZER is ON 
Change-Id: I09e5c5b2c21637bc67c23267411c2996ee57aad4


[ROCm/clr commit: 64714fdbbe]
 2021-01-22 16:21:50 -05:00
Jason Tang a97c8523f5 SWDEV-268345 - Enable address sanitizer build when ADDRESS_SANITIZER is ON 
Change-Id: Iaef46358f33a399f8b047aaebc5154bb7352a69a


[ROCm/clr commit: 8d75c7e76f]
 2021-01-21 18:31:14 -05:00
German Andryeyev 1d26696235 SWDEV-257787 - Reset active signal if ROCR call failed 
- ROCR fails the call for some reason, then the signal will
become invalid and can hang on a wait. The logic will reset the
active signal in such cases

Change-Id: Ia131420200f1bbd7c9a162b8f1b06db8cecf41c6


[ROCm/clr commit: ce2e5eba6b]
 2021-01-21 17:29:34 -05:00
Tao Sang 1b1b7bffb6 SWDEV-268757 - Disable deprecation warning 
Disable it as it will fail rocgdb test

Change-Id: Ibf34c780d5bd4278adcedba1d6e057639c258483


[ROCm/clr commit: a0c8c30ae5]
 2021-01-21 15:35:32 -05:00
Tao Sang 61db7b8ad0 SWDEV-257056 - Fix cyclic dependence of hip/rocclr libs 
Solve upstream building failure due to the cyclic dependence.

Change-Id: Ibf34c789d5bd4278adcedba1d6e057639c258488


[ROCm/clr commit: 8cf28aa5b3]
 2021-01-21 13:00:22 -05:00
jujiang 300865121d SWDEV-265003 - update HIP document 
Change-Id: I1e8ec3ad380330b48d164a2ca60b0a70f7e54ae6


[ROCm/clr commit: cfca71352a]
 2021-01-20 16:24:20 -05:00
Chauncey Hui 2b0953627e SWDEV-2 - Change OpenCL version number from 3245 to 3246 
[ROCm/clr commit: de3e8b092c]
 2021-01-20 03:00:06 -05:00
Satyanvesh Dittakavi fb51766fcb SWDEV-268989 - Modify atomicAdd double to use clang builtin 
Change-Id: If9d40046df2f3f5af7cc1bd6c935fbe7d686e7d8


[ROCm/clr commit: 8da9f4d432]
 2021-01-20 02:39:15 -05:00
German Andryeyev 1086195745 SWDEV-268381 - Enable wait on CPU before SDMA transfer 
- There is a performance regression with a HW wait for HSA signal
on ROCr async operation. For now move the logic back to CPU wait.

- Fix profiling issue with multiple HSA signal per single timestamp
object. Some copies require multiple ROCR calls and if profiling is
required, then the execution time is derived from all used signals.

Change-Id: Id003e4abb8c2de378eedc152a7e389500fc6f4ce


[ROCm/clr commit: 5a8946190a]
 2021-01-19 18:24:21 -05:00
agodavar d3d408eec9 SWDEV-267298 - update install script to build hip-rocclr 
Change-Id: Ia8d72ebc41184d2fc58aa4e99966ef9b71a7fc26


[ROCm/clr commit: 2b84b58c31]
 2021-01-19 11:50:42 -05:00
agodavar 83c5482710 SWDEV-268552 - HIP sample hipDispatchEnqueueRateMT segfaults, updated to use hipModuleLoadData 
Change-Id: Ibf34c780d5bd4278adcedba1d6e057637c258485


[ROCm/clr commit: f4edf51736]
 2021-01-19 09:32:14 -05:00
Chauncey Hui 4bb8cc7f6b SWDEV-2 - Change OpenCL version number from 3244 to 3245 
[ROCm/clr commit: 44659d5d7e]
 2021-01-19 03:00:05 -05:00
Tony Tye cfc4640981 SWDEV-268864 - Use new isa class to access isa related information (part 2) 
Change-Id: If7ed535b3012aec3f2cb4eb7ab93d8f5aed9783f


[ROCm/clr commit: 6b641fb368]
 2021-01-19 03:36:22 +00:00
Tony Tye 2119330db1 SWDEV-268864 - Use new isa class to access isa related information 
Change-Id: I866eeef06f86df77c651a25fdf7bceed2c28af52


[ROCm/clr commit: 91bb64409b]
 2021-01-18 22:33:25 +00:00
Tony Tye a05c745d54 SWDEV-268864 - Remove duplicatation of isa related information 
Remove targetId_, gfxipMajor_, gfxipMinor_ and gfxipStepping_ from
device::Info as they are now available in device::Isa.

Change-Id: I381b1d4798ebf50655740e004a01ac7f86dbf668


[ROCm/clr commit: c2308216dd]
 2021-01-18 22:32:37 +00:00
Tony Tye c9c78bca63 SWDEV-268864 - Use new isa class to access isa related information 
Change-Id: I2122bf85155997d802ca54e456c2dae66b801825


[ROCm/clr commit: cd1117d627]
 2021-01-18 22:31:01 +00:00
Jason Tang 3b5b0175ac Fix build error when building with clang++ 
Change-Id: If1c9fbd6af6028bd39ff43ee53d74d5e778e2a27


[ROCm/clr commit: c0730b69d5]
 2021-01-18 09:45:19 -05:00
Jatin Chaudhary 3dc9013e52 Adding compiler option to be passed to comgr 
Change-Id: I6247cfc8f323e7ccbc95e35408ab3e8a55e16495


[ROCm/clr commit: 9943fcd81b]
 2021-01-18 06:25:44 -05:00
Sameer Sahasrabuddhe 10af608c66 Implement assert() using the new fprintf_stderr facility 
The device library now provides functions to specify the host stderr
stream in a hostcall printf message. This change implements an
assert() macro which can construct such a message. The end result is
that assertions on the device are now correctly printed on the host
stderr instead of stdout.

Change-Id: I85ab8f7848bcf28303cb8dbb8a798bc6aece7d75


[ROCm/clr commit: 2cac768a07]
 2021-01-17 23:54:46 -05:00
David Salinas b6ac0c8655 remove extractkernel 
Change-Id: I46a380059fa336aa7553669629a21e8aa7717e7b


[ROCm/clr commit: de3031988d]
 2021-01-15 11:34:32 -08:00
Satyanvesh Dittakavi 7b8972f41e device property __HIP_ARCH_HAS_SHARED_INT64_ATOMICS__ set to 1 as it has compiler support 
Change-Id: Ic91c4955d4f2d52d844471f81e6f0d19418018f5


[ROCm/clr commit: 84cda7f9c2]
 2021-01-15 11:40:09 -05:00
Chauncey Hui d4457a2a8a SWDEV-2 - Change OpenCL version number from 3243 to 3244 
[ROCm/clr commit: 97dd6c128b]
 2021-01-15 03:00:06 -05:00
DURGESH KROTTAPALLI 80f1fdb5b7 [dtest] Kernel Execution time fix for hipExtLaunchKernelGGL and hipExtModuleLaunchKernel API's 
Fix for kernel execution time using clock rate

SWDEV-238517 for enhancing hip unit tests

Change-Id: Id06df31387ecab96f219e0c1fbcdda1609f75605


[ROCm/clr commit: d27db0f038]
 2021-01-15 01:58:22 -05:00
David Salinas 5eb35595fb add new code object tooling: roc-obj-ls and roc-obj-extract 
SWDEV-229776

Change-Id: Icb11c4552515d3eff3bcf303c4a470ab90d1dd58


[ROCm/clr commit: 7e9b9534d3]
 2021-01-14 14:45:46 -05:00
Tao Sang 52954de0eb Fix building mathlibs failure 
Add back
__HIP_PLATFORM_HCC__
__HIP_PLATFORM_NVCC__

Change-Id: I1ae48678eafd849d6c25bcb204c1724b026be22f


[ROCm/clr commit: 8fc1ff7d4f]
 2021-01-14 14:03:15 -05:00
Saleel Kudchadker fff9c7f413 Cleanup redundant Barrier packet fill function 
Change-Id: I31f3250f00a362c2fdd35aca31df177fed7ddb98


[ROCm/clr commit: ce56d04dee]
 2021-01-14 12:38:00 -05:00
Tony Tye 38744069df Make HSAILProgram::gpuNullDevice private 
Change-Id: I822d1800eff0703a154dac997fe940d232eab542


[ROCm/clr commit: 2026a24438]
 2021-01-14 11:12:14 -05:00
Tony Tye 902cf1a239 Update code object handling for GSL, PAL and ROCm 
- Correct GSL path to report targets using the TargetID syntax.

- Correct GSL path to check compatibility of code objects when
  loading.

- Add concept of an device isa and create a registery used by ROCm,
  PAL and GSL.

- Support XNACK and SRAMECC target features consistently for PAL and ROCm.

- Correct logic for NullDevices and asserts to avoid memory coruption.

- Allow all NullDevices to be created for HIP.

- Numerous other code improvements.

Change-Id: I40abf3d2b22249c1492d1af5919665f8184f4e0e


[ROCm/clr commit: c7e8d91e14]
 2021-01-14 11:11:51 -05:00
Chauncey Hui b43d61e48f SWDEV-2 - Change OpenCL version number from 3242 to 3243 
[ROCm/clr commit: 4c16051f6d]
 2021-01-14 03:00:06 -05:00