The change reuses HSA signals for dispatches as a wait signal.
Skipping the barrier requires to disable L2 cache for sysmem
allocations and extra tracking for HDP access with the large bar.
ROC_BARRIER_SYNC=0 activates the new logic. Barrier sync is
still used by default.
ROC_ACTIVE_WAIT=1 enables unconditional active wait in ROCr.
The change also consolidated ROCr wait logic under single function.
Change-Id: I6bd1be30aa88258da1b1f9de319ef5a45852afd8
[ROCm/clr commit: d9397590de]
SWDEV-249719 - root cause: queues with custom CU mask are not inserted
into queuePool_ (i.e., queue of reusable HSA queues) of ROC device class
causing a crash when creating hostcall buffers for printf
Change-Id: Ieee7005d9a5a30b3113394ce23ee65927126d0d6
[ROCm/clr commit: 2e199bd492]
The progvar_prog_scope_misc test expects CL_DEVICE_MAX_MEM_ALLOC_SIZE to be multiple of integer.
Change-Id: Ic0690f5ab06ffa3feafb718beabbcf83ab53978c
[ROCm/clr commit: 740f1ba0aa]
Replace amd::Atomic with std::atomic. Remove make_atomic uses by
converting the variable to std::atomic and making sure the memory
order is relaxed when synchronizes-with is not needed.
Delete utils/atomic.hpp.
Change-Id: I0b36db8d604a8510ac6e36b32885fd16a1b8ccfa
[ROCm/clr commit: 5d4b6f74d3]
1.Some files are not built in rocclr so the issues are
not found in rocclr build. But the issues are exposed
in TC build.
2.Clear unused codes in test cmake file.
Change-Id: I1ad4decdf4df5237b93e1ea2547eb39a19f7dc4a
[ROCm/clr commit: 65075e72f1]
Replace constexpr with const in kernel source
codes because some kernel compiler doesn't
support constexpr.
Replace scheduler with __amd_rocclr_scheduler
due to name change.
Change-Id: I1ad4ddcdf1df5237b83e1ea2447eb39a19f7dc4a
[ROCm/clr commit: 9c5465f9e1]
When header==0, the legitimate packet->header is wiped out, so also add an assert.
Change-Id: I6b3037d4618719262b0d7c1792bd54f768a63660
[ROCm/clr commit: 19d1497fa2]
root cause - cooperative queue is not inserted into queuePool_ (HSA queues) of ROC device calss causing a crash when creating hostcall buffers for printf
Change-Id: I3f9aceb4e5fe6a7c7a2a549a4bb0a3511fe02799
[ROCm/clr commit: d2b9d267b2]
Fix a typo with the name define, when compilation wasn't enabled.
Force CPU prefetch if system was forced in runtime
Change-Id: Id4b578f9fa44a45426fdb5d8ecb1da803aa42313
[ROCm/clr commit: 6e69258b69]
P2P staging uses device queues for transfer, hence the current
queue must be in sync
Change-Id: I8372a60590eed9dde62cb4c67ef4df5df82a8e8d
[ROCm/clr commit: 0dc47d55d2]
The current implementation creates default reference in the stack and assigns it to class member cuMasks_, so whenever the content of the stack changes, cuMask_ would change.
Change-Id: Iefab63c335d504b83c4ae90bd34ae76c6afb8f3c
[ROCm/clr commit: 8ef5da00c7]
Optimizaiton to remove extra syncs uncovered a bug with the cache
coherency layer, there runtime could lose the track of mem address
if coherency layer performed a sync.
Change-Id: I25647cfa4a4be9cdbd8577ff076a740bbdac79c8
[ROCm/clr commit: 91a25df04f]
German Andryeyev
Sarbojit Sarkar
Tao Sang
Vladislav Sytchenko
Jatin Chaudhary
kjayapra-amd
Jason Tang
Aryan Salmanpour
Satyanvesh Dittakavi
Laurent Morichetti
Alex Xie
Jason Tang
agodavar
Saleel Kudchadker