Commit Graph

457 Commits

Author SHA1 Message Date
jujiang f63115cec6 SWDEV-286322 - clean up trailing white space
Change-Id: I01f3a559cbd1835aa2fdad7abe2bd685d90fc6a8
2021-09-01 11:45:47 -04:00
Jason Tang 1d0364e590 SWDEV-294768 - Fix PCMark10 performance drop
PCMark10 counts the time spent in clCreateKernel as part of execution
time, so as workaround for the PAL path, move code object loading
back to clBuildProgram.

Change-Id: I3b9cf1879ece08ab59f447ec165b0525bc8593a4
2021-09-01 09:25:40 -04:00
Jason Tang 7f83bcdb45 SWDEV-1 - Disable OpenCL support for gfx8 in ROCm path
Change-Id: Ie1e0c0d6273edf6b734909447c2a08252cba305b
2021-08-31 12:48:47 -04:00
Satyanvesh Dittakavi 169cc857fd SWDEV-298985 - hipMemPrefetchAsync should prefetch the data to the specified destination device
Pass the device agent specified by the user to the ROCr api instead of passing the device agent attached to the specified stream

Change-Id: I86c98935b9dc404eaa6d47ccdd082a8c3678fb36
2021-08-27 05:12:07 -04:00
Satyanvesh Dittakavi 48c1b895c0 SWDEV-299491 - Update data index in GetSvmAttributes appropriately
Fixes Seg fault caused when the attribute hipMemRangeAttributeAccessedBy
is queried using hipMemRangeGetAttribute

Change-Id: I2ceb2267d89bfc31a55d9eae2685610c7ad89b1f
2021-08-26 13:36:35 -04:00
Saleel Kudchadker 75fea4dca6 SWDEV-297448 - Improve logging
Print non pointer kernel args
Change-Id: Ice0dbc894aae1430ac085df319f4b91dfa21665a
2021-08-25 15:46:06 -07:00
Jason Tang 75cafd85b8 SWDEV-1 - Correct class name
Change-Id: I20d7092e010cabae6ac1a4eb39a62112fe4c6629
2021-08-25 16:31:46 -04:00
Saleel Kudchadker 24442be35a SWDEV-297448 - Refactor streamOperations code
Reuse FillMemory function, that should fix the cache syncs from the host

Change-Id: Ieebec5fc3ed3a322b88d5187c8dca4805ec6f84b
2021-08-25 12:33:02 -04:00
Jason Tang cb41710384 SWDEV-297294 - Make sure the binary ISA is compatible with the agent ISA
Change-Id: Idf86714d1a494d24faa665c9fede1e776ce253f1
2021-08-22 23:56:08 -07:00
Saleel Kudchadker 3a7008cf07 SWDEV-297448 - Fix typo in debug print
Change-Id: Idc94d5fcd7eabf1e9c0a9617b987c58f507813a7
2021-08-22 23:56:08 -07:00
vpykhtin 51cc9c2f8c SWDEV-1 - OpenCL binary substituion feature based on source program text hash matching.
This patch allows to substitute binary for the opencl program. It supposed to be used as:

1. Run the opencl program with -save-temps.

2. Open the cl temp and find the following text in the program header:
    Hash to override:
	Source: 0xd66bcfa20e69e605
	Source + clang options: 0x656a9dd8aedcbfb6

3. Create config file (ascii text) with a pair(s):

    <hash> <path_to_binary_to_substitute>

    where hash is the hex value from step 2 (without leading 0x), you can use either hash
    depending on what you're going to match:
	only the source text of the program or along with it's clang options.

4. Set the env variable AMD_OCL_SUBST_OBJFILE to the path of your config file.

5. Rerun the opencl program.

Change-Id: I977c80fe529ea14458194918c6ddfbe2de6a8857
2021-08-22 23:56:08 -07:00
Saleel Kudchadker 2e26ed1cbb SWDEV-297448 - Add debug log print
Change-Id: Ieba1b2e5d766e3fbe84dfc875dde8268166b3f99
2021-08-22 23:56:08 -07:00
Jatin Chaudhary 751937af14 SWDEV-286257 - Check for --save-temps option for HIP. Create Temp files if its present.
Change-Id: Ie5787d03b73081bca1ad03699ed7015badc342c7
2021-08-22 23:56:08 -07:00
Satyanvesh Dittakavi b46ffd5fe0 SWDEV-274145 - Fix to return correct data when queried for hipMemRangeAttributeReadMostly attribute
Change-Id: I9041c974b61e7a9c8fbdc748a407bbd04c060876
2021-08-22 23:56:08 -07:00
Vladislav Sytchenko f167136918 SWDEV-297808 - Don't update free memory counter when creating views
Current logic when creating a buffer view will end up going into the
allocation block. Even though no memory will be allocated, since
owner()->getSvmPtr() is already allocated, we'll still end up
calling updateFreeMemory().

Checking if we're creating a view, will skip the SVM allocation logic
and let us fall into the actual view creation logic. This won't end up
updating the free memory counter.

Change-Id: I1c260a9ef57895130b272ea1246e06e812b25b37
2021-08-22 23:56:08 -07:00
German Andryeyev 992830bab7 SWDEV-295555 - Add SVM mode query
The new query MemRangeAttribute::CoherencyMode can return current
coherency mode for the provided memory region. Coherency mode can
be one of the following types: FineGrain, CoarseGrain and
Indeterminate

Change-Id: Ib66feeeb14f57a8b1cc731c65bb3d0276d297ff7
2021-08-22 23:56:08 -07:00
Todd tiantuo Li ec411737aa SWDEV-1 - Rembrandt support
Change-Id: Id5c37e130fb2c0bdc01b84997c85324121ec4df9
2021-08-22 23:56:08 -07:00
Jason Tang f42103c6a8 SWDEV-297294 - Fix TargetID typo
Change-Id: I351e38cbcaaf926f0561c96cf6e455e7167fd4be
2021-08-22 23:56:08 -07:00
Vladislav Sytchenko 2f00782829 SWDEV-292408 - [PAL] Always force high clocks for HIP
Redshift sees around a 3x performance uplift this change.

Turning this on for OpenCL might cause unwanted behaviour, due to
apps like RSX running in the background all the time.

Change-Id: I9f32d5f2e05b6697a8aaa9ddf74474b5531bb7e1
2021-08-22 23:56:08 -07:00
German Andryeyev ec89348291 SWDEV-296329 - Add lock protection for Timestamp update
There is a possible race condition when signal reuse can have
access to a destroyed Timestamp object, because the callback
was running asynchronously. Use reference counter and lock
to allow asynchronous timestamp update

Change-Id: I6224f7c62cb0a03a7466fcc512e5e5afb06736fa
2021-08-22 23:56:08 -07:00
anusha GodavarthySurya 1884e4ca77 SWDEV-297215 - Set image descriptor as per the HSA specification for hsa_ext_image_descriptor_t
Change-Id: I0af0f09120f15a42349ec4de491df8aee7bfd46d
2021-08-22 23:56:08 -07:00
Vladislav Sytchenko 4171e9e0a3 SWDEV-283981 - [PAL] Support hostcall SQ interrupt
Note that this requires base driver CL#2340320+ to have SQ interrupt
functionality enabled by default.

Change-Id: I04b936819ebe1eb7cf5de1db4fafe83af3a1b5f6
2021-08-22 23:56:08 -07:00
Rahul Garg e9c115ad78 SWDEV-293742 - Remove external refs
Change-Id: Ib9e25a6beb97cc042bb3cc50338686a8dd09e21c
2021-08-22 23:56:08 -07:00
Jason Tang f165737096 SWDEV-296911 - Enable clgl interop for both MesaGL and OrcaGL
Change-Id: Ie3ad85a8335b1fc751812c09bb0cd30aad38dcae
2021-08-22 23:56:08 -07:00
Alex Xie ce5cc020af SWDEV-288853 - [OpenCL]: ASIC 1013 Bringup
This a cherry pick from the ASIC's branch.

Change-Id: Ic6e888f8fa96103d1e79432dd75e68faabd8cf6c
2021-08-22 23:56:08 -07:00
Vladislav Sytchenko ffbf368f4c SWDEV-293519 - [PAL] Limit mgpu SVM logic only to mgpu cases
Below logic allocates the host buffer whenever a subbuffer is created
from a SVM allocation. This is only needed for multi-device contexts.

HIP does not support multi-device contexts, hence this logic just ends
up performing unnecessary system allocations.

Change-Id: I8eae635f7c5289c52ef73434218c1658b788a456
2021-08-22 23:56:08 -07:00
Aaron Liu c6574cb906 SWDEV-294027 - [Lnx][YC] Add Yellow Carp support
Only add Roc path and don't use Pal path.

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Change-Id: I7117e2dc3c3ad4c8d563e9bbdc721f70ddba51fd
2021-08-22 23:56:08 -07:00
Satyanvesh Dittakavi 924695fb5e SWDEV-292021 - Fix Device Reset
- Device Reset should not purge the allocations that were not by the user
- Addresses QMCPack Test abort due to the removal of all the mem objects during reset

Change-Id: I7b7a123e72bcc985d7e51d17c2382bc618d3e041
2021-08-22 23:56:08 -07:00
Vladislav Sytchenko 6566361144 SWDEV-283981 - Revert "SWDEV-283981 - [PAL] Support hostcall SQ interrupt"
This reverts commit 9df70fa03ce60d47247eb0e8f278e1f8dbd33d6e.

Reason for revert: need SWDEV-294782 to be resolved before we can enable SQ interrupt support.

Change-Id: I328170b60f1a3aab28c0b1fd3191297a1a51ecb7
2021-08-22 23:56:08 -07:00
Vladislav Sytchenko 0a59c9c4c3 SWDEV-291787 - Fix Windows build
Change-Id: I1b97a1100e4c498f53aaad7157f21d0c5f8a130d
2021-08-22 23:56:08 -07:00
jujiang 84b971c7c1 SWDEV-291787 - Fix persistent direct map
Change-Id: Ic1507cc6d63e9ed574e8e169bce7bf56f4792c19
2021-08-22 23:56:08 -07:00
German Andryeyev 2babcfbdbb SWDEV-290384 - Enable active wait on CPU if HIP requested
Change-Id: Idea5adf7a4705cb999da6785e6229fe3200dce17
2021-08-22 23:56:08 -07:00
Vladislav Sytchenko 4589343c3e SWDEV-283981 - [PAL] Support hostcall SQ interrupt
Change-Id: Ic6f0ad384404712d5eeb1eaf600e231a8f8631f7
2021-08-22 23:56:08 -07:00
German Andryeyev c144383971 SWDEV-290384 - Disable HSA callback for any host wait
Change-Id: Ie876deb62859f5551f4ed69eb8187ac3fa35f42a
2021-08-22 23:56:08 -07:00
German Andryeyev ff15c0893e SWDEV-292018 - Switch to internal signals for markers
Add ref counting to ProfilingSignal class to track the last release.
If a signal was used in the marker, then don't reuse it,
but create a new one for internal usage.
Don't rely on HSA callback for the command status update if there
are no pending dispatches.

Change-Id: I19f14ed9d80acfe79993b343b2187635f8428a20
2021-08-22 23:56:07 -07:00
Sourabh Betigeri 6408b9b906 SWDEV-290685 - Relacing release fence instead of acquire for hipStreamWrite()
Change-Id: Ic2946b68c427d3e058948c0813863a27c21b903d
2021-08-22 23:56:07 -07:00
German Andryeyev e4dae85ade SWDEV-290495 - Add HSA_AMD_AGENT_INFO_SVM_DIRECT_HOST_ACCESS query
Change-Id: Ib18a53a9016eb5c5ffd51bf6835cba7299ec8421
2021-08-22 23:56:07 -07:00
Sourabh Betigeri e4ddb5e08a SWDEV-290685 - Dispatch a barrier packet with acquire system scope to ensure ordering before a hipStreamWrite()
Change-Id: I8853ad86a6634d55a98173ca3f79d93b85c08f85
2021-08-22 23:56:07 -07:00
Vladislav Sytchenko 6ff4839d76 SWDEV-273235 - Remove dependency on ADL
Currently ADL is only being included if we build HSAIL and not LC. The
only configuration that does this is Ellesmere on Linux.

As the appprofile logic doesn't do anything right now, it should be
safe to remove it.

Change-Id: I13ce8c27af08c25b95edcbfd2ee1ce447b0bfd39
2021-08-22 23:56:07 -07:00
agunashe d96481fb36 SWDEV-293742 - Update copyright end year VDI repo
Change-Id: I69d2fea4a7a43adf96ccea794270e4af991c5261
2021-08-22 23:56:07 -07:00
Saleel Kudchadker cd21af757e SWDEV-260448 - Honor NUMACTL for Direct Dispatch
Setting AMD_CPU_AFFINITY=1 will keep Async Handler thread within the
bounds set by numactl.

Change-Id: Id01b30df5127d65c29ac072bf74a04986b7128de
2021-08-22 23:56:07 -07:00
German Andryeyev f4032401cf SWDEV-289378 - Avoid CPU TS overwrite if GPU TS is available
Change-Id: I444ec284669b6a6fff31182e213b47c562c90192
2021-08-22 23:56:07 -07:00
German Andryeyev 4fd506cfe1 SWDEV-289378 - Avoid CPU TS overwrite if GPU TS is available
Change-Id: I2fc1a43c048b4fa1e42f27c4cf5c72fc7ae84e9c
2021-08-22 23:56:07 -07:00
pvellien c11c02f2c7 SWDEV-285333 - Introduce Address sanitizer hostcall service
Change-Id: Id29aacd09d0a9934a027446c57c7095804e1a454
2021-08-22 23:56:07 -07:00
Vladislav Sytchenko f6c00765e7 SWDEV-274815 - [PAL] Navi24 support
Change-Id: I934797bda471618c3f69484a1552b37345ae638b
2021-08-22 23:56:07 -07:00
Jason Tang b793811ef6 SWDEV-287088 - Workaround VM page fault on Windows
Some chunk memory are not guaranteed to be resident during
initial allocation. Use CPDMA to force resident.

Change-Id: If1a2da3e75f136caaa4c7a29d8f604d6af2639fa
2021-08-22 23:56:07 -07:00
German Andryeyev ce8dad2ecc SWDEV-290160 - Switch to global HSA signals
Runtime can't assign internal HSA signals for HIP events, because
HIP application can destroy the HIP stream or signal reuse may
occur internally. Switch to global HSA signals for HIP events.

Change-Id: Ieaea2d6b039e492b2e7c5112782a8f4e601e50a1
2021-08-22 23:56:07 -07:00
Alex Xie b5b1ccc990 SWDEV-290122 - OpenGL tests fails with CL_MEM_ALLOCATION_ERROR
Change-Id: I34d7063f05dd46c32cf59a88c455691ba5099679
2021-08-22 23:56:07 -07:00
Saleel Kudchadker 8e08880cc3 SWDEV-247372 - Add logging for debug
Change-Id: Id5a27034005a7deba37072d8a4c6f250104a96c8
2021-08-22 23:56:07 -07:00
German Andryeyev c49f1069ab SWDEV-290160 - Don't send notification for batch markers
Batch marker already has a barrier with HSA signal callback

Change-Id: I69fc63d72320c2e9cc2d2e59ebd3f07c0bd0e3b5
2021-08-22 23:56:07 -07:00