SWDEV-1 - Disable OpenCL support for gfx8 in ROCm path

Change-Id: Ie1e0c0d6273edf6b734909447c2a08252cba305b

rocclr/cmake/ROCclr.cmake

@@ -93,13 +93,6 @@ if(WIN32)
   target_compile_definitions(rocclr PUBLIC ATI_OS_WIN)
 else()
   target_compile_definitions(rocclr PUBLIC ATI_OS_LINUX)
-
-  # Additional settings for LinuxPro
-  option(BUILD_LINUXPRO "Build LinuxPro" OFF)
-  if(BUILD_LINUXPRO)
-    target_compile_definitions(rocclr PUBLIC
-      ROCCLR_DISABLE_PREVEGA )
-  endif()
 endif()
 
 target_compile_definitions(rocclr PUBLIC

rocclr/device/device.hpp

@@ -1303,6 +1303,9 @@ class Isa {
 
   /// @returns If the ROCm runtime supports the ISA.
   bool runtimeRocSupported() const {
+    if (!IS_HIP && !ROC_ENABLE_PRE_VEGA && (versionMajor_ == 8)) {
+      return false;
+    }
     return runtimeRocSupported_;
   }
 

rocclr/device/rocm/rocdevice.cpp

@@ -606,14 +606,6 @@ bool Device::create() {
     return false;
   }
 
-#if ROCCLR_DISABLE_PREVEGA
-  if (isa->versionMajor() < 9) {
-    LogPrintfError("Disabled HSA device %s (PCI ID %x) for ISA %s", agent_name, pciDeviceId_,
-                   isa_name.data());
-    return false;
-  }
-#endif
-
   if (HSA_STATUS_SUCCESS !=
       hsa_agent_get_info(_bkendDevice, HSA_AGENT_INFO_PROFILE, &agent_profile_)) {
     LogPrintfError("Unable to get profile for HSA device %s (PCI ID %x)", agent_name, pciDeviceId_);

rocclr/utils/flags.hpp

@@ -206,7 +206,7 @@ release(bool, GPU_IMAGE_BUFFER_WAR, true,                                     \
 release(cstring, HIP_VISIBLE_DEVICES, "",                                     \
         "Only devices whose index is present in the sequence are visible to HIP")  \
 release(cstring, CUDA_VISIBLE_DEVICES, "",                                    \
-        "Only devices whose index is present in the sequence are visible to HIP")    \
+        "Only devices whose index is present in the sequence are visible to CUDA") \
 release(bool, GPU_ENABLE_WGP_MODE, true,                                      \
         "Enables WGP Mode in HW if available")                                \
 release(bool, GPU_DUMP_CODE_OBJECT, false,                                    \
@@ -245,6 +245,8 @@ release(bool, ROC_SYSTEM_SCOPE_SIGNAL, true,                                  \
         "Enable system scope for signals (uses interrupts).")                 \
 release(bool, ROC_SKIP_COPY_SYNC, false,                                      \
         "Skips copy syncs if runtime can predict the same engine.")           \
+release(bool, ROC_ENABLE_PRE_VEGA, false,                                     \
+        "Enable support of pre-vega ASICs in ROCm path")                      \
 release(bool, HIP_FORCE_QUEUE_PROFILING, false,                               \
         "Force command queue profiling by default")                           \
 release(uint, PAL_FORCE_ASIC_REVISION, 0,                                     \