Compiler behavior is undefined if the right operand is negative,
or greater than or equal to the width of the promoted left operand.
For release builds with address sanitizer enabled, this compiler
optimization behavior leads to unsupported queue size value since
current method shifts till 128 bits on a 64 bit value.
Signed-off-by: Sreekant Somasekharan <sreekant.somasekharan@amd.com>
Change-Id: Iafdc82d0dfb7f79e3012fb7bb70eda80e4b7a7a6
Starting with GFX11, wptr BOs must be mapped to GART for MES to determine work
on unmapped queues for usermode queue oversubscription (no aggregated doorbell)
Change-Id: I10e30fdc2bec587cef9427faa4874957988c34b3
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
If there is connection between GPU and CPU with weight 13,
KFD_CRAT_INTRA_SOCKET_WEIGHT, then this is AppAPU.
This will be used to skip tests not suitable for AppAPU.
Change-Id: If6fad81528b52afd4ac4cefa508d787b0f6637ca
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Add gfx version for VGPR size per CU calc, add FAMILY_AV to KfdFamilyId,
add blacklist filter to kfdtest.exclude.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I9b8072e45f4d497e0a8fd3f8f97f1425238e8b42
See description of previous revert.
This reverts commit 564913526a.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I969dc6469e62b50cd7ba0595918538602afa7516
This patch and the previous made it such that the queue ring buffer was
allocated as non-paged for GFX11+. The queue ring buffer should not be
mapped as non-paged; the non-paged requirement on GFX11 is only needed
for the queue wptr.
This patch was causing issues on various tests, such as intermittent
CP_INTSRC_BAD_OPCODE interrupts.
This reverts commit e40ae8481e.
Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I55b64aed73dc3b792f0756ae00daf6e10d93ce10
On error mmap returns value MAP_FAILED, which is (void *)-1, not NULL
pointer.
Change-Id: I81b187266c943fa0aa4fab21b529d4c2989b12ad
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
While this is currently only used in one subtest, it's useful to have
this separated into the test utilities. This will also allow us to check
for PCI Atomics support before trying to run them.
Signed-off-by: Kent Russell <kent.russell@amd.com>
Change-Id: I9704d151bfaa627eceae8399cc46c15babde6ff1
This error messages should be handled by the caller.
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Change-Id: I68d879d6d41835f47b8ac138c2218eaa6b86a512
KFD changes are ready, all SVM tests should pass now. Skip SVM tests if
the SVM API is not supported.
Change-Id: I5e358565a0458eea45eae0aaf4969ce3a36574a7
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Sierra <Alex.Sierra@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
The original test takes forever to run on emulators because emulators
are much slower than Asic. So intelligently detect the emulator scenarios
and reduce the run time by slashing the iteration times.
Change-Id: I087f43c04c2b23b5ab2ecaad07533b767c337e94
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
NumCpQueues and NumSdmaQueuesPerEngine should be got by kfd driver not hardcode.
So add two data fields in HsaNodeProperties then thunk is able to get it from sysfs
that exposed by kfd.
v2: change NumCpQueues/NumSdmaQueuesPerEngine to one byte.
v3: merge two commits as one to avoid ABI update two times.
Change-Id: Ie386e4685f13493e22db6e207a399db6a4c5b9dc
Signed-off-by: Huang Rui <ray.huang@amd.com>
If NUMA system no available memory on node 0, mbind will fail on node
0, so set flag NoNUMABind=1 to bypass mbind for all test cases which use
node 0 and allocate system memory.
Change-Id: I7962938ad2bed5a293ca5e6a8500c7f7e15ff453
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
This will facilitate the need of halting the execution during debugging.
Change-Id: I058c81bbc9f655bbc477b2b542d6b43aa423324c
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
When large bar is not available, we can use
xgmi to do p2p tests.
Change-Id: Ib7b59fb8a4d41f605739a0428973f6b2f1a3450f
Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com>
Some SDMA packet format might be different among asic versions
Change-Id: Ic7eda7554c23e3972e168480874ca67a92677346
Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
This will facilitate us to avoid using family ID to differentiate the
SDMA engines and SDMA queues.
Change-Id: I8d6203cc5d330e9130a1b2624997c86ba53e8ae4
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
KFDPerformanceTest.P2PBandWidthTest[push, push] takes about 3 seconds
on 4 gfx906, the default g_TestTimeout 2 seconds is not enough to wait
for sDMA queue rptr is consumed. Use kfdtest command line option
--timeout=6000, the test is finished and result is reasonable twice as
P2PBandWidthTest[push, none]. Change P2PBandWidthTest wait timeout to 6
seconds.
Add timeout argument to function WaitOnValue, BaseQueue.Wait4PacketConsumption
SDMAQueue.Wait4PacketConsumption, PM4Queue.Wait4PacketConsumption with
default value is g_TestTimeOut.
Change-Id: I0aa04d644339feaeea695e41647ae66568beab9e
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
On small bar multi-gpu system, hsaKmtMemoryMapToGPU will fail due to latest
kernel P2P sanity check. Swith to use hsaKmtMemoryMapToGPUNodes to fix
the failure
Change-Id: Id8b6329d1243df0e908cc9a171b5c7f9156f4a8b
Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Similar with SdmaEventInterrupt, verify event interrupt on pm4 queue.
Change-Id: I0e43f26fd0d965126985820704215d2ef5e52c1a
Signed-off-by: xinhui pan <xinhui.pan@amd.com>
ASSERT failures result in immediate termination of the test. EXPECT
returns a failure but continues execution. Reserve ASSERT for required
functionality (node initialization, queue creation, etc) where the rest
of the test cannot run if that call fails. Use EXPECT everywhere else
Change-Id: I1c11326fc3ae22b50fa83b07b3b49af1e1f4e69e
Clean up the KFDTest style via CPPLint. Some warnings remain regarding
volatile variables being cast to void*. This is the command used:
cpplint.py --linelength=120
--filter=-readability/multiline_string,-readability/todo,-build/include,-runtime/references
multiline_string is due to using ISA code
todo is to avoid errors that we don't have TODO(username) instead of TODO
include is about including the folder in the header includes
references is regarding non-const references '&' being const or using
pointers. That can be addressed later
Change-Id: I3c6622da0a13dd33ab29b2bfff48be25e763b750
This will facilitate the user cases that some APU asics is used as dGPU.
Change-Id: Ib3a79ae31a03e7a618c7785166f56282a7617127
Signed-off-by: Yong Zhao <yong.zhao@amd.com>
The code is a snapshot up to this commit around July 31 2018.
commit b00fadff36a3
Author: xinhui pan <xinhui.pan@amd.com>
Date: Mon Jul 30 09:53:03 2018 +0800
kfdtest: skip MMapLarge test on apu
Change-Id: I40e9a5a18e5c8f075e5290bb80532f1a3f689058
Signed-off-by: Yong Zhao <yong.zhao@amd.com>
Sreekant Somasekharan
Yifan Zhang
Philip Yang
Graham Sider
Kent Russell
Alex Sierra
Felix Kuehling
Harish Kasiviswanathan
Eric Huang
Yong Zhao
Gang Ba
Huang Rui
Oak Zeng
shaoyunl
xinhui pan