This will facilitate the need of halting the execution during debugging.
Change-Id: I058c81bbc9f655bbc477b2b542d6b43aa423324c
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
The tests are useful to triage the fundamental queue submission
functionality by excluding the packet format variable from the equation.
Change-Id: I2c7fcda811f93bdefc1b62396233559416be44e7
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
The class is very useful for triaging complex SDMA issues.
Change-Id: Ib5de729f7fc62f41e894ef98d3967e7e1745d454
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
When large bar is not available, we can use
xgmi to do p2p tests.
Change-Id: Ib7b59fb8a4d41f605739a0428973f6b2f1a3450f
Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com>
Need to check the kfd debugger version of the kernel before
calling kfd debugger tests in kfdtest. If they are out of sync,
the tests may fail.
Change-Id: I1df5e89fb1199304e6fbe8973c60b76062514c03
Signed-off-by: Philip Cox <Philip.Cox@amd.com>
The KFD debugger is only supported on gfx9 platforms, so we need to
restrict it from running on gfx10 platforms until it is supported.
Change-Id: I500f0e20fda71021f2cce70a67fc8d9d042209fe
Signed-off-by: Philip Cox <Philip.Cox@amd.com>
The memory need to be mapped for both local and remote GPU access
Change-Id: I4aeaffc0851b6107fc91e9eaa6150764b06f5ca9
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
Allocate system memory from node id 0 will fail on NUMA system which has
no memory on node 0. Change to use new flag NoNUMABind to allocate
system memory from NUMA nodes which have free memory.
Change-Id: I8ef9ca28fc2ab5dd31d07a2d3eaf1d5886e798a0
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Those tests are actually did not function up to its expectation because
some underlying functions such as suspend/resume and disable/enable KFD
were not implemented. Those interfaces would never be implemented, so
delete them.
Change-Id: Ib5872ba2f35e307221e43791cda1782c6b6bb4d1
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
A number of tests are no longer broken on gfx802.
Change-Id: If70c77423f8f14de59490ab8ca156b0c4e7b5cf1
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
enable thunk query api to report if queue is newly created
test new queue bit test on clear events.
also fixup cleanup to disable debug trap.
Change-Id: I3ebe2d85da66f28b8c82f0e68461ee7d32ec0b0d
Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com>
Reviewed-by: Philip Cox <Philip.Cox@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
adding test cases to query debugger pending events
Change-Id: I089754c508e476ce7b19e1cbd84235e4474b30c4
Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com>
Reviewed-by: Kent Russell <Kent.Russell@amd.com>
Reserve half of dma32 zone for non-NUMA system.
Change-Id: Id7aea7b6ff6cc1cc7983ecd95f8078b7f1be630c
Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com>
Only run the P2P test over the specified source and destination nodes if user already specify them
Change-Id: Ia3c0195cead7f46e3e28507f3255d8c59a287ab8
Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
On GFX10, the wave size is determined by the COMPUTE_DISPATCH_INITIATOR value passed to
DISPATCH_DIRECT.CS_W32_EN, default 0 value was giving 64 lane waves
Change-Id: Ie8c407a24bd2825757ec481be62247b35047e5ca
Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
We should use the SE number reflected by NumShaderBanks of the node
rather than hardcoding it.
Change-Id: I945fb001f81ce506249cf485a7ce25aee8219bc7
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
Remove the CHIP name from the shader ISA and add wave_size(32) to make the same
shader can be used for both GFX9 and GFX10
Change-Id: I16ea72f87980c3d9c11298e20c06a0a073fe9a28
Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
v_add_u32 was removed from gfx10, use carry-out explicit instruction
v_add_co_u32 instead on both gfx9 and gfx10
Change-Id: I1fcd5956844457a676757ad13bdce7f5304bb34b
Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Modified shaders in KFD memory test to support gfx10.
There is no gprs register for flat_scratch on gfx10.
Use s_setreg_b32 instruction to set flat scratch base
address register
Change-Id: I505156a046056b61ce2d873343feb50ce635274a
Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
This functionality doesn't work on GFX9+, and was disabled for gfx802.
Remove the test altogether for now, especially since some kernel changes
broke it on gfx803, and the functionality is deprecated now anyways. Leave
the code for reference, but "#if 0" it to prevent it from compiling or
being in the kfdtest binary
Change-Id: I848b4f23201f18612cbdc122a5b46e4010c4af2a
Some SDMA packet format might be different among asic versions
Change-Id: Ic7eda7554c23e3972e168480874ca67a92677346
Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Because not all ASICs (like gfx908) have GFX rings, we should use SDMA
rings instead of GFX rings.
Change-Id: Ibcc9f9e555302ba4ce25ac76c2ca73b8c3962a58
Signed-off-by: Yong Zhao <Yong.Zhao@amd.com>
use family ID as parameter when construct the packets
Change-Id: I6c1706954ab7b8cbb8bef2aab16edf21f5e1abf0
Signed-off-by: shaoyunl <shaoyun.liu@amd.com>
Currently the test only covers relatively small buffers sizes. It's
useful to test buffer sizes up to 1GB to see the impact of features
that target the efficiency of large buffer allocations and mappings.
Change-Id: I2e8d5afd482894dbe2166f32d38091199b9c15e6
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
This test is designed to reproduce soft-hangs cause by HWS running
with oversubscription.
Change-Id: I49861522b3ff5ba50df5ddc968545c35ccb25353
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Create KFDMultiProcessTest base class for tests forking multiple
child processes. Derive KFDEvictTest from that class.
Change-Id: Ie5f3362c45be2b807bf7a83839ab3820352a67f9
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
1. Use s_mov_b32 to move 0xcafe to s18. s_movk_i32 is a sign extention move
instruction. Oxcafe will be extended to 0xffffcafe which is not desired
2. Add wait to s_load_dword instruction to make sure memory read finish before
the next store instruction.
Change-Id: I665d1d471019edfaba5693e07cdc567d4103573f
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
If TTM eviction and restore happens, it may takes very long time if
retry, the longest time is 5 minutes during my test. There is chance
packet is submited to queue while eviction, we have to increase the
Wait4PacketConsumption timeout.
The queue will continue to execute after eviction and restore. If we
upmap the memory from GPU while queue is evicted, this will cause VM
fault. Change to unmap memory after queue is destroyed.
Change-Id: I1b44e2274ea7b83398b2e3293578dad6947cb5af
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Because dma32 zone is on node 0, use all system memory on node 0 will
cause TTM eviction to free dma32 zone for other devices which only
work with 32bit physical address. The TTM eviction and restore may take
too long and cause queue timeout.
Running on other NUMA nodes, the NUMA default memory policy is
MPOL_PREFERRED, means TTM will get pages from local node first, and then
get remaining pages from other nodes. Check /proc/buddyinfo can confirm
this.
Reset NUMA bind to all after the test.
Change-Id: I39b373c07a2d5aa396f5c7602bffabab0481930f
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Allocating these before the big memory allocations minimizes the chances
of spurious out of memory errors.
Change-Id: I94aff9ec7ea34d4dc98ae08ac4cf9dc335b3df7f
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
This reduces thrashing due to graphics submissions only and
significantly speeds up the BasicTest when keeping idle compute
processes evicted. In the BasicTest compute is always idle, so
only one compute eviction and no restore is triggered. Then
graphics submissions complete quickly without thrashing each other.
Change-Id: Iae6da98903b20424a5097f235e1d09cf13e4b41b
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
1. umc error injection only accepts parameter "0 0".
2. flush output to file in order to make writing happen
immediately.
Change-Id: I8d3bde287caee6b90b6eec56c760f5a228be7595
Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com>
The path was wrong based on assumption that GPU dri render
node starts from 0, because if there is a VGA device on
board, node 0 will be VGA and node 1 will be GPU. So the fix
will look at the name of GPU minor node and find the correct
primary node on which RAS debugfs entry exists.
Change-Id: Icc5e63ce48698d5d29105c0417e3bec8afa0a7c8
Signed-off-by: Eric Huang <JinhuiEric.Huang@amd.com>
Oak Zeng
Yong Zhao
Eric Huang
Philip Cox
Philip Yang
Felix Kuehling
Jonathan Kim
shaoyunl
Kent Russell