İşleme Grafiği

1096 İşleme

Yazar SHA1 Mesaj Tarih
Flora Cui 5587fa5224 rocr: try DefaultSignal if interrupt is disabled
Reviewed-by: Shane Xiao <shane.xiao@amd.com>
Change-Id: I5d3a3813f56990f3aca61be23215faeb0a9629cb
Signed-off-by: Flora Cui <flora.cui@amd.com>


[ROCm/ROCR-Runtime commit: 2cc279dbbc]
2025-01-02 11:09:20 +08:00
Shane Xiao 6e0b1642b3 rocr: Fix missed read lock in ExecutableImpl::FindHostAddress
Change-Id: Ide9b5cc3aa235d3768ebbfd8dc1560bf70fd0743
Signed-off-by: Shane Xiao <shane.xiao@amd.com>
Reviewed-by: Qiang Yu <qiang.yu@amd.com>


[ROCm/ROCR-Runtime commit: 2d40493c31]
2024-12-30 06:43:25 -05:00
Tim Huang 30f1a5f582 rocr: add ISA target support for GC version 11.5.3
This add support for GC version 11.5.3

Change-Id: I1d55e33198620d3493967558c25c636d5f7ab347
Signed-off-by: Tim Huang <tim.huang@amd.com>


[ROCm/ROCR-Runtime commit: e515b0bca5]
2024-12-30 01:44:53 -05:00
Chris Freehill 6c04d75c3f rocr: Dynamically allocate IsaMap
This is to avoid use after free at the program's end, when statics
are destructed.

Change-Id: Id6bf26f25a58d13bdf1ee99c852adae8add76569


[ROCm/ROCR-Runtime commit: 67b0082443]
2024-12-20 09:20:09 -05:00
Flora Cui 6a3d0e6412 rocr: skip exception_signal_ handling on exit
if .supports_exception_debugging is not enabled.

Change-Id: I944fe7aa4f3068964f47e23f5259c3802d1e9556
Signed-off-by: Flora Cui <flora.cui@amd.com>


[ROCm/ROCR-Runtime commit: ac64c54d74]
2024-12-19 04:14:32 -05:00
Apurv Mishra 23ab95b5f2 rocr: multiple uninitialized and unused variables
Minor modifications to multiple source and header
files based on Coverity report

Change-Id: I4a73d0f56640983c4d5124e13c8c280245cca672
Signed-off-by: Apurv Mishra <apurv.mishra@amd.com>


[ROCm/ROCR-Runtime commit: 699d0140be]
2024-12-18 10:11:13 -05:00
Apurv Mishra 2f2cb50cf2 rocr: refactor of runtime.cpp based on Coverity
Add return checks, initialization and clean
redundant memory operations

fix 1: check return value of 'setsockopt' for error
fix 2: check return value of 'PtrInfo' for error
fix 3: move 'tool_names' instead of copying
fix 4: call 'munmap' for 'va' only once
fix 5: use 'ssize' for possible return values of -1 (err)
fix 6: add missing initialization in constructors
fix 7: add initialization for some scalars and pointers

Change-Id: I07d90e36d4e1fe48c4de4f44e18083e5ed4c5fbc
Signed-off-by: Apurv Mishra <apurv.mishra@amd.com>


[ROCm/ROCR-Runtime commit: 441bd9fe6c]
2024-12-18 10:06:55 -05:00
David Yat Sin 95ee8b36d7 rocr: Avoid deadlock due to queue signal not updated
Make sure waiting_ count for queue signal is always > 0 so that we
always call hsaKmtWaitOnEvent to force hsaKmtWaitOnEvent to return.

Remove incorrect warning print when running in debug mode.

Call internal Signal::WaitAny instead of AMD::hsa_amd_signal_wait_any
to avoid extra function calls.

Change-Id: I9e41b704643e4e8ee7402b1379b1c30ff4c544ef


[ROCm/ROCR-Runtime commit: 5da1889fb7]
2024-12-16 10:25:19 -05:00
Chris Freehill 42662ee44c rocr: Check generic feature compability separately
Check that generic ISAs are compatible with an agent separately
from where feature compatibility is checked.

Change-Id: I403012db5536ff1f2faf93cf013db03ef07ac1c8


[ROCm/ROCR-Runtime commit: e93efba9cc]
2024-12-11 16:08:44 -05:00
Eddie Richter 8ea388af92 rocr/aie: AIE Queue Processing
Change-Id: I681c971ba7229037ca85d5529838aa7bbe5820e2


[ROCm/ROCR-Runtime commit: e9cc839b2b]
2024-12-10 10:50:02 -05:00
Yiannis Papadopoulos a317650289 rocr/aie: Add AIEAgent missing info
Change-Id: I32e9acc7b8b7dee4e9ff5524fec5c440bb8ece0e


[ROCm/ROCR-Runtime commit: c343a9dc60]
2024-12-07 00:04:54 +00:00
Apurv Mishra 1a7d1fd378 rocr: initialize 'data_rdy' & correct 'const' functions
'const' member functions have syntax errors and struct
'data_rdy' have uninitialized members

v1: correct misplaced 'const' for member functions
v2: add initialization for 'data_rdy' in constructor

Change-Id: I29bada475217c9df81f0d0400e7a3f44aa8afe0c
Signed-off-by: Apurv Mishra <apurv.mishra@amd.com>


[ROCm/ROCR-Runtime commit: c48e8a918e]
2024-12-06 09:17:02 -05:00
David Yat Sin b7208786a2 rocr: Avoid polling for SDMA signals
When all 64-bits of the signal value are 0, we can skip polling for that
signal.
We need to keep signals as 64-bit numbers as part of the spec. But most
users of ROCr do will never set the signal value to more than 32-bits.
When the dependent-signals are less than 32-bits, avoid adding extra
SDMA poll packet as this adds latency to the SDMA copies.

Change-Id: I37dca65fe3f060dc7164f49b98cb1985023663c4


[ROCm/ROCR-Runtime commit: 0544c2336b]
2024-12-04 16:45:04 -05:00
Chris Freehill 2a492e6f04 rocr: Add gfx9-4-generic support
Change-Id: I4ebfbf0dcffa5b784d7fbfda7398d44dcc47aaef


[ROCm/ROCR-Runtime commit: f32e264933]
2024-12-03 19:33:57 -05:00
taosang2 a5de0f048d rocr: Support different address modes
Support different address modes in X, Y, Z directions

Change-Id: If1db5a8af33c92ddc4b48968c3d8eceb97daea6a


[ROCm/ROCR-Runtime commit: df250a49a5]
2024-12-02 09:07:56 -05:00
David Yat Sin 91a28fce54 rocr: Move _loader_debug_state to rocr namespace
This avoids exposing the symbol to the default namespace

Change-Id: I2fe5fbab4b59f271effacab93eeb2d95c236ae02


[ROCm/ROCR-Runtime commit: 147abb6ca0]
2024-11-29 10:44:23 -05:00
Chris Freehill ed575729bd rocr: Dynamically allocate supported_isas map
This was missing from a previous commit regarding
dynamically allocated static data structures.

Change-Id: Iae1c674e762f85e3aebf338210ba96942ba80278


[ROCm/ROCR-Runtime commit: eec2130443]
2024-11-27 11:11:22 -05:00
Apurv Mishra baf737a3cb rocr: declare 'args' as class member in 'os_thread'
Removed 'args' as a unique pointer and deletion in
'ThreadTrampoline', then declared as a class member.

Change-Id: Ia52058392d0170e8b5e57cfdd2c587f47a6f93f0
Signed-off-by: Apurv Mishra <apurv.mishra@amd.com>


[ROCm/ROCR-Runtime commit: 89115369cc]
2024-11-27 10:27:40 -05:00
Apurv Mishra b552e9d15d rocr: initialized missing fields in ext_table
Added initializations for 'ext_table' in 'hsa_system_get_major_extension_table()'

Change-Id: I5e46592192b7d7a294d30011481f16e93db11794
Signed-off-by: Apurv Mishra <apurv.mishra@amd.com>
Reviewed-by: David Yat Sin <david.yatsin@amd.com>


[ROCm/ROCR-Runtime commit: d91a14ae0c]
2024-11-26 10:45:29 -05:00
German Andryeyev 18c28ebdaf rocr: Add logic to track the age of events
Some KFD versions can return from hsaKmtWaitOnMultipleEvents_Ext without
any wait and require the second call without age array init.

Change-Id: I8358c33080084d47c273c2a2827085d0570c8201


[ROCm/ROCR-Runtime commit: 816af44b05]
2024-11-25 14:55:22 -05:00
Apurv Mishra 76812e7110 rocr: uninitialized pointer read in InitScratchPool
Initialized 'scratch_base' as a nullptr to avoid
uninitialized read in hsaKmtAllocMemory()

Change-Id: I3b0e67f3fd3b591e1d21d691f0777b1d1a059b73
Signed-off-by: Apurv Mishra <apurv.mishra@amd.com>


[ROCm/ROCR-Runtime commit: 6f6ee9679c]
2024-11-25 14:02:37 -05:00
Apurv Mishra 6ff8fb022a rocr: Uninitialized scalar variables and pointer
Added check and initialized parameters for PtrInfo().

v1: Checking if PtrInfo() returns success.
v2: Initialization for variables being passed to PtrInfo().

Change-Id: If3ec4608c8e58be259b4fd51ad681b9bc34ddff6
Signed-off-by: Apurv Mishra <apurv.mishra@amd.com>
Reviewed-by: David Yat Sin <david.yatsin@amd.com>


[ROCm/ROCR-Runtime commit: 610f8a1e0f]
2024-11-22 16:23:29 -05:00
Konstantin Zhuravlyov bee079fc24 loader: add gfx9-4-generic support
Change-Id: Icb148f7a78a4ce0fc661e35d0df605e05db2de3d


[ROCm/ROCR-Runtime commit: 4c7a9a0f67]
2024-11-14 12:47:46 -05:00
David Yat Sin ed5bbc1eeb rocr: Fix sem_post overflow errors
WaitSemaphore and PostSemaphore are used in the HybridMutex
implementation. If HybridMutex did not have to call WaitSemaphore when
acquired, then calling PostSemaphore would cause the internal count
inside sem_t to slowly grow to large values and eventually cause
overflow.

Change-Id: I173fc17c874b49926e56991405e9086ea8c138fc


[ROCm/ROCR-Runtime commit: f58aff630c]
2024-11-13 21:57:26 -05:00
David Yat Sin 3e694d739a rocr: Add HSA_SIGNAL_WAIT_ABORT_TIMEOUT
Add support for abort timeout when hsa_signal_wait_relaxed is called and
signal does not clear within timeout.
timeout is in seconds

Change-Id: If1db5a8af33c82ddc4b48968c3d8eceb97d0ea6d


[ROCm/ROCR-Runtime commit: 4ec730f1dc]
2024-11-13 21:57:02 -05:00
Konstantin Zhuravlyov 5133b16637 loader: add gfx12-generic support
Change-Id: I0bf5d48ec357278bdb7a9c4eae61a7b7995411f0


[ROCm/ROCR-Runtime commit: ec3d4aa5e9]
2024-11-11 16:27:47 -05:00
Konstantin Zhuravlyov a384ada964 loader: add gfx1153 support
Change-Id: Ie3f0ecf1c6631d95cbff5e14ddc48e751f4c356d


[ROCm/ROCR-Runtime commit: cf9c2efbbd]
2024-11-11 16:27:39 -05:00
Konstantin Zhuravlyov 048a6dc0bd loader/nfc: reorder cases when switching on targets, specific first, generic second
Change-Id: I47f38c1691b9b6ff589f7ff445143997b0801dc6


[ROCm/ROCR-Runtime commit: 7d9a51e22a]
2024-11-11 16:27:34 -05:00
Konstantin Zhuravlyov 68f7fb4fa7 loader: add missing support for gfx700
Change-Id: Ia08e93b0e2d300a183a7a5fb92604cd801b2d52a


[ROCm/ROCR-Runtime commit: 4344f012b6]
2024-11-11 16:27:27 -05:00
Konstantin Zhuravlyov 45c824a387 amd_hsa_elf.h: bring EF_AMDGPU_MACH_* in sync with llvm-project
- formatting
  - add EF_AMDGPU_MACH_AMDGCN_RESERVED_0X56
  - add EF_AMDGPU_MACH_AMDGCN_RESERVED_0X57
  - add EF_AMDGPU_MACH_AMDGCN_GFX1153
  - add EF_AMDGPU_MACH_AMDGCN_GFX12_GENERIC

Change-Id: Ibad464c659137c0c98fa9fa9d1f293ea62684ee6


[ROCm/ROCR-Runtime commit: d9404a52ed]
2024-11-07 18:03:27 -05:00
Chris Freehill 9c7e73ff98 rocr: Dynamically allocate static global memory
To allow non-POD global variables to last until the last thread
has exited, use "new" to allocate the memory instead of static
allocation.

Change-Id: Ica571b61ff8068a52e472c49cb1c44917e60c8c8


[ROCm/ROCR-Runtime commit: 0878deda17]
2024-11-07 09:53:31 -05:00
Jaydeep Patel 6dc8a4ae55 rocr: Decrement counter only if event is popped
Also restore dead signals cleanup for old path when HSA_WAIT_ANY_DEBUG
is used.

Change-Id: I51a7404991443c9f6cbf57b4b9e9faa694b9538c


[ROCm/ROCR-Runtime commit: 700f1d9abd]
2024-11-07 01:03:09 -05:00
Yiannis Papadopoulos 83513d4daf rocr: Adding pointer to the owner driver in Agent class
Change-Id: If913d7c7e4caf6d6e6eee3a858a27c6027c2923f


[ROCm/ROCR-Runtime commit: 2837825b14]
2024-10-31 12:29:10 -04:00
Chris Freehill 4005fd9b9d rocr: Fix supported_isas transient memory issue
An ASAN run of the release build revealed some elements of
the supported_isas static map were still using stack data. This
change makes it use heap data so it will persist.

Change-Id: Ie51887e88b9e2dec27acfc97ea45a6219fea971c


[ROCm/ROCR-Runtime commit: c7521a5f2a]
2024-10-31 11:59:29 -04:00
Jonathan Kim ce09a178d3 rocr: revert back to old copy behaviour with no xgmi sdma engines
SDMA queue resources are limited when all SDMA copies are bottle necked
into 2 engines.  Callers will not be able to make the best decisions
to allocate queue resources fairly so have ROCr fallback to old round
robin behaviour dictated by KFD.

Change-Id: I93d52297976d74e20129c5eb1dcfbfa5aa5067a7


[ROCm/ROCR-Runtime commit: 7f8676e177]
2024-10-29 16:01:01 -04:00
Chris Freehill 8fe7c40390 rocr: Generic ISA targets support
Change-Id: I6a0341ec9c1ec1e710143676b80a8a3c1a78f725


[ROCm/ROCR-Runtime commit: 0c18ff22e1]
2024-10-28 08:54:06 -05:00
Chris Freehill dd037425ed rocr: Quiet some ROCr compile warnings
These are mostly AIE related, but there are a couple of others.

Change-Id: I549e004772160ca282d4c94dc9d94dd2ccae8b1c


[ROCm/ROCR-Runtime commit: 08699069d6]
2024-10-28 09:08:14 -04:00
German Andryeyev 6617af10e6 rocr: Disable WaitAny() in AsyncEventsLoop()
- Add the new path to avoid WaitAny() calls  in AsyncEventsLoopp() with
HSA_WAIT_ANY_DEBUG key. The new path is selected by default.
The optimizaiton combines all logic of WaitAny() in a single processing loop
and avoids extra memory allocations or ref counting.  Also it won't spin
on the CPU if all events are busy.

Change-Id: I197ce60d0d023fbb672f700d6e87702686f1f55a


[ROCm/ROCR-Runtime commit: 0fc7369ba5]
2024-10-25 14:37:02 -04:00
David Yat Sin 7d84abbc3b rocr: find first dispatch pkt that needs scratch
On GPUs where EOP is handled in asic, the read_dispatch_id is not always
updated after each packet. Look for the first dispatch packet that needs
scratch memory before allocating scratch.

Change-Id: Ibf4b4b485f99bf2fabfe48e9609ca99111fdafbe


[ROCm/ROCR-Runtime commit: d90fbee9c4]
2024-10-25 14:36:40 -04:00
Yiannis Papadopoulos 6525bb1a5d rocr/aie: Remove unused set container and error when using AIE agents in MemoryRegion
Change-Id: Icf1e56412c840810a679f376293a616068841b8c


[ROCm/ROCR-Runtime commit: c7785a6da1]
2024-10-23 09:42:32 -04:00
Chris Freehill 234de802e6 rocr: supported_isas map elements should persist
The supported_isas static unordered_map was adding stack
allocated Isa objects. Instead, make the objects statically
allocated, as supported_isas itself is.

Change-Id: I23405e218290d48deea6f984f76c57e7b43e314e


[ROCm/ROCR-Runtime commit: fd99b74287]
2024-10-22 18:09:03 -05:00
Chris Freehill b617b05c2a rocr: Ensure globals are initialized at first use
When ROCr is built as a static library, global variables
were often not initialized to valid values at their first
use. This change addresses that problem.

Change-Id: I550fa41feb3bc04b9cc686bcfb4acf2a7b651a88


[ROCm/ROCR-Runtime commit: 9b13bcd0ac]
2024-10-16 23:19:48 -04:00
David Yat Sin 35187a00df rocr: Add executable flag for memory allocations
Change-Id: I8307cd3562c3ab9c12fef8c457a59916e33b7923


[ROCm/ROCR-Runtime commit: d58c9dea0a]
2024-10-15 16:52:00 +00:00
jokim 1e7d5c5833 rocr: Workaround segfault on GFX9 devices older than GFX90a
Devices older than GFX90a hit a segfault on queue unmap when an
SDMA queue has been assigned a fixed engine.  Bypass fixing the
engine for these devices for now.

Change-Id: I7d2f882d2377f004a7bb65f3b397396db07ce6d3


[ROCm/ROCR-Runtime commit: 1d6ff45673]
2024-10-10 14:41:10 -04:00
David Yat Sin 2445514435 rocr: Fix memory leak on non-visible GPUs
Fix memory leak for memory regions objects when GPU is masked using
ROCR_VISIBLE_DEVICES.

Change-Id: I610842a18adbc3cdc854b12650844e271bc00592


[ROCm/ROCR-Runtime commit: dbae8da515]
2024-10-04 17:40:47 -04:00
Jonathan Kim 2e7b02add9 rocr: Use new extended graphics handle registration call on IPC import
To correctly map to all GPUs after an import, use the new extended
registration call that can import a virtual address without having to
specify a target node.

Change-Id: Ifca8f6f6ee24fa99b2af357dcc3ea1de3ab234f7


[ROCm/ROCR-Runtime commit: 0ae064fe2d]
2024-10-03 14:06:37 -04:00
David Yat Sin 298ec3d840 rocr/vmm: Only modify permisions for specified agents
When hsa_amd_vmem_set_access is called, do not remove permissions for
unspecified agents. Also updating documentation in header to clarify
this.

Change-Id: I3bb4cf08ba399f85cc67b17fd13a4a40d862415f


[ROCm/ROCR-Runtime commit: 73f6bfa747]
2024-09-30 17:41:58 -04:00
Jonathan Kim 86d28294b7 rocr: Fix race condition in IPC DMABUF socket server
Socket server accept calls do not guarantee synchronous actions
post-accept. This can result in a race condition.

To resolve this, first limit the socket server's listen backlog to a
single connection. This will force competing clients to busy-retry
until timeout.

Second, make the DMABUF IPC file descriptor send-receive and import
calls into an atomic routine per connection.

By doing these fixes, not only to we resolve potential races but
we guarantee that any exporter process will create at most one
file descriptor that will only last for the duration of the import
transaction.  This alleviates any concern on running into system
limits for the number of open file descriptors per process.

Change-Id: I6d8b14795a680d89a2707e082fa027d525792e05


[ROCm/ROCR-Runtime commit: 909b82d463]
2024-09-27 14:40:59 -04:00
Jonathan Kim ff4690de61 rocr: Fix IPC DMA Buf fragment handling and enable for development
Discarding blocks for reallocation on IPC export for better memory
performance trigger memory violations with DMA BUF exports so bypass
this for now as application performance drops haven't been observed
with the bypass.

The raw fragment should be passed to the DMA Buf export call as well
since offsets will be implicitly applied in the Thunk/KFD for
export/import calls.

Also, use the agent information directly from the pointer
information so that the export call doesn't have to scan memory to find
this.  Pass the node ID in the handle so that the import call doesn't
have to make two thunk imports to fetch the node ID for GPU memory
imports.

Finally, allow the user to use DMA Buf IPC via
HSA_ENABLE_IPC_MODE_LEGACY=0 for developer testing as legacy mode will
be applied by default.

Change-Id: Ie8fe267f8768fa5df37126078406f7065f69ff4e


[ROCm/ROCR-Runtime commit: 32bb0764b7]
2024-09-27 14:40:42 -04:00
Young Hui ea8cf386f4 docs: move .readthedocs.yaml to the root of repo
Change-Id: I6c5afb806c47c029359a2dee2a7e73c6d076cfb1


[ROCm/ROCR-Runtime commit: b530e0f619]
2024-09-23 15:49:19 +00:00