e91cb4f320
SWDEV-505795 - Return the same ptr from hipIpcOpenMemHandle if it is called multiple times ( #93 )
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* SWDEV-505795 - Return the same ptr from hipIpcOpenMemHandle if it is called multiple times
* Move initialization outside of if statement
2025-04-10 11:20:36 +02:00
9e7248aa36
SWDEV-521011 - Allow max stack size as per ISA. ( #73 )
2025-04-08 10:15:38 +05:30
c2d1776ebd
SWDEV-516564 - SWDEV-512817 - Remove mentions of gfx940 and gfx941
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Change-Id: Ia069fcb9c6948c3fc9a00961593c9dcc59609375
2025-03-05 04:26:07 -05:00
29cc394510
SWDEV-513458 - Add gfx950 target ID
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Add gfx950 target ID
Cherry-picked
https://gerrit-git.amd.com/c/compute/ec/clr/+/997678
https://gerrit-git.amd.com/c/compute/ec/clr/+/1063519
Change-Id: I0228c5e87ceec366983fd4afb1c25e7f8161c2c2
2025-02-04 18:30:23 -05:00
4abedf2a0e
SWDEV-510869 - add gfx1153 id
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Change-Id: I36d39a1db2392990ad9b01d70676c3c986435707
2025-01-28 18:15:46 -05:00
39801b5750
SWDEV-506251 - Disable blit copy thresold for OpenCL
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Change-Id: Id0ca43b13d5792791a42da263f6aa4496382cea6
2025-01-08 02:46:01 +00:00
a808c4b23a
SWDEV-489255 - Update stack size limit in rocvirtual
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Change-Id: I2aac9d211f64b3d6c121d8b010d215dcbdeac3aa
2024-12-16 09:30:39 -05:00
3ad8f1b811
SWDEV-496667 - Support gfx9-4-generic target
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Support gfx9-4-generic target to cover mi3XX.
Support features sramecc and xnack in generic target.
Improve some code formats.
Add more log on compiler.
Change-Id: I6b3c6af55c60cffd43ce6f17b75998f751b75713
2024-12-12 14:43:39 -05:00
f1f4f40c5b
SWDEV-447973 - Support generic targets
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Change-Id: I32db83843e45e0f013591493aafd7a532c881e16
2024-11-29 10:12:10 -05:00
f42a87dc2f
SWDEV-485827 release initial_heap_buffer_
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This PR adds the initialization and release of initial_heap_buffer_
to prevent memory leaks.
Change-Id: I4ab8721b439a1a3a6f6e53d63d870e572f7c984a
2024-11-28 10:31:26 -05:00
e4d29e228d
SWDEV-495987 - Use shared mutex for MemObj maps
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- Remove binning logic, although useful it doesnt work in current
scenario as there is no upper limit on the size of allocation. If an
app or framework uses entire VRAM and then creates suballocs, binning
would result in failure.
Change-Id: Icc27c13e433bb4a1f03e82028d8718488b43bfa5
2024-11-19 04:28:20 -05:00
e23ff0520b
SWDEV-491375 - Improve MemObjMap perf
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- Create bins each with its own map and lock. This would help cases
where the hash of a VA is differnet than ther one which falls in
different bin, and there is no lock contention
- Use STL shared mutexes, that way we can unique_lock for map updates
vs simple reads which can use shared_lock
Change-Id: I118818be65c6373700f5e511045babb6a398938a
2024-10-30 05:37:33 +00:00
870842201d
SWDEV-485904 - Fix virtual,physical mem obj leaks
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Change-Id: Ie0456b5dcfec206ae54a6aabfc2a15a620cac693
2024-09-19 23:04:20 -04:00
12a39fbf22
SWDEV-480772 - Remove name variable from amd::Monitor class.
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Change-Id: Ie2a4fa44f485786227230f8a892e090e718aa30e
2024-09-19 11:55:01 -04:00
9c90bc43a5
SWDEV-475938 - Update dynamic stack in submit kernel internal.
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Change-Id: I816bf9cfe8aaac5486ff3b719dbdc4f4d6134e01
2024-09-11 00:59:45 -04:00
3bdbc1eaf3
SWDEV-403363 - add gfx1152 runtime support
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Change-Id: I2f59ddb38a98d9f8edec5d1548232d4d826b7d04
(cherry picked from commit 5e94656f744e315ee7ae1285d3e6dd515f9d66a8)
2024-09-03 17:12:24 -04:00
e76bf653fb
[SWDEV-469495] Compile blit kernels with -fsanitize=address when asan is enabled.
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Change-Id: I96e1abef43317cd58329c4a159f807878bc48cf4
2024-08-27 01:27:31 -04:00
11817b4405
SWDEV-439234 - Implement Set/Get Access APIs in PAL/Windows.
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Change-Id: I997c330880da70c5128b187e1ef4d9c449218880
2024-07-19 10:42:41 -04:00
fb2b87db56
SWDEV-471298 - Use same context during child creation as parent's context.
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Change-Id: I41e534b6194cef9aa8e96b28b8e811906cb362f0
2024-07-11 23:15:41 -04:00
aee0b1db39
SWDEV-468151 - Fixed segfault during destruction of arena_mem_obj
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Change-Id: I1ebfa965bd243890dcb54d9b55992ae68c497bf0
2024-06-17 15:27:08 +01:00
8f42ad6aa3
SWDEV-464648 - code and comment cleanups
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Change-Id: I5ba3f1bff500b3cd5903c2f441017735e688f83f
2024-06-07 22:38:09 +01:00
775dc204aa
SWDEV-463865 - changed device,roc and pal namespaces to be nested under amd
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Change-Id: Icad342843c039c634e249a13a7aa31400730b1dd
2024-06-07 12:23:06 -04:00
931431fc38
SWDEV-417091 - Disable GWS Init for PAL/Windows side.
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Change-Id: Ib6295f063daa835c1f33f21f50c083241a9026ff
2024-05-28 06:31:10 +00:00
f5d0ee650b
SWDEV-460151 - Enabling gfx12 in HIP runtime.
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Change-Id: I374ea7c3119b0c61f9846a862c4a448ddb179748
2024-05-28 06:28:07 +00:00
0e1a0572e6
SWDEV-413997 - Changes to use GlobalContext in views.
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Change-Id: I1f8411eae9ed49632667e244a25f223fed92c720
2024-04-29 16:41:39 -04:00
49b4aef8c9
SWDEV-413997 - Handling cases where multiple phys_mem is mapped into a single virtual address.
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Change-Id: Ie678e607a64f2e5c35a10b9083185f041c5527ac
2024-04-28 08:28:12 -04:00
d52d16c8e6
SWDEV-413997 - Fixing multiple device cases.
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Change-Id: I10ad3fbfca887e92cd81f68392fa1acf753cbd2b
2024-04-13 06:14:03 -04:00
f0c7ecf617
SWDEV-455254 - Add kernel arg optimization
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Add kernel arguments optimization into blit path.
Enabled by default on MI300.
Change-Id: I2694a81b90d48ad07d86dfe4c0c64fe187bada8e
2024-04-10 18:08:37 -04:00
b5fadf9cd1
SWDEV-442421 - Fixed case where hipIpcGetMemHandle erroneously returns hipSuccess
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Change-Id: Ie322a1a0165111d2ca129e68f49b54fe93aa088e
2024-02-05 05:08:11 +00:00
eaa61fc740
SWDEV-301667 - Fix HSAIL compilation path for Blit
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Recently some unused compiler options for HSAIL path were removed,
but it affected blit kernels compilation. Hence, remove those options.
Also delete assert for device to device copy in SDMA path for now.
Change-Id: Ib5d7f063af2ab4a3fc5d73d426e39c391b1011ac
2024-01-09 17:51:30 -05:00
077311153a
SWDEV-407533 - [ABI Break]Purge unused env vars
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Change-Id: I627950e8ebb6299affc602754a20d442dbe42b14
2023-08-24 14:11:40 -04:00
c674d94a12
SWDEV-396372 - Add support for gfx1150 and gfx1151
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Change-Id: If97710f18fbb61bead5cfe92ce11e11b4895b029
Signed-off-by: Lang Yu <Lang.Yu@amd.com >
2023-07-24 20:11:03 -04:00
8434feed16
SWDEV-333557 - 1.Add support for IPC memory to enable hipIpcGetMemHandle() and hipIpcOpenMemHandle() in PAL path. Set interprocess flag for device allocations in HIP PAL. 2.Fix PAL IPC path with ResourceCache and SubAllocation 3.Minor fixes for IpcBuffer constructor and IpcAttach 4.Remove redundant checks that may go wrong
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Change-Id: Ie9d99847c7c2c7b3b2aaefaaf60d23bf71b68635
2023-07-12 17:49:32 -04:00
9aa6f25f1c
SWDEV-311270 - Clean-up IPC path in ROCclr
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- Make IPC interfaces generic between devices and rely on the IPC buffer
for attach/detach logic
Change-Id: Id3c18d122030329b7ee532bbb6317de9dd6a0bbe
2023-06-20 15:18:21 -04:00
ec75a3e60e
SWDEV-403766 - Release mem obj while device reset.
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Change-Id: I8a93061c9c4ed692bf7ba1b872af370f79a13a5d
2023-06-15 09:52:50 -04:00
f14e8a2dba
SWDEV-393910 - Port gfx94x changes to mainline.
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Change-Id: Ibf727223bbe5230b132b47c39e0fc1d87cbd3b9c
2023-05-05 15:16:23 -04:00
7b419f42eb
SWDEV-389676 - Update stack size limit
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Change-Id: Id0cf66820e76e1bbd7f6c17ceb110782cdb5f978
2023-04-05 07:50:06 +00:00
5dc104b3ea
SWDEV-368235 - Revert "Remove obsolete env variables"
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This reverts commit 7b50c935f8
2023-02-15 07:25:00 +00:00
7b50c935f8
SWDEV-368235 - Remove obsolete env variables
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Change-Id: I7e14d53297e79e2f68b3a6cc40251ad7db9eb5ab
2023-02-03 13:44:24 -05:00
b968394b4e
SWDEV-378006 - Adding a new guarantee macro to support printing args.
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Change-Id: I9c838644e31a84d96a44b2bd10525a08d805a047
2023-01-21 06:26:50 -05:00
5d83345c20
SWDEV-355281 - Add offset calculation
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Calculate memory location offset for requested memory
Change-Id: I7919523df1790d9eaad5827ee5bd98e4263a7554
2023-01-16 14:19:40 -05:00
274f2de391
SWDEV-364576 - initialize device malloc heap state using blit kernel
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Change-Id: I5d0172aff7d2c04b322a4d828b8a2b438158b80f
2023-01-07 06:53:53 +00:00
e5a36ab1ad
SWDEV-368308 - Remove HW debug extension
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Change-Id: If0c68023c09f0dac9111d52ecc0ad63719aa4e70
2022-11-18 10:29:44 -05:00
eef2f99513
SWDEV-356482 - Improve logging
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Change-Id: I0c6286fcdb9d94398ed66262e95e8837898ff9fe
2022-10-06 11:13:24 -04:00
d6c35273e3
SWDEV-354850 - Enable gfx1103 on ROCm backend.
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Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com >
Change-Id: Ia420444fd0cb703fcdca1ed7e3d2e262ffd7f4db
2022-09-01 18:58:00 +08:00
c72a396c1f
SWDEV-343921 - Updating default stack size for OpenCl tasks
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Change-Id: I37cdd8808dddaa7ac0544b76d18de64b27e443bd
2022-08-26 04:57:00 -04:00
2aa7e5819f
SWDEV-352127 - Fix clinfo issue, add new asic id
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Change-Id: Idc6ff6fe647878f32f8dbb0613cbb879ea21ecdf
2022-08-25 08:23:21 +08:00
64c1c4757f
SWDEV-336448 - Support loading comgr versioned dll
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Change-Id: I03283fc2a200d778c5efa43e509624bba9ce0541
2022-08-19 00:38:19 -04:00
aafa057c9a
SWDEV-351337 - Add new asic id
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Change-Id: Ie07f7a6b9a4bb797124e6644c91fb62ba014cf6b
2022-08-12 13:14:06 -04:00
27a08a132f
SWDEV-343921 - added Max stack size
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Change-Id: I5c1a088e05215ca951afc9d92f8d298c5e3a65f1
2022-08-02 07:13:18 -04:00
Stojiljkovic, Vladana
Patel, Jaydeepkumar
Branislav Brzak
taosang2
Jimbo Xie
Saleel Kudchadker
Ioannis Assiouras
Aidan Belton-Schure
Anusha GodavarthySurya
kjayapra-amd
ksankisa
German Andryeyev
Lang Yu
Todd tiantuo Li
Rahul Garg
Maneesh Gupta
Yifan Zhang
Sarbojit Sarkar
jie1zhan
Satyanvesh Dittakavi
Alex Xie