Danylo Lytovchenko
109 строки
4.6 KiB
C++
109 строки
4.6 KiB
C++
/* Copyright (c) 2021 - 2021 Advanced Micro Devices, Inc.
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE. */
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#pragma once
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#include "device/devhostcall.hpp"
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#include "device/device.hpp"
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#include "device/devurilocator.hpp"
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#include "utils/debug.hpp"
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#include "platform/memory.hpp"
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#include <inttypes.h> //to exp
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#include <string>
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#include <vector>
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#include <tuple>
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#include <algorithm>
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// Address sanitizer runtime entry-function to report the invalid device memory access
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// this will be defined in llvm-project/compiler-rt/lib/asan, and will have effect only
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// when compiler-rt is build for AMDGPU.
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// Note: This API is runtime interface of asan library and only defined for linux os.
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extern "C" void __asan_report_nonself_error(uint64_t* callstack, uint32_t n_callstack,
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uint64_t* addr, uint32_t naddr, uint64_t* entity_ids,
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uint32_t n_entities, bool is_write,
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uint32_t access_size, bool is_abort, const char* name,
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int64_t vma_adjust, int fd, uint64_t file_extent_size,
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uint64_t file_extent_start = 0);
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namespace amd {
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void handleSanitizerService(Payload* packt_payload, uint64_t activemask,
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const amd::Device* gpu_device, device::UriLocator* uri_locator) {
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// An address results in invalid access in each active lane
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uint64_t device_failing_addresses[64];
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// An array of identifications of entities requesting a report.
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// index 0 - contains device id
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// index 1,2,3 - contains wg_idx, wg_idy, wg_idz respectively.
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// index 4 to 67 - contains reporting wave ids in a wave-front.
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uint64_t entity_id[68], callstack[1];
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uint32_t n_activelanes = __builtin_popcountl(activemask);
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uint64_t access_info = 0, access_size = 0;
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bool is_abort = true;
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entity_id[0] = gpu_device->index();
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assert(packt_payload != nullptr && "packet payload is null?");
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int indx = 0, en_idx = 1;
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bool first_workitem = false;
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while (activemask) {
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auto wi = amd::leastBitSet(activemask);
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activemask ^= static_cast<decltype(activemask)>(1) << wi;
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auto data_slot = packt_payload->slots[wi];
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// encoding of packet payload arguments is
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// defined in device-libs/asanrtl/src/report.cl
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if (!first_workitem) {
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device_failing_addresses[indx] = data_slot[0];
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callstack[0] = data_slot[1];
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entity_id[en_idx] = data_slot[2];
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entity_id[++en_idx] = data_slot[3];
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entity_id[++en_idx] = data_slot[4];
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entity_id[++en_idx] = data_slot[5];
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access_info = data_slot[6];
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access_size = data_slot[7];
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first_workitem = true;
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} else {
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device_failing_addresses[indx] = data_slot[0];
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entity_id[en_idx] = data_slot[5];
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}
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indx++;
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en_idx++;
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}
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bool is_write = false;
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if (access_info & 0xFFFFFFFF00000000) is_abort = false;
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if (access_info & 1) is_write = true;
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std::string fileuri;
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uint64_t size = 0, offset = 0;
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int64_t loadAddrAdjust = 0;
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auto uri_fd = amd::Os::FDescInit();
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if (uri_locator) {
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device::UriLocator::UriInfo uri_info = uri_locator->lookUpUri(callstack[0]);
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std::tie(offset, size) = uri_locator->decodeUriAndGetFd(uri_info, &uri_fd);
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loadAddrAdjust = uri_info.loadAddressDiff;
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}
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#if defined(__linux__)
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__asan_report_nonself_error(callstack, 1, device_failing_addresses, n_activelanes, entity_id,
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n_activelanes + 4, is_write, access_size, is_abort,
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/*thread key*/ "amdgpu", loadAddrAdjust, uri_fd, size, offset);
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#endif
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}
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} // namespace amd
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