zichguan-amd 0c698557a0 rocr: check _SC_LEVEL1_DCACHE_LINESIZE before use ...

Support musl
Fixes ROCm/ROCR-Runtime#318

Signed-off-by: zichguan-amd <zichuan.guan@amd.com>


[ROCm/ROCR-Runtime commit: 7946ddb647]

2025-07-14 14:44:31 -04:00

..

cmake_modules

rocr/rocrtst: Update to c++17

2025-06-30 14:02:24 -05:00

core

rocr: check _SC_LEVEL1_DCACHE_LINESIZE before use

2025-07-14 14:44:31 -04:00

image

rocr/driver: add support for getting GPU tile configuration

2025-07-11 16:14:29 +08:00

inc

doc: Fix doxygen comments for in-out params

2025-07-10 08:21:01 -04:00

libamdhsacode

rocr: Fix Unintended Sign Extension

2025-06-09 15:16:10 -04:00

loader

rocr: Remove gfx940 and gfx941 support

2025-02-19 12:16:24 -05:00

pcs

rocr: initialize 'data_rdy' & correct 'const' functions

2024-12-06 09:17:02 -05:00

CMakeLists.txt

rocr/rocrtst: Update to c++17

2025-06-30 14:02:24 -05:00

hsa-runtime64-config.cmake.in

Add check_required_components to end of cmake package file.

2021-08-27 20:07:26 -04:00

hsacore.so.def

rocr: Add hsa_amd_portable_export_dmabuf_v2

2025-06-09 15:42:58 -05:00

hsacore.so.link

Remove unneeded CMakeList.txt file. Move link and def files.

2016-09-30 13:02:30 -05:00

LICENSE.md

Update copyright date.

2020-06-19 22:34:01 -04:00