rocm-systems

T

foreman 1d845a69b2 P4 to Git Change 1057571 by gandryey@gera-dev-w7 on 2014/07/21 18:35:02

ECR #304775 - Device enqueuing
	- Add L2 cache flush after the scheduler execution. Although CP has to work with L2 cache, it seems some functionality relies on direct memory access and without explicit L2 flush CP can pick old values in the template.

Affected files ...

... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpuvirtual.cpp#324 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gslbe/src/rt/GSLContext.cpp#61 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gslbe/src/rt/GSLContext.h#35 edit


[ROCm/clr commit: 4599bd0d4a]

2014-07-21 18:43:54 -04:00

projects/clr/rocclr

P4 to Git Change 1057571 by gandryey@gera-dev-w7 on 2014/07/21 18:35:02

2014-07-21 18:43:54 -04:00

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