b4c6143a2f
Change-Id: Ia4f9ff0f5f873b4223a8cca154188bb0d2f1abba
242 wiersze
8.4 KiB
C++
242 wiersze
8.4 KiB
C++
/* Copyright (c) 2017-present Advanced Micro Devices, Inc.
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE. */
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#ifndef WITHOUT_HSA_BACKEND
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#include "hsa_ext_amd.h"
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#include "lnxheaders.h"
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#include "prodevice.hpp"
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#include "amdgpu_drm.h"
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namespace roc {
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constexpr uint32_t kMaxDevices = 32;
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constexpr uint32_t kAtiVendorId = 0x1002;
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void* ProDevice::lib_drm_handle_ = nullptr;
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bool ProDevice::initialized_ = false;
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drm::Funcs ProDevice::funcs_;
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IProDevice* IProDevice::Init(uint32_t bus, uint32_t dev, uint32_t func)
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{
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// Make sure DRM lib is initialized
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if (!ProDevice::DrmInit()) {
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return nullptr;
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}
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ProDevice* pro_device = new ProDevice();
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if (pro_device == nullptr || !pro_device->Create(bus, dev, func)) {
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delete pro_device;
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return nullptr;
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}
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return pro_device;
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}
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ProDevice::~ProDevice() {
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delete alloc_ops_;
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if (dev_handle_ != nullptr) {
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Funcs().AmdgpuDeviceDeinitialize(dev_handle_);
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}
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if (file_desc_ > 0) {
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close(file_desc_);
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}
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}
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bool ProDevice::DrmInit()
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{
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if (initialized_ == false) {
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// Find symbols in libdrm_amdgpu.so.1
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lib_drm_handle_ = dlopen("libdrm_amdgpu.so.1", RTLD_NOW);
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if (lib_drm_handle_ == nullptr) {
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return false;
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} else {
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funcs_.DrmGetDevices = reinterpret_cast<drm::DrmGetDevices>(dlsym(
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lib_drm_handle_,
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"drmGetDevices"));
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if (funcs_.DrmGetDevices == nullptr) return false;
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funcs_.AmdgpuDeviceInitialize = reinterpret_cast<drm::AmdgpuDeviceInitialize>(dlsym(
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lib_drm_handle_,
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"amdgpu_device_initialize"));
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if (funcs_.AmdgpuDeviceInitialize == nullptr) return false;
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funcs_.AmdgpuDeviceDeinitialize = reinterpret_cast<drm::AmdgpuDeviceDeinitialize>(dlsym(
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lib_drm_handle_,
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"amdgpu_device_deinitialize"));
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if (funcs_.AmdgpuDeviceDeinitialize == nullptr) return false;
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funcs_.AmdgpuQueryGpuInfo = reinterpret_cast<drm::AmdgpuQueryGpuInfo>(dlsym(
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lib_drm_handle_,
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"amdgpu_query_gpu_info"));
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if (funcs_.AmdgpuQueryGpuInfo == nullptr) return false;
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funcs_.AmdgpuQueryInfo = reinterpret_cast<drm::AmdgpuQueryInfo>(dlsym(
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lib_drm_handle_,
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"amdgpu_query_info"));
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if (funcs_.AmdgpuQueryInfo == nullptr) return false;
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funcs_.AmdgpuBoAlloc = reinterpret_cast<drm::AmdgpuBoAlloc>(dlsym(
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lib_drm_handle_,
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"amdgpu_bo_alloc"));
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if (funcs_.AmdgpuBoAlloc == nullptr) return false;
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funcs_.AmdgpuBoExport = reinterpret_cast<drm::AmdgpuBoExport>(dlsym(
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lib_drm_handle_,
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"amdgpu_bo_export"));
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if (funcs_.AmdgpuBoExport == nullptr) return false;
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funcs_.AmdgpuBoFree = reinterpret_cast<drm::AmdgpuBoFree>(dlsym(
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lib_drm_handle_,
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"amdgpu_bo_free"));
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if (funcs_.AmdgpuBoFree == nullptr) return false;
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funcs_.AmdgpuBoCpuMap = reinterpret_cast<drm::AmdgpuBoCpuMap>(dlsym(
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lib_drm_handle_,
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"amdgpu_bo_cpu_map"));
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if (funcs_.AmdgpuBoCpuMap == nullptr) return false;
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funcs_.AmdgpuBoCpuUnmap = reinterpret_cast<drm::AmdgpuBoCpuUnmap>(dlsym(
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lib_drm_handle_,
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"amdgpu_bo_cpu_unmap"));
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if (funcs_.AmdgpuBoCpuUnmap == nullptr) return false;
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}
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}
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initialized_ = true;
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return true;
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}
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#ifndef AMDGPU_CAPABILITY_SSG_FLAG
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#define AMDGPU_CAPABILITY_SSG_FLAG 4
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#endif
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// ================================================================================================
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// Open drm device and initialize it. And also get the drm information.
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bool ProDevice::Create(uint32_t bus, uint32_t device, uint32_t func) {
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drmDevicePtr devices[kMaxDevices] = { };
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int32_t device_count = Funcs().DrmGetDevices(devices, kMaxDevices);
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bool result = false;
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for (int32_t i = 0; i < device_count; i++) {
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// Check if the device vendor is AMD
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if (devices[i]->deviceinfo.pci->vendor_id != kAtiVendorId) {
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continue;
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}
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if ((devices[i]->businfo.pci->bus == bus) &&
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(devices[i]->businfo.pci->dev == device) &&
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(devices[i]->businfo.pci->func == func)) {
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// pDevices[i]->nodes[DRM_NODE_PRIMARY];
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// Using render node here so that we can do the off-screen rendering without authentication
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file_desc_ = open(devices[i]->nodes[DRM_NODE_RENDER], O_RDWR, 0);
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if (file_desc_ > 0) {
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void* data, *file, *cap;
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// Initialize the admgpu device.
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if (Funcs().AmdgpuDeviceInitialize(file_desc_, &major_ver_,
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&minor_ver_, &dev_handle_) == 0) {
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uint32_t version = 0;
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// amdgpu_query_gpu_info will never fail only if it is initialized
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Funcs().AmdgpuQueryGpuInfo(dev_handle_, &gpu_info_);
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drm_amdgpu_capability cap = {};
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Funcs().AmdgpuQueryInfo(dev_handle_, AMDGPU_INFO_CAPABILITY, sizeof(drm_amdgpu_capability), &cap);
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// Check if DGMA and SSG are available
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if ((cap.flag & (AMDGPU_CAPABILITY_DIRECT_GMA_FLAG | AMDGPU_CAPABILITY_SSG_FLAG)) ==
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(AMDGPU_CAPABILITY_DIRECT_GMA_FLAG | AMDGPU_CAPABILITY_SSG_FLAG)) {
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result = true;
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break;
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}
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}
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}
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}
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}
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if (result) {
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alloc_ops_ = new amd::Monitor("DGMA mem alloc lock", true);
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if (nullptr == alloc_ops_) {
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return true;
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}
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}
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return result;
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}
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void* ProDevice::AllocDmaBuffer(hsa_agent_t agent, size_t size, void** host_ptr) const
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{
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amd::ScopedLock l(alloc_ops_);
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void* ptr = nullptr;
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amdgpu_bo_handle buf_handle = 0;
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amdgpu_bo_alloc_request req = {0};
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*host_ptr = nullptr;
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req.alloc_size = size;
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req.phys_alignment = 64 * Ki;
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req.preferred_heap = AMDGPU_GEM_DOMAIN_DGMA;
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// Allocate buffer in DGMA heap
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if (0 == Funcs().AmdgpuBoAlloc(dev_handle_, &req, &buf_handle)) {
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amdgpu_bo_handle_type type = amdgpu_bo_handle_type_dma_buf_fd;
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uint32_t shared_handle = 0;
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// Find the base driver handle
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if (0 == Funcs().AmdgpuBoExport(buf_handle, type, &shared_handle)) {
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uint32_t flags = 0;
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size_t buf_size = 0;
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// Map memory object to HSA device
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if (0 == hsa_amd_interop_map_buffer(1, &agent, shared_handle,
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flags, &buf_size, &ptr, nullptr, nullptr)) {
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// Ask GPUPro driver to provide CPU access to allocation
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if (0 == Funcs().AmdgpuBoCpuMap(buf_handle, host_ptr)) {
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allocs_.insert({ptr, {buf_handle, shared_handle}});
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}
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else {
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hsa_amd_interop_unmap_buffer(ptr);
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close(shared_handle);
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Funcs().AmdgpuBoFree(buf_handle);
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}
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}
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else {
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close(shared_handle);
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Funcs().AmdgpuBoFree(buf_handle);
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}
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}
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else {
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Funcs().AmdgpuBoFree(buf_handle);
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}
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}
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return ptr;
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}
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void ProDevice::FreeDmaBuffer(void* ptr) const
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{
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amd::ScopedLock l(alloc_ops_);
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auto it = allocs_.find(ptr);
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if (it != allocs_.end()) {
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Funcs().AmdgpuBoCpuUnmap(it->second.first);
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// Unmap memory from HSA device
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hsa_amd_interop_unmap_buffer(ptr);
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// Close shared handle
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close(it->second.second);
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int error = Funcs().AmdgpuBoFree(it->second.first);
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allocs_.erase(it);
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}
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}
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}
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#endif // WITHOUT_HSA_BACKEND
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