rocm-systems/tests/workloads/path/MI100/pmc_perf.csv

Dispatch_ID,Kernel_Name,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,wave_size,obj,SQ_WAIT_INST_ANY,SQ_ACTIVE_INST_ANY,SQ_INSTS_VALU,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,TCP_TCP_LATENCY_sum,TCP_TCC_READ_REQ_LATENCY_sum,TCP_TCC_WRITE_REQ_LATENCY_sum,TCP_TCC_READ_REQ_sum,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TCC_EA_WRREQ_STALL_sum,TCC_EA_WRREQ_IO_CREDIT_STALL_sum,TCC_EA_WRREQ_GMI_CREDIT_STALL_sum,TCC_EA_WRREQ_DRAM_CREDIT_STALL_sum,wave_size_1,obj_1,TCC_EA_RDREQ[0],TCC_EA_RDREQ_32B[0],TCC_EA_RDREQ_DRAM_CREDIT_STALL[0],TCC_EA_RDREQ_GMI_CREDIT_STALL[0],TCC_EA_RDREQ[1],TCC_EA_RDREQ_32B[1],TCC_EA_RDREQ_DRAM_CREDIT_STALL[1],TCC_EA_RDREQ_GMI_CREDIT_STALL[1],TCC_EA_RDREQ[2],TCC_EA_RDREQ_32B[2],TCC_EA_RDREQ_DRAM_CREDIT_STALL[2],TCC_EA_RDREQ_GMI_CREDIT_STALL[2],TCC_EA_RDREQ[3],TCC_EA_RDREQ_32B[3],TCC_EA_RDREQ_DRAM_CREDIT_STALL[3],TCC_EA_RDREQ_GMI_CREDIT_STALL[3],TCC_EA_RDREQ[4],TCC_EA_RDREQ_32B[4],TCC_EA_RDREQ_DRAM_CREDIT_STALL[4],TCC_EA_RDREQ_GMI_CREDIT_STALL[4],TCC_EA_RDREQ[5],TCC_EA_RDREQ_32B[5],TCC_EA_RDREQ_DRAM_CREDIT_STALL[5],TCC_EA_RDREQ_GMI_CREDIT_STALL[5],TCC_EA_RDREQ[6],TCC_EA_RDREQ_32B[6],TCC_EA_RDREQ_DRAM_CREDIT_STALL[6],TCC_EA_RDREQ_GMI_CREDIT_STALL[6],TCC_EA_RDREQ[7],TCC_EA_RDREQ_32B[7],TCC_EA_RDREQ_DRAM_CREDIT_STALL[7],TCC_EA_RDREQ_GMI_CREDIT_STALL[7],TCC_EA_RDREQ[8],TCC_EA_RDREQ_32B[8],TCC_EA_RDREQ_DRAM_CREDIT_STALL[8],TCC_EA_RDREQ_GMI_CREDIT_STALL[8],TCC_EA_RDREQ[9],TCC_EA_RDREQ_32B[9],TCC_EA_RDREQ_DRAM_CREDIT_STALL[9],TCC_EA_RDREQ_GMI_CREDIT_STALL[9],TCC_EA_RDREQ[10],TCC_EA_RDREQ_32B[10],TCC_EA_RDREQ_DRAM_CREDIT_STALL[10],TCC_EA_RDREQ_GMI_CREDIT_STALL[10],TCC_EA_RDREQ[11],TCC_EA_RDREQ_32B[11],TCC_EA_RDREQ_DRAM_CREDIT_STALL[11],TCC_EA_RDREQ_GMI_CREDIT_STALL[11],TCC_EA_RDREQ[12],TCC_EA_RDREQ_32B[12],TCC_EA_RDREQ_DRAM_CREDIT_STALL[12],TCC_EA_RDREQ_GMI_CREDIT_STALL[12],TCC_EA_RDREQ[13],TCC_EA_RDREQ_32B[13],TCC_EA_RDREQ_DRAM_CREDIT_STALL[13],TCC_EA_RDREQ_GMI_CREDIT_STALL[13],TCC_EA_RDREQ[14],TCC_EA_RDREQ_32B[14],TCC_EA_RDREQ_DRAM_CREDIT_STALL[14],TCC_EA_RDREQ_GMI_CREDIT_STALL[14],TCC_EA_RDREQ[15],TCC_EA_RDREQ_32B[15],TCC_EA_RDREQ_DRAM_CREDIT_STALL[15],TCC_EA_RDREQ_GMI_CREDIT_STALL[15],TCC_EA_RDREQ[16],TCC_EA_RDREQ_32B[16],TCC_EA_RDREQ_DRAM_CREDIT_STALL[16],TCC_EA_RDREQ_GMI_CREDIT_STALL[16],TCC_EA_RDREQ[17],TCC_EA_RDREQ_32B[17],TCC_EA_RDREQ_DRAM_CREDIT_STALL[17],TCC_EA_RDREQ_GMI_CREDIT_STALL[17],TCC_EA_RDREQ[18],TCC_EA_RDREQ_32B[18],TCC_EA_RDREQ_DRAM_CREDIT_STALL[18],TCC_EA_RDREQ_GMI_CREDIT_STALL[18],TCC_EA_RDREQ[19],TCC_EA_RDREQ_32B[19],TCC_EA_RDREQ_DRAM_CREDIT_STALL[19],TCC_EA_RDREQ_GMI_CREDIT_STALL[19],TCC_EA_RDREQ[20],TCC_EA_RDREQ_32B[20],TCC_EA_RDREQ_DRAM_CREDIT_STALL[20],TCC_EA_RDREQ_GMI_CREDIT_STALL[20],TCC_EA_RDREQ[21],TCC_EA_RDREQ_32B[21],TCC_EA_RDREQ_DRAM_CREDIT_STALL[21],TCC_EA_RDREQ_GMI_CREDIT_STALL[21],TCC_EA_RDREQ[22],TCC_EA_RDREQ_32B[22],TCC_EA_RDREQ_DRAM_CREDIT_STALL[22],TCC_EA_RDREQ_GMI_CREDIT_STALL[22],TCC_EA_RDREQ[23],TCC_EA_RDREQ_32B[23],TCC_EA_RDREQ_DRAM_CREDIT_STALL[23],TCC_EA_RDREQ_GMI_CREDIT_STALL[23],TCC_EA_RDREQ[24],TCC_EA_RDREQ_32B[24],TCC_EA_RDREQ_DRAM_CREDIT_STALL[24],TCC_EA_RDREQ_GMI_CREDIT_STALL[24],TCC_EA_RDREQ[25],TCC_EA_RDREQ_32B[25],TCC_EA_RDREQ_DRAM_CREDIT_STALL[25],TCC_EA_RDREQ_GMI_CREDIT_STALL[25],TCC_EA_RDREQ[26],TCC_EA_RDREQ_32B[26],TCC_EA_RDREQ_DRAM_CREDIT_STALL[26],TCC_EA_RDREQ_GMI_CREDIT_STALL[26],TCC_EA_RDREQ[27],TCC_EA_RDREQ_32B[27],TCC_EA_RDREQ_DRAM_CREDIT_STALL[27],TCC_EA_RDREQ_GMI_CREDIT_STALL[27],TCC_EA_RDREQ[28],TCC_EA_RDREQ_32B[28],TCC_EA_RDREQ_DRAM_CREDIT_STALL[28],TCC_EA_RDREQ_GMI_CREDIT_STALL[28],TCC_EA_RDREQ[29],TCC_EA_RDREQ_32B[29],TCC_EA_RDREQ_DRAM_CREDIT_STALL[29],TCC_EA_RDREQ_GMI_CREDIT_STALL[29],TCC_EA_RDREQ[30],TCC_EA_RDREQ_32B[30],TCC_EA_RDREQ_DRAM_CREDIT_STALL[30],TCC_EA_RDREQ_GMI_CREDIT_STALL[30],TCC_EA_RDREQ[31],TCC_EA_RDREQ_32B[31],TCC_EA_RDREQ_DRAM_CREDIT_STALL[31],TCC_EA_RDREQ_GMI_CREDIT_STALL[31],wave_size_2,obj_2,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,SQ_INSTS_VMEM,SQ_INSTS_SALU,SQ_INSTS_VSKIPPED,SQ_INSTS_SMEM,TCP_TOTAL_ATOMIC_WITH_RET_sum,TCP_TOTAL_ATOMIC_WITHOUT_RET_sum,TCP_TOTAL_WRITEBACK_INVALIDATES_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TA_BUFFER_COALESCED_READ_CYCLES_sum,TA_BUFFER_COALESCED_WRITE_CYCLES_sum,SPI_RA_RES_STALL_CSN,SPI_RA_TMP_STALL_CSN,CPC_CPC_UTCL2IU_BUSY,CPC_CPC_UTCL2IU_IDLE,CPF_CMP_UTCL1_STALL_ON_TRANSLATION,TCC_READ_sum,TCC_WRITE_sum,TCC_ATOMIC_sum,TCC_WRITEBACK_sum,wave_size_3,obj_3,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_BUSY_CU_CYCLES,SQ_WAVES,SQ_WAVE_CYCLES,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,SQC_TC_DATA_WRITE_REQ,GRBM_COUNT,GRBM_GUI_ACTIVE,TCP_GATE_EN1_sum,TCP_GATE_EN2_sum,TCP_TD_TCP_STALL_CYCLES_sum,TCP_TCR_TCP_STALL_CYCLES_sum,TA_TA_BUSY_sum,TA_BUFFER_WAVEFRONTS_sum,TD_TD_BUSY_sum,TD_TC_STALL_sum,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,CPF_CPF_STAT_BUSY,CPF_CPF_STAT_STALL,TCC_CYCLE_sum,TCC_BUSY_sum,TCC_PROBE_sum,TCC_PROBE_ALL_sum,wave_size_4,obj_4,TCC_EA_ATOMIC_LEVEL_sum,wave_size_5,obj_5,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,SQ_INSTS_SMEM_NORM,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_CC_ATOMIC_REQ_sum,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_NORMAL_WRITEBACK_sum,TCC_ALL_TC_OP_WB_WRITEBACK_sum,TCC_NORMAL_EVICT_sum,TCC_ALL_TC_OP_INV_EVICT_sum,wave_size_6,obj_6,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_PENDING_STALL_CYCLES_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCC_EA_ATOMIC_sum,TCC_EA_RDREQ_LEVEL_sum,TCC_EA_WRREQ_LEVEL_sum,wave_size_7,obj_7,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,SQC_DCACHE_REQ_READ_1,TCP_VOLATILE_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCC_HIT_sum,TCC_MISS_sum,wave_size_8,obj_8,SQ_INSTS_FLAT,SQ_INSTS_LDS,SQ_INSTS_GDS,SQ_INSTS_EXP_GDS,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,SQ_INSTS,SQ_WAIT_ANY,TCP_UTCL1_TRANSLATION_MISS_sum,TCP_UTCL1_TRANSLATION_HIT_sum,TCP_UTCL1_PERMISSION_MISS_sum,TCP_UTCL1_REQUEST_sum,TA_ADDR_STALLED_BY_TC_CYCLES_sum,TA_TOTAL_WAVEFRONTS_sum,SPI_RA_WAVE_SIMD_FULL_CSN,SPI_RA_VGPR_SIMD_FULL_CSN,CPC_CPC_UTCL2IU_STALL,CPC_ME1_BUSY_FOR_PACKET_DECODE,TCC_EA_WRREQ_sum,TCC_EA_WRREQ_64B_sum,TCC_EA_WR_UNCACHED_32B_sum,TCC_EA_WRREQ_DRAM_sum,wave_size_9,obj_9,SQ_LDS_BANK_CONFLICT,SQ_LDS_ADDR_CONFLICT,SQ_LDS_UNALIGNED_STALL,SQ_WAVES_EQ_64,SQ_WAVES_LT_64,SQ_WAVES_LT_48,SQ_WAVES_LT_32,SQ_WAVES_LT_16,TCP_TCC_NC_WRITE_REQ_sum,TCP_TCC_NC_ATOMIC_REQ_sum,TCP_TCC_UC_READ_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TA_FLAT_ATOMIC_WAVEFRONTS_sum,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TCC_EA_RDREQ_IO_CREDIT_STALL_sum,TCC_EA_RDREQ_GMI_CREDIT_STALL_sum,TCC_EA_RDREQ_DRAM_CREDIT_STALL_sum,TCC_TAG_STALL_sum,wave_size_10,obj_10,TCC_HIT[0],TCC_MISS[0],TCC_READ[0],TCC_REQ[0],TCC_HIT[1],TCC_MISS[1],TCC_READ[1],TCC_REQ[1],TCC_HIT[2],TCC_MISS[2],TCC_READ[2],TCC_REQ[2],TCC_HIT[3],TCC_MISS[3],TCC_READ[3],TCC_REQ[3],TCC_HIT[4],TCC_MISS[4],TCC_READ[4],TCC_REQ[4],TCC_HIT[5],TCC_MISS[5],TCC_READ[5],TCC_REQ[5],TCC_HIT[6],TCC_MISS[6],TCC_READ[6],TCC_REQ[6],TCC_HIT[7],TCC_MISS[7],TCC_READ[7],TCC_REQ[7],TCC_HIT[8],TCC_MISS[8],TCC_READ[8],TCC_REQ[8],TCC_HIT[9],TCC_MISS[9],TCC_READ[9],TCC_REQ[9],TCC_HIT[10],TCC_MISS[10],TCC_READ[10],TCC_REQ[10],TCC_HIT[11],TCC_MISS[11],TCC_READ[11],TCC_REQ[11],TCC_HIT[12],TCC_MISS[12],TCC_READ[12],TCC_REQ[12],TCC_HIT[13],TCC_MISS[13],TCC_READ[13],TCC_REQ[13],TCC_HIT[14],TCC_MISS[14],TCC_READ[14],TCC_REQ[14],TCC_HIT[15],TCC_MISS[15],TCC_READ[15],TCC_REQ[15],TCC_HIT[16],TCC_MISS[16],TCC_READ[16],TCC_REQ[16],TCC_HIT[17],TCC_MISS[17],TCC_READ[17],TCC_REQ[17],TCC_HIT[18],TCC_MISS[18],TCC_READ[18],TCC_REQ[18],TCC_HIT[19],TCC_MISS[19],TCC_READ[19],TCC_REQ[19],TCC_HIT[20],TCC_MISS[20],TCC_READ[20],TCC_REQ[20],TCC_HIT[21],TCC_MISS[21],TCC_READ[21],TCC_REQ[21],TCC_HIT[22],TCC_MISS[22],TCC_READ[22],TCC_REQ[22],TCC_HIT[23],TCC_MISS[23],TCC_READ[23],TCC_REQ[23],TCC_HIT[24],TCC_MISS[24],TCC_READ[24],TCC_REQ[24],TCC_HIT[25],TCC_MISS[25],TCC_READ[25],TCC_REQ[25],TCC_HIT[26],TCC_MISS[26],TCC_READ[26],TCC_REQ[26],TCC_HIT[27],TCC_MISS[27],TCC_READ[27],TCC_REQ[27],TCC_HIT[28],TCC_MISS[28],TCC_READ[28],TCC_REQ[28],TCC_HIT[29],TCC_MISS[29],TCC_READ[29],TCC_REQ[29],TCC_HIT[30],TCC_MISS[30],TCC_READ[30],TCC_REQ[30],TCC_HIT[31],TCC_MISS[31],TCC_READ[31],TCC_REQ[31],wave_size_11,obj_11,TCC_EA_WRREQ_DRAM_CREDIT_STALL[0],TCC_EA_WRREQ_GMI_CREDIT_STALL[0],TCC_EA_WRREQ_IO_CREDIT_STALL[0],TCC_EA_WRREQ_LEVEL[0],TCC_EA_WRREQ_DRAM_CREDIT_STALL[1],TCC_EA_WRREQ_GMI_CREDIT_STALL[1],TCC_EA_WRREQ_IO_CREDIT_STALL[1],TCC_EA_WRREQ_LEVEL[1],TCC_EA_WRREQ_DRAM_CREDIT_STALL[2],TCC_EA_WRREQ_GMI_CREDIT_STALL[2],TCC_EA_WRREQ_IO_CREDIT_STALL[2],TCC_EA_WRREQ_LEVEL[2],TCC_EA_WRREQ_DRAM_CREDIT_STALL[3],TCC_EA_WRREQ_GMI_CREDIT_STALL[3],TCC_EA_WRREQ_IO_CREDIT_STALL[3],TCC_EA_WRREQ_LEVEL[3],TCC_EA_WRREQ_DRAM_CREDIT_STALL[4],TCC_EA_WRREQ_GMI_CREDIT_STALL[4],TCC_EA_WRREQ_IO_CREDIT_STALL[4],TCC_EA_WRREQ_LEVEL[4],TCC_EA_WRREQ_DRAM_CREDIT_STALL[5],TCC_EA_WRREQ_GMI_CREDIT_STALL[5],TCC_EA_WRREQ_IO_CREDIT_STALL[5],TCC_EA_WRREQ_LEVEL[5],TCC_EA_WRREQ_DRAM_CREDIT_STALL[6],TCC_EA_WRREQ_GMI_CREDIT_STALL[6],TCC_EA_WRREQ_IO_CREDIT_STALL[6],TCC_EA_WRREQ_LEVEL[6],TCC_EA_WRREQ_DRAM_CREDIT_STALL[7],TCC_EA_WRREQ_GMI_CREDIT_STALL[7],TCC_EA_WRREQ_IO_CREDIT_STALL[7],TCC_EA_WRREQ_LEVEL[7],TCC_EA_WRREQ_DRAM_CREDIT_STALL[8],TCC_EA_WRREQ_GMI_CREDIT_STALL[8],TCC_EA_WRREQ_IO_CREDIT_STALL[8],TCC_EA_WRREQ_LEVEL[8],TCC_EA_WRREQ_DRAM_CREDIT_STALL[9],TCC_EA_WRREQ_GMI_CREDIT_STALL[9],TCC_EA_WRREQ_IO_CREDIT_STALL[9],TCC_EA_WRREQ_LEVEL[9],TCC_EA_WRREQ_DRAM_CREDIT_STALL[10],TCC_EA_WRREQ_GMI_CREDIT_STALL[10],TCC_EA_WRREQ_IO_CREDIT_STALL[10],TCC_EA_WRREQ_LEVEL[10],TCC_EA_WRREQ_DRAM_CREDIT_STALL[11],TCC_EA_WRREQ_GMI_CREDIT_STALL[11],TCC_EA_WRREQ_IO_CREDIT_STALL[11],TCC_EA_WRREQ_LEVEL[11],TCC_EA_WRREQ_DRAM_CREDIT_STALL[12],TCC_EA_WRREQ_GMI_CREDIT_STALL[12],TCC_EA_WRREQ_IO_CREDIT_STALL[12],TCC_EA_WRREQ_LEVEL[12],TCC_EA_WRREQ_DRAM_CREDIT_STALL[13],TCC_EA_WRREQ_GMI_CREDIT_STALL[13],TCC_EA_WRREQ_IO_CREDIT_STALL[13],TCC_EA_WRREQ_LEVEL[13],TCC_EA_WRREQ_DRAM_CREDIT_STALL[14],TCC_EA_WRREQ_GMI_CREDIT_STALL[14],TCC_EA_WRREQ_IO_CREDIT_STALL[14],TCC_EA_WRREQ_LEVEL[14],TCC_EA_WRREQ_DRAM_CREDIT_STALL[15],TCC_EA_WRREQ_GMI_CREDIT_STALL[15],TCC_EA_WRREQ_IO_CREDIT_STALL[15],TCC_EA_WRREQ_LEVEL[15],TCC_EA_WRREQ_DRAM_CREDIT_STALL[16],TCC_EA_WRREQ_GMI_CREDIT_STALL[16],TCC_EA_WRREQ_IO_CREDIT_STALL[16],TCC_EA_WRREQ_LEVEL[16],TCC_EA_WRREQ_DRAM_CREDIT_STALL[17],TCC_EA_WRREQ_GMI_CREDIT_STALL[17],TCC_EA_WRREQ_IO_CREDIT_STALL[17],TCC_EA_WRREQ_LEVEL[17],TCC_EA_WRREQ_DRAM_CREDIT_STALL[18],TCC_EA_WRREQ_GMI_CREDIT_STALL[18],TCC_EA_WRREQ_IO_CREDIT_STALL[18],TCC_EA_WRREQ_LEVEL[18],TCC_EA_WRREQ_DRAM_CREDIT_STALL[19],TCC_EA_WRREQ_GMI_CREDIT_STALL[19],TCC_EA_WRREQ_IO_CREDIT_STALL[19],TCC_EA_WRREQ_LEVEL[19],TCC_EA_WRREQ_DRAM_CREDIT_STALL[20],TCC_EA_WRREQ_GMI_CREDIT_STALL[20],TCC_EA_WRREQ_IO_CREDIT_STALL[20],TCC_EA_WRREQ_LEVEL[20],TCC_EA_WRREQ_DRAM_CREDIT_STALL[21],TCC_EA_WRREQ_GMI_CREDIT_STALL[21],TCC_EA_WRREQ_IO_CREDIT_STALL[21],TCC_EA_WRREQ_LEVEL[21],TCC_EA_WRREQ_DRAM_CREDIT_STALL[22],TCC_EA_WRREQ_GMI_CREDIT_STALL[22],TCC_EA_WRREQ_IO_CREDIT_STALL[22],TCC_EA_WRREQ_LEVEL[22],TCC_EA_WRREQ_DRAM_CREDIT_STALL[23],TCC_EA_WRREQ_GMI_CREDIT_STALL[23],TCC_EA_WRREQ_IO_CREDIT_STALL[23],TCC_EA_WRREQ_LEVEL[23],TCC_EA_WRREQ_DRAM_CREDIT_STALL[24],TCC_EA_WRREQ_GMI_CREDIT_STALL[24],TCC_EA_WRREQ_IO_CREDIT_STALL[24],TCC_EA_WRREQ_LEVEL[24],TCC_EA_WRREQ_DRAM_CREDIT_STALL[25],TCC_EA_WRREQ_GMI_CREDIT_STALL[25],TCC_EA_WRREQ_IO_CREDIT_STALL[25],TCC_EA_WRREQ_LEVEL[25],TCC_EA_WRREQ_DRAM_CREDIT_STALL[26],TCC_EA_WRREQ_GMI_CREDIT_STALL[26],TCC_EA_WRREQ_IO_CREDIT_STALL[26],TCC_EA_WRREQ_LEVEL[26],TCC_EA_WRREQ_DRAM_CREDIT_STALL[27],TCC_EA_WRREQ_GMI_CREDIT_STALL[27],TCC_EA_WRREQ_IO_CREDIT_STALL[27],TCC_EA_WRREQ_LEVEL[27],TCC_EA_WRREQ_DRAM_CREDIT_STALL[28],TCC_EA_WRREQ_GMI_CREDIT_STALL[28],TCC_EA_WRREQ_IO_CREDIT_STALL[28],TCC_EA_WRREQ_LEVEL[28],TCC_EA_WRREQ_DRAM_CREDIT_STALL[29],TCC_EA_WRREQ_GMI_CREDIT_STALL[29],TCC_EA_WRREQ_IO_CREDIT_STALL[29],TCC_EA_WRREQ_LEVEL[29],TCC_EA_WRREQ_DRAM_CREDIT_STALL[30],TCC_EA_WRREQ_GMI_CREDIT_STALL[30],TCC_EA_WRREQ_IO_CREDIT_STALL[30],TCC_EA_WRREQ_LEVEL[30],TCC_EA_WRREQ_DRAM_CREDIT_STALL[31],TCC_EA_WRREQ_GMI_CREDIT_STALL[31],TCC_EA_WRREQ_IO_CREDIT_STALL[31],TCC_EA_WRREQ_LEVEL[31],wave_size_12,obj_12,TCC_EA_RDREQ_IO_CREDIT_STALL[0],TCC_EA_RDREQ_LEVEL[0],TCC_EA_WRREQ[0],TCC_EA_WRREQ_64B[0],TCC_EA_RDREQ_IO_CREDIT_STALL[1],TCC_EA_RDREQ_LEVEL[1],TCC_EA_WRREQ[1],TCC_EA_WRREQ_64B[1],TCC_EA_RDREQ_IO_CREDIT_STALL[2],TCC_EA_RDREQ_LEVEL[2],TCC_EA_WRREQ[2],TCC_EA_WRREQ_64B[2],TCC_EA_RDREQ_IO_CREDIT_STALL[3],TCC_EA_RDREQ_LEVEL[3],TCC_EA_WRREQ[3],TCC_EA_WRREQ_64B[3],TCC_EA_RDREQ_IO_CREDIT_STALL[4],TCC_EA_RDREQ_LEVEL[4],TCC_EA_WRREQ[4],TCC_EA_WRREQ_64B[4],TCC_EA_RDREQ_IO_CREDIT_STALL[5],TCC_EA_RDREQ_LEVEL[5],TCC_EA_WRREQ[5],TCC_EA_WRREQ_64B[5],TCC_EA_RDREQ_IO_CREDIT_STALL[6],TCC_EA_RDREQ_LEVEL[6],TCC_EA_WRREQ[6],TCC_EA_WRREQ_64B[6],TCC_EA_RDREQ_IO_CREDIT_STALL[7],TCC_EA_RDREQ_LEVEL[7],TCC_EA_WRREQ[7],TCC_EA_WRREQ_64B[7],TCC_EA_RDREQ_IO_CREDIT_STALL[8],TCC_EA_RDREQ_LEVEL[8],TCC_EA_WRREQ[8],TCC_EA_WRREQ_64B[8],TCC_EA_RDREQ_IO_CREDIT_STALL[9],TCC_EA_RDREQ_LEVEL[9],TCC_EA_WRREQ[9],TCC_EA_WRREQ_64B[9],TCC_EA_RDREQ_IO_CREDIT_STALL[10],TCC_EA_RDREQ_LEVEL[10],TCC_EA_WRREQ[10],TCC_EA_WRREQ_64B[10],TCC_EA_RDREQ_IO_CREDIT_STALL[11],TCC_EA_RDREQ_LEVEL[11],TCC_EA_WRREQ[11],TCC_EA_WRREQ_64B[11],TCC_EA_RDREQ_IO_CREDIT_STALL[12],TCC_EA_RDREQ_LEVEL[12],TCC_EA_WRREQ[12],TCC_EA_WRREQ_64B[12],TCC_EA_RDREQ_IO_CREDIT_STALL[13],TCC_EA_RDREQ_LEVEL[13],TCC_EA_WRREQ[13],TCC_EA_WRREQ_64B[13],TCC_EA_RDREQ_IO_CREDIT_STALL[14],TCC_EA_RDREQ_LEVEL[14],TCC_EA_WRREQ[14],TCC_EA_WRREQ_64B[14],TCC_EA_RDREQ_IO_CREDIT_STALL[15],TCC_EA_RDREQ_LEVEL[15],TCC_EA_WRREQ[15],TCC_EA_WRREQ_64B[15],TCC_EA_RDREQ_IO_CREDIT_STALL[16],TCC_EA_RDREQ_LEVEL[16],TCC_EA_WRREQ[16],TCC_EA_WRREQ_64B[16],TCC_EA_RDREQ_IO_CREDIT_STALL[17],TCC_EA_RDREQ_LEVEL[17],TCC_EA_WRREQ[17],TCC_EA_WRREQ_64B[17],TCC_EA_RDREQ_IO_CREDIT_STALL[18],TCC_EA_RDREQ_LEVEL[18],TCC_EA_WRREQ[18],TCC_EA_WRREQ_64B[18],TCC_EA_RDREQ_IO_CREDIT_STALL[19],TCC_EA_RDREQ_LEVEL[19],TCC_EA_WRREQ[19],TCC_EA_WRREQ_64B[19],TCC_EA_RDREQ_IO_CREDIT_STALL[20],TCC_EA_RDREQ_LEVEL[20],TCC_EA_WRREQ[20],TCC_EA_WRREQ_64B[20],TCC_EA_RDREQ_IO_CREDIT_STALL[21],TCC_EA_RDREQ_LEVEL[21],TCC_EA_WRREQ[21],TCC_EA_WRREQ_64B[21],TCC_EA_RDREQ_IO_CREDIT_STALL[22],TCC_EA_RDREQ_LEVEL[22],TCC_EA_WRREQ[22],TCC_EA_WRREQ_64B[22],TCC_EA_RDREQ_IO_CREDIT_STALL[23],TCC_EA_RDREQ_LEVEL[23],TCC_EA_WRREQ[23],TCC_EA_WRREQ_64B[23],TCC_EA_RDREQ_IO_CREDIT_STALL[24],TCC_EA_RDREQ_LEVEL[24],TCC_EA_WRREQ[24],TCC_EA_WRREQ_64B[24],TCC_EA_RDREQ_IO_CREDIT_STALL[25],TCC_EA_RDREQ_LEVEL[25],TCC_EA_WRREQ[25],TCC_EA_WRREQ_64B[25],TCC_EA_RDREQ_IO_CREDIT_STALL[26],TCC_EA_RDREQ_LEVEL[26],TCC_EA_WRREQ[26],TCC_EA_WRREQ_64B[26],TCC_EA_RDREQ_IO_CREDIT_STALL[27],TCC_EA_RDREQ_LEVEL[27],TCC_EA_WRREQ[27],TCC_EA_WRREQ_64B[27],TCC_EA_RDREQ_IO_CREDIT_STALL[28],TCC_EA_RDREQ_LEVEL[28],TCC_EA_WRREQ[28],TCC_EA_WRREQ_64B[28],TCC_EA_RDREQ_IO_CREDIT_STALL[29],TCC_EA_RDREQ_LEVEL[29],TCC_EA_WRREQ[29],TCC_EA_WRREQ_64B[29],TCC_EA_RDREQ_IO_CREDIT_STALL[30],TCC_EA_RDREQ_LEVEL[30],TCC_EA_WRREQ[30],TCC_EA_WRREQ_64B[30],TCC_EA_RDREQ_IO_CREDIT_STALL[31],TCC_EA_RDREQ_LEVEL[31],TCC_EA_WRREQ[31],TCC_EA_WRREQ_64B[31],wave_size_13,obj_13,TCC_ATOMIC[0],TCC_CYCLE[0],TCC_EA_ATOMIC[0],TCC_EA_ATOMIC_LEVEL[0],TCC_ATOMIC[1],TCC_CYCLE[1],TCC_EA_ATOMIC[1],TCC_EA_ATOMIC_LEVEL[1],TCC_ATOMIC[2],TCC_CYCLE[2],TCC_EA_ATOMIC[2],TCC_EA_ATOMIC_LEVEL[2],TCC_ATOMIC[3],TCC_CYCLE[3],TCC_EA_ATOMIC[3],TCC_EA_ATOMIC_LEVEL[3],TCC_ATOMIC[4],TCC_CYCLE[4],TCC_EA_ATOMIC[4],TCC_EA_ATOMIC_LEVEL[4],TCC_ATOMIC[5],TCC_CYCLE[5],TCC_EA_ATOMIC[5],TCC_EA_ATOMIC_LEVEL[5],TCC_ATOMIC[6],TCC_CYCLE[6],TCC_EA_ATOMIC[6],TCC_EA_ATOMIC_LEVEL[6],TCC_ATOMIC[7],TCC_CYCLE[7],TCC_EA_ATOMIC[7],TCC_EA_ATOMIC_LEVEL[7],TCC_ATOMIC[8],TCC_CYCLE[8],TCC_EA_ATOMIC[8],TCC_EA_ATOMIC_LEVEL[8],TCC_ATOMIC[9],TCC_CYCLE[9],TCC_EA_ATOMIC[9],TCC_EA_ATOMIC_LEVEL[9],TCC_ATOMIC[10],TCC_CYCLE[10],TCC_EA_ATOMIC[10],TCC_EA_ATOMIC_LEVEL[10],TCC_ATOMIC[11],TCC_CYCLE[11],TCC_EA_ATOMIC[11],TCC_EA_ATOMIC_LEVEL[11],TCC_ATOMIC[12],TCC_CYCLE[12],TCC_EA_ATOMIC[12],TCC_EA_ATOMIC_LEVEL[12],TCC_ATOMIC[13],TCC_CYCLE[13],TCC_EA_ATOMIC[13],TCC_EA_ATOMIC_LEVEL[13],TCC_ATOMIC[14],TCC_CYCLE[14],TCC_EA_ATOMIC[14],TCC_EA_ATOMIC_LEVEL[14],TCC_ATOMIC[15],TCC_CYCLE[15],TCC_EA_ATOMIC[15],TCC_EA_ATOMIC_LEVEL[15],TCC_ATOMIC[16],TCC_CYCLE[16],TCC_EA_ATOMIC[16],TCC_EA_ATOMIC_LEVEL[16],TCC_ATOMIC[17],TCC_CYCLE[17],TCC_EA_ATOMIC[17],TCC_EA_ATOMIC_LEVEL[17],TCC_ATOMIC[18],TCC_CYCLE[18],TCC_EA_ATOMIC[18],TCC_EA_ATOMIC_LEVEL[18],TCC_ATOMIC[19],TCC_CYCLE[19],TCC_EA_ATOMIC[19],TCC_EA_ATOMIC_LEVEL[19],TCC_ATOMIC[20],TCC_CYCLE[20],TCC_EA_ATOMIC[20],TCC_EA_ATOMIC_LEVEL[20],TCC_ATOMIC[21],TCC_CYCLE[21],TCC_EA_ATOMIC[21],TCC_EA_ATOMIC_LEVEL[21],TCC_ATOMIC[22],TCC_CYCLE[22],TCC_EA_ATOMIC[22],TCC_EA_ATOMIC_LEVEL[22],TCC_ATOMIC[23],TCC_CYCLE[23],TCC_EA_ATOMIC[23],TCC_EA_ATOMIC_LEVEL[23],TCC_ATOMIC[24],TCC_CYCLE[24],TCC_EA_ATOMIC[24],TCC_EA_ATOMIC_LEVEL[24],TCC_ATOMIC[25],TCC_CYCLE[25],TCC_EA_ATOMIC[25],TCC_EA_ATOMIC_LEVEL[25],TCC_ATOMIC[26],TCC_CYCLE[26],TCC_EA_ATOMIC[26],TCC_EA_ATOMIC_LEVEL[26],TCC_ATOMIC[27],TCC_CYCLE[27],TCC_EA_ATOMIC[27],TCC_EA_ATOMIC_LEVEL[27],TCC_ATOMIC[28],TCC_CYCLE[28],TCC_EA_ATOMIC[28],TCC_EA_ATOMIC_LEVEL[28],TCC_ATOMIC[29],TCC_CYCLE[29],TCC_EA_ATOMIC[29],TCC_EA_ATOMIC_LEVEL[29],TCC_ATOMIC[30],TCC_CYCLE[30],TCC_EA_ATOMIC[30],TCC_EA_ATOMIC_LEVEL[30],TCC_ATOMIC[31],TCC_CYCLE[31],TCC_EA_ATOMIC[31],TCC_EA_ATOMIC_LEVEL[31],wave_size_14,obj_14,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,SQ_THREAD_CYCLES_VALU,SQ_IFETCH,TCP_TCC_WRITE_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_NC_READ_REQ_sum,TA_FLAT_WAVEFRONTS_sum,TA_FLAT_READ_WAVEFRONTS_sum,SPI_RA_BAR_CU_FULL_CSN,SPI_RA_TGLIM_CU_FULL_CSN,TCC_EA_RDREQ_sum,TCC_EA_RDREQ_32B_sum,TCC_EA_RD_UNCACHED_32B_sum,TCC_EA_RDREQ_DRAM_sum,wave_size_15,obj_15,TCC_RW_REQ[0],TCC_TOO_MANY_EA_WRREQS_STALL[0],TCC_WRITE[0],TCC_RW_REQ[1],TCC_TOO_MANY_EA_WRREQS_STALL[1],TCC_WRITE[1],TCC_RW_REQ[2],TCC_TOO_MANY_EA_WRREQS_STALL[2],TCC_WRITE[2],TCC_RW_REQ[3],TCC_TOO_MANY_EA_WRREQS_STALL[3],TCC_WRITE[3],TCC_RW_REQ[4],TCC_TOO_MANY_EA_WRREQS_STALL[4],TCC_WRITE[4],TCC_RW_REQ[5],TCC_TOO_MANY_EA_WRREQS_STALL[5],TCC_WRITE[5],TCC_RW_REQ[6],TCC_TOO_MANY_EA_WRREQS_STALL[6],TCC_WRITE[6],TCC_RW_REQ[7],TCC_TOO_MANY_EA_WRREQS_STALL[7],TCC_WRITE[7],TCC_RW_REQ[8],TCC_TOO_MANY_EA_WRREQS_STALL[8],TCC_WRITE[8],TCC_RW_REQ[9],TCC_TOO_MANY_EA_WRREQS_STALL[9],TCC_WRITE[9],TCC_RW_REQ[10],TCC_TOO_MANY_EA_WRREQS_STALL[10],TCC_WRITE[10],TCC_RW_REQ[11],TCC_TOO_MANY_EA_WRREQS_STALL[11],TCC_WRITE[11],TCC_RW_REQ[12],TCC_TOO_MANY_EA_WRREQS_STALL[12],TCC_WRITE[12],TCC_RW_REQ[13],TCC_TOO_MANY_EA_WRREQS_STALL[13],TCC_WRITE[13],TCC_RW_REQ[14],TCC_TOO_MANY_EA_WRREQS_STALL[14],TCC_WRITE[14],TCC_RW_REQ[15],TCC_TOO_MANY_EA_WRREQS_STALL[15],TCC_WRITE[15],TCC_RW_REQ[16],TCC_TOO_MANY_EA_WRREQS_STALL[16],TCC_WRITE[16],TCC_RW_REQ[17],TCC_TOO_MANY_EA_WRREQS_STALL[17],TCC_WRITE[17],TCC_RW_REQ[18],TCC_TOO_MANY_EA_WRREQS_STALL[18],TCC_WRITE[18],TCC_RW_REQ[19],TCC_TOO_MANY_EA_WRREQS_STALL[19],TCC_WRITE[19],TCC_RW_REQ[20],TCC_TOO_MANY_EA_WRREQS_STALL[20],TCC_WRITE[20],TCC_RW_REQ[21],TCC_TOO_MANY_EA_WRREQS_STALL[21],TCC_WRITE[21],TCC_RW_REQ[22],TCC_TOO_MANY_EA_WRREQS_STALL[22],TCC_WRITE[22],TCC_RW_REQ[23],TCC_TOO_MANY_EA_WRREQS_STALL[23],TCC_WRITE[23],TCC_RW_REQ[24],TCC_TOO_MANY_EA_WRREQS_STALL[24],TCC_WRITE[24],TCC_RW_REQ[25],TCC_TOO_MANY_EA_WRREQS_STALL[25],TCC_WRITE[25],TCC_RW_REQ[26],TCC_TOO_MANY_EA_WRREQS_STALL[26],TCC_WRITE[26],TCC_RW_REQ[27],TCC_TOO_MANY_EA_WRREQS_STALL[27],TCC_WRITE[27],TCC_RW_REQ[28],TCC_TOO_MANY_EA_WRREQS_STALL[28],TCC_WRITE[28],TCC_RW_REQ[29],TCC_TOO_MANY_EA_WRREQS_STALL[29],TCC_WRITE[29],TCC_RW_REQ[30],TCC_TOO_MANY_EA_WRREQS_STALL[30],TCC_WRITE[30],TCC_RW_REQ[31],TCC_TOO_MANY_EA_WRREQS_STALL[31],TCC_WRITE[31],wave_size_16,obj_16,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,SQC_ICACHE_MISSES_DUPLICATE,GRBM_SPI_BUSY,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,TCP_TA_TCP_STATE_READ_sum,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,TD_COALESCABLE_WAVEFRONT_sum,TD_LOAD_WAVEFRONT_sum,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,CPF_CPF_TCIU_BUSY,CPF_CPF_TCIU_STALL,TCC_NC_REQ_sum,TCC_UC_REQ_sum,TCC_CC_REQ_sum,TCC_RW_REQ_sum,Start_Timestamp,End_Timestamp
0,"vecCopy(double*, double*, double*, int, int) ",2,1048576,256,0,0,8,8,16,64,0x7feb4b7c0e80,3445867,360448,163840,0,0,180224,114688,0,63215421.0,181514018.0,81140102.0,131072.0,0.0,862913.0,0,0,27457,128621.0,0.0,0.0,128621.0,64,0x7f3275526e80,4096,0,707,0,4096,0,3138,0,4099,0,0,0,4096,0,0,0,4096,0,165,0,4096,0,858,0,4144,0,1066,0,4096,0,0,0,4096,0,640,0,4096,0,1304,0,4144,0,289,0,4096,0,0,0,4096,0,1332,0,4096,0,1352,0,4096,0,0,0,4096,0,757,0,4335,0,3582,0,4096,0,2029,0,4096,0,1037,0,4096,0,1294,0,4096,0,631,0,4096,0,1741,0,4096,0,0,0,4096,0,784,0,4096,0,86,0,4096,0,1314,0,4097,0,254,0,4096,0,60,0,4098,0,669,0,4096,0,845,0,4096,0,4,0,4096,0,23,0,64,0x7fb733ddce80,32768,0,16384,16384,32768,49152,0,65536,0.0,0.0,120.0,524288.0,0.0,0.0,0,0,913,46518,0,131559.0,131072.0,0.0,131104.0,64,0x7f5224418e80,377928,229866,3373975,16384,24954310,144,48,0,47240,47240,3800249.0,2981015.0,5930.0,1036427.0,2063575.0,0.0,2972033.0,2661142.0,376215,239794,47240,0,47240,0,1511680.0,953717.0,0.0,0.0,64,0x7fe08ff6ee80,0.0,64,0x7f4fe6a58e80,1048576,0,0,0,0,0,131072,0.0,0.0,0.0,0.0,16384,0,87203.0,43869.0,131112.0,0.0,64,0x7f266c220e80,131072.0,131072.0,0.0,2384346.0,0.0,0.0,95543688.0,57448079.0,64,0x7f9a6f404e80,183815,0,0,65536,64048,48,1440,32768,2097152.0,2097152.0,1048576.0,1048576.0,0.0,0.0,0.0,16384.0,13197,29581,9580,588,0,45690,262672.0,0.0,188.0,262484.0,64,0x7f348c572e80,32768,0,0,0,16384,16384,393216,22886436,960.0,513900.0,0.0,524288.0,980336.0,32768.0,0,0,0,16206,131072.0,131072.0,0.0,131072.0,64,0x7f3f53c02e80,0,0,0,16384,0,0,0,0,0.0,0.0,0.0,0.0,16384.0,0.0,0,81920,0.0,0.0,51935.0,118354.0,64,0x7f027a7bee80,0,8192,4096,8192,0,8192,4096,8192,141,8195,4240,8336,0,8192,4096,8192,0,8240,4144,8240,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8429,4333,8429,0,8240,4144,8240,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8312,4216,8312,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,47,8193,4144,8240,64,0x7fe9b6a2ae80,2711,0,0,1798613,2464,0,0,1850236,3874,0,0,1918083,3030,0,0,1882942,3248,0,0,2012201,1524,0,0,1632428,3868,0,0,1931472,2592,0,0,1777425,2296,0,0,1880185,1059,0,0,1708425,4306,0,0,1942243,1109,0,0,1716109,4666,0,0,2182757,946,0,0,1651843,3002,0,0,1865384,1504,0,0,1725654,5002,0,0,2163836,2294,0,0,1864947,5759,0,0,2177452,2804,0,0,1849319,4834,0,0,2018595,3015,0,0,1901202,2515,0,0,1809411,938,0,0,1692245,5376,0,0,2062714,1213,0,0,1667435,2141,0,0,1723426,1115,0,0,1632936,4130,0,0,2044129,2562,0,0,1822686,4574,0,0,2018764,3332,0,0,1927892,64,0x7f87f67b4e80,0,2802655,4096,4096,0,3606053,4096,4096,0,2893803,4096,4096,0,3542487,4096,4096,0,3856572,4096,4096,0,3735816,4096,4096,0,3193444,4096,4096,0,3860333,4096,4096,0,3113491,4096,4096,0,4457939,4096,4096,0,2577992,4096,4096,0,3534986,4096,4096,0,3100677,4096,4096,0,4078175,4096,4096,0,3478422,4096,4096,0,3157882,4096,4096,0,4395344,4096,4096,0,4124458,4096,4096,0,2823057,4096,4096,0,3074963,4096,4096,0,3241045,4096,4096,0,5117254,4096,4096,0,2628968,4096,4096,0,3207068,4096,4096,0,3492539,4096,4096,0,4022004,4096,4096,0,2782768,4096,4096,0,3210753,4096,4096,0,2760786,4096,4096,0,3223648,4096,4096,0,3032862,4096,4096,0,3638213,4096,4096,64,0x7f2a5be2ae80,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,0,48708,0,0,64,0x7f79253c8e80,32768,32768,16384,16384,65536,49152,11534336,65536,131072.0,0.0,0.0,0.0,32768.0,16384.0,0,0,131341.0,0.0,530.0,131340.0,64,0x7fd185eb2e80,8192,0,4096,8192,0,4096,8336,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,64,0x7f5809944e80,0,0,192,0,65536,64286,48,1815,31329,0.0,0.0,0.0,32768.0,0.0,0.0,0.0,32768.0,4096,16384,512,46891,1678,0,48.0,337.0,0.0,262288.0,4804240052620,4804240077420
1,"vecCopy(double*, double*, double*, int, int) ",2,1048576,256,0,0,8,8,16,64,0x7feb4b7c0e80,1909169,360448,163840,0,0,180224,114688,0,65012831.0,168292465.0,67181820.0,131072.0,0.0,1016783.0,0,0,26713,21445.0,0.0,0.0,21445.0,64,0x7f3275526e80,4096,0,555,0,4096,0,1458,0,4096,0,1592,0,4096,0,553,0,4096,0,0,0,4096,0,137,0,4144,0,0,0,4096,0,619,0,4096,0,0,0,4096,0,937,0,4144,0,0,0,4096,0,948,0,4096,0,80,0,4096,0,253,0,4096,0,1983,0,4096,0,0,0,4331,0,1305,0,4096,0,1152,0,4096,0,1236,0,4097,0,616,0,4096,0,330,0,4099,0,617,0,4096,0,0,0,4096,0,82,0,4096,0,0,0,4096,0,462,0,4097,0,509,0,4096,0,544,0,4099,0,113,0,4096,0,203,0,4096,0,0,0,4096,0,589,0,64,0x7fb733ddce80,32768,0,16384,16384,32768,49152,0,65536,0.0,0.0,120.0,524288.0,0.0,0.0,0,0,3624,39441,0,131400.0,131072.0,0.0,86548.0,64,0x7f5224418e80,343048,233168,3407218,16384,25013366,0,48,0,42880,42880,3787049.0,3050248.0,6724.0,987494.0,2049022.0,0.0,3040764.0,2731192.0,343040,242945,42880,0,42880,0,1372160.0,810984.0,0.0,0.0,64,0x7fe08ff6ee80,0.0,64,0x7f4fe6a58e80,1048576,0,0,0,0,0,131072,0.0,0.0,0.0,0.0,16384,0,49400.0,38334.0,30119.0,0.0,64,0x7f266c220e80,131072.0,131072.0,0.0,2604770.0,0.0,0.0,126314114.0,47183280.0,64,0x7f9a6f404e80,182834,0,0,65536,64048,48,1440,32768,2097152.0,2097152.0,1048576.0,1048576.0,0.0,0.0,0.0,16384.0,12093,28477,8563,3326,0,41471,262534.0,0.0,47.0,262487.0,64,0x7f348c572e80,32768,0,0,0,16384,16384,393216,22034677,960.0,514017.0,0.0,524288.0,986641.0,32768.0,0,0,0,13417,86497.0,86497.0,0.0,86497.0,64,0x7f3f53c02e80,0,0,0,16384,0,0,0,0,0.0,0.0,0.0,0.0,16384.0,0.0,0,81920,0.0,0.0,37467.0,102724.0,64,0x7f027a7bee80,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8242,4146,8242,0,8194,4098,8194,0,8192,4096,8192,0,8193,4097,8193,0,8192,4096,8192,0,8433,4337,8433,0,8240,4144,8240,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8193,4097,8193,0,8192,4096,8192,0,8192,4096,8192,0,8312,4216,8312,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,47,8193,4144,8240,64,0x7fe9b6a2ae80,2668,0,0,1554523,2351,0,0,1561710,1276,0,0,1385448,5715,0,0,1719568,2247,0,0,1431683,4425,0,0,1746451,4956,0,0,1641576,5285,0,0,1676098,1328,0,0,1409759,1813,0,0,1456504,2655,0,0,1536048,5125,0,0,1720963,1408,0,0,1304298,5690,0,0,1736423,573,0,0,1287829,6213,0,0,1730230,1303,0,0,1327018,4167,0,0,1653117,2247,0,0,1498414,5005,0,0,1678759,2491,0,0,1374388,2603,0,0,1542250,2366,0,0,1521151,3187,0,0,1489896,4262,0,0,1616448,3936,0,0,1693531,4225,0,0,1562218,5707,0,0,1656114,4031,0,0,1605973,2215,0,0,1502113,2614,0,0,1476098,2995,0,0,1595941,64,0x7f87f67b4e80,0,3516894,2743,2743,0,3764634,2722,2722,0,3441015,2760,2760,0,3231987,2734,2734,0,3756144,2740,2740,0,3274495,2732,2732,0,3654490,2736,2736,0,3608763,2732,2732,0,3654264,2750,2750,0,3221909,2750,2750,0,3270644,2774,2774,0,3144878,2704,2704,0,3114142,2748,2748,0,3258274,2740,2740,0,3523518,2752,2752,0,3160429,2696,2696,0,5358702,2724,2724,0,3559666,2728,2728,0,3215520,2724,2724,0,3832607,2716,2716,0,3152471,2708,2708,0,3407181,2792,2792,0,3401512,2755,2755,0,2736861,2729,2729,0,3543658,2732,2732,0,2959545,2720,2720,0,3352761,2738,2738,0,3240223,2768,2768,0,3664720,2726,2726,0,3138901,2750,2750,0,3072666,2768,2768,0,3247805,2728,2728,64,0x7f2a5be2ae80,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,0,43740,0,0,64,0x7f79253c8e80,32768,32768,16384,16384,65536,49152,11534336,65536,131072.0,0.0,0.0,0.0,32768.0,16384.0,0,0,131386.0,0.0,626.0,131385.0,64,0x7fd185eb2e80,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,64,0x7f5809944e80,0,0,96,0,65536,65557,0,0,33338,0.0,0.0,0.0,32768.0,0.0,0.0,0.0,32768.0,4096,16384,506,48816,6151,0,96.0,743.0,0.0,262144.0,4804240175980,4804240194860
2,"vecCopy(double*, double*, double*, int, int) ",2,1048576,256,0,0,8,8,16,64,0x7feb4b7c0e80,3489022,360448,163840,0,0,180224,114688,0,61256365.0,185409461.0,72198058.0,131072.0,0.0,789578.0,0,0,27592,125410.0,0.0,0.0,125410.0,64,0x7f3275526e80,4096,0,549,0,4096,0,34,0,4096,0,895,0,4096,0,347,0,4096,0,0,0,4096,0,84,0,4144,0,342,0,4096,0,255,0,4096,0,544,0,4096,0,351,0,4144,0,483,0,4096,0,1193,0,4096,0,957,0,4096,0,568,0,4096,0,395,0,4096,0,0,0,4336,0,4086,0,4096,0,1005,0,4096,0,531,0,4097,0,1363,0,4096,0,47,0,4099,0,614,0,4096,0,1078,0,4096,0,0,0,4096,0,0,0,4096,0,483,0,4097,0,33,0,4096,0,582,0,4106,0,0,0,4096,0,0,0,4096,0,491,0,4096,0,484,0,64,0x7fb733ddce80,32768,0,16384,16384,32768,49152,0,65536,0.0,0.0,120.0,524288.0,0.0,0.0,0,0,3863,39018,0,131396.0,131072.0,0.0,86388.0,64,0x7f5224418e80,334856,222785,3269390,16384,23820348,0,48,0,41856,41856,3631109.0,2986004.0,5077.0,939228.0,2044314.0,0.0,2976282.0,2664436.0,334848,232551,41856,0,41856,0,1339392.0,793219.0,0.0,0.0,64,0x7fe08ff6ee80,0.0,64,0x7f4fe6a58e80,1048576,0,0,0,0,0,131072,0.0,0.0,0.0,0.0,16384,0,87158.0,0.0,131113.0,0.0,64,0x7f266c220e80,131072.0,131072.0,0.0,2373667.0,0.0,0.0,126011963.0,46653086.0,64,0x7f9a6f404e80,184427,0,0,65536,64048,48,1440,32768,2097152.0,2097152.0,1048576.0,1048576.0,0.0,0.0,0.0,16384.0,11762,28146,8642,3346,0,40586,262533.0,0.0,47.0,262486.0,64,0x7f348c572e80,32768,0,0,0,16384,16384,393216,22229295,960.0,514026.0,0.0,524288.0,915426.0,32768.0,0,0,0,14161,86583.0,86583.0,0.0,86583.0,64,0x7f3f53c02e80,0,0,0,16384,0,0,0,0,0.0,0.0,0.0,0.0,16384.0,0.0,0,81920,0.0,0.0,17882.0,90340.0,64,0x7f027a7bee80,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8242,4146,8242,0,8194,4098,8194,0,8192,4096,8192,0,8193,4097,8193,0,8192,4096,8192,0,8429,4333,8429,0,8240,4144,8240,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8193,4097,8193,0,8192,4096,8192,0,8192,4096,8192,0,8312,4216,8312,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,0,8192,4096,8192,47,8193,4144,8240,64,0x7fe9b6a2ae80,1974,0,0,1360753,2720,0,0,1459551,2099,0,0,1448713,2627,0,0,1488978,1467,0,0,1364173,4868,0,0,1636780,3527,0,0,1538084,2591,0,0,1431499,3095,0,0,1495863,2507,0,0,1455340,2201,0,0,1449803,1997,0,0,1375375,1695,0,0,1447228,3910,0,0,1584264,2797,0,0,1476651,2641,0,0,1519536,2809,0,0,1565537,2423,0,0,1367391,2797,0,0,1441364,1534,0,0,1365036,2965,0,0,1503928,4001,0,0,1610668,2698,0,0,1481250,3300,0,0,1541764,2022,0,0,1426714,3600,0,0,1539342,2853,0,0,1505551,3237,0,0,1584118,2939,0,0,1477063,2454,0,0,1489071,3184,0,0,1531463,3330,0,0,1565378,64,0x7f87f67b4e80,0,4660390,2674,2674,0,3653160,2688,2688,0,2956330,2702,2702,0,3111416,2710,2710,0,3395779,2704,2704,0,3596390,2712,2712,0,2772478,2712,2712,0,3179108,2736,2736,0,2741777,2688,2688,0,3756089,2660,2660,0,3877505,2712,2712,0,4755673,2746,2746,0,3407115,2712,2712,0,3480917,2668,2668,0,3494926,2720,2720,0,3076511,2722,2722,0,3209572,2681,2681,0,3422632,2666,2666,0,5097881,2690,2690,0,3431056,2740,2740,0,3791467,2692,2692,0,4734537,2720,2720,0,3040192,2692,2692,0,3574610,2726,2726,0,3089035,2688,2688,0,3733058,2674,2674,0,3441205,2734,2734,0,2699640,2712,2712,0,3066358,2709,2709,0,3654553,2672,2672,0,2978687,2716,2716,0,3222025,2696,2696,64,0x7f2a5be2ae80,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,0,43779,0,0,64,0x7f79253c8e80,32768,32768,16384,16384,65536,49152,11534336,65536,131072.0,0.0,0.0,0.0,32768.0,16384.0,0,0,131345.0,0.0,544.0,131344.0,64,0x7fd185eb2e80,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,8192,0,4096,64,0x7f5809944e80,0,0,48,0,65536,65536,0,0,31292,0.0,0.0,0.0,32768.0,0.0,0.0,0.0,32768.0,4096,16384,457,43166,1732,0,48.0,349.0,0.0,262144.0,4804240215020,4804240233580