Omri Mor
a0fcbf8d35
* Add environment variable configuration infrastructure
- Namespace rocshmem::envvar
- Track all config env vars in per-category lists
- Remove duplicates from list of allowed env var types
- Reject negative inputs for unsigned integer types
- Accept empty strings for std::string
- Print error source location using C++20 std::source_location
- Unit tests
* Port environment variables
- ROCSHMEM_UNIQUEID_WITH_MPI
- ROCSHMEM_RO_DISABLE_IPC
- ROCSHMEM_BOOTSTRAP_TIMEOUT
- ROCSHMEM_BOOTSTRAP_HOSTID
- ROCSHMEM_BOOTSTRAP_SOCKET_IFNAME
- ROCSHMEM_RO_PROGRESS_DELAY
- ROCSHMEM_BOOTSTRAP_SOCKET_FAMILY
- ROCSHMEM_MAX_NUM_CONTEXTS
+ Merge the independent per-backend copies into a single variable
that is used by all three backends (IPC, RO, GDA).
+ Set default to 32 (for GDA); prior default for IPC and RO was 1024.
- ROCSHMEM_MAX_NUM_HOST_CONTEXTS
- ROCSHMEM_MAX_WF_BUFFERS
- ROCSHMEM_SQ_SIZE
- ROCSHMEM_RO_NET_CPU_QUEUE
+ Renamed from RO_NET_CPU_QUEUE
+ Change env var input type to bool, default to false
+ Invert code logic: setting RO_NET_CPU_QUEUE to anything
would /disable/ a variable gpu_queue, which defaulted to true.
Variable is now named config::ro::net_cpu_queue,
with all prior checks for gpu_queue inverted.
- ROCSHMEM_USE_IB_HCA
- ROCSHMEM_HEAP_SIZE
+ Defaults to 1L << 30 i.e. 1 GiB,
from default heap size in memory/heap_memory.hpp.
- ROCSHMEM_MAX_NUM_TEAMS
+ Unlike other env vars, this can be referenced from devices.
+ Function currently narrows from size_t to int: uses need to be audited
for safety and correctness in using size_t directly.
- ROCSHMEM_GDA_ALTERNATE_QP_PORTS
* New env var ROCSHMEM_DEBUG
- Debug levels:
+ NONE
+ VERSION
+ WARN
+ INFO
+ TRACE
- Currently unused - will be added later
- Mirrors RCCL debug control
* Remove rocshmem::rocshmem_env_config
* Change interface for GetClosestNicToGpu
to accept const char** instead of char**:
the pointed-to string does not need to be modified
- Files were not audited for inclusion of util.hpp only for env vars
---------
Signed-off-by: Omri Mor <Omri.Mor@amd.com>
112 Zeilen
3.5 KiB
C++
112 Zeilen
3.5 KiB
C++
/******************************************************************************
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* Copyright (c) Advanced Micro Devices, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal in the Software without restriction, including without limitation the
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* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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* IN THE SOFTWARE.
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*****************************************************************************/
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#include "queue.hpp"
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#include "envvar.hpp"
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#include "mpi_transport.hpp"
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namespace rocshmem {
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Queue::Queue() { }
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Queue::Queue(size_t max_queues, size_t queue_size)
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: max_queues_{max_queues},
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queue_size_{queue_size},
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queue_proxy_{max_queues, queue_size},
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queue_desc_proxy_{max_queues} { }
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uint64_t Queue::get_read_index(uint64_t queue_index) {
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return descriptor(queue_index)->read_index % queue_size_;
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}
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void Queue::increment_read_index(uint64_t queue_index) {
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descriptor(queue_index)->read_index++;
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}
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bool Queue::process(uint64_t queue_index, MPITransport* transport) {
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auto next_elem{next_element(queue_index)};
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if (next_elem->notify_cpu.valid) {
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transport->insertRequest(next_elem, queue_index);
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auto queues{queue_proxy_.get()};
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queues[queue_index][get_read_index(queue_index)].notify_cpu.valid = 0;
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increment_read_index(queue_index);
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return true;
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}
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return false;
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}
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queue_element* Queue::next_element(uint64_t queue_index) {
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queue_element *next_elem{nullptr};
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if (!envvar::ro::net_cpu_queue) {
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hdp_proxy_.get()->hdp_flush();
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copy_element_to_cache(queue_index);
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next_elem = queue_element_cache_proxy_.get();
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} else {
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auto queues {queue_proxy_.get()};
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auto read_slot{get_read_index(queue_index)};
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next_elem = &queues[queue_index][read_slot];
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}
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return next_elem;
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}
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void Queue::copy_element_to_cache(uint64_t queue_index) {
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auto element{queue_element_cache_proxy_.get()};
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auto read_slot{get_read_index(queue_index)};
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auto queues {queue_proxy_.get()};
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::memcpy(element, &queues[queue_index][read_slot], sizeof(queue_element_t));
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}
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void Queue::flush_hdp() {
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if (envvar::ro::net_cpu_queue) {
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hdp_proxy_.get()->hdp_flush();
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}
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}
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void Queue::sfence_flush_hdp() {
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if (envvar::ro::net_cpu_queue) {
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asm volatile("sfence" ::: "memory");
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hdp_proxy_.get()->hdp_flush();
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}
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}
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void Queue::notify(volatile char* status) {
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*status = 1;
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}
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uint64_t Queue::size() {
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return queue_size_;
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}
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__host__ __device__ queue_desc_t* Queue::descriptor(uint64_t index) {
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auto queue_descs{queue_desc_proxy_.get()};
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return &queue_descs[index];
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}
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queue_element_t* Queue::elements(uint64_t index) {
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auto queue{queue_proxy_.get()};
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return queue[index];
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}
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} // namespace rocshmem
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