Sylvain Jeaugey
a46ea10583
Add support for CUDA graphs. Fuse BCM Gen4 switches to avoid suboptimal performance on some platforms. Issue #439. Fix bootstrap issue caused by connection reordering. Fix CPU locking block. Improve CollNet algorithm. Improve performance on DGX A100 for communicators with only one GPU per node.
58 строки
1.2 KiB
C
58 строки
1.2 KiB
C
/*************************************************************************
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* Copyright (c) 2019-2021, NVIDIA CORPORATION. All rights reserved.
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*
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* See LICENSE.txt for license information
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************************************************************************/
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#ifndef NCCL_INFO_H_
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#define NCCL_INFO_H_
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#include "nccl.h"
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#include "devcomm.h"
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typedef enum {
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ncclPatternRing,
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ncclPatternRingTwice,
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ncclPatternPipelineFrom,
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ncclPatternPipelineTo,
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ncclPatternTreeUp,
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ncclPatternTreeDown,
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ncclPatternTreeUpDown,
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ncclPatternCollTreeUpDown
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} ncclPattern_t;
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// Used to pass NCCL call information between functions
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struct ncclInfo {
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ncclFunc_t coll;
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const char* opName;
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// NCCL Coll Args
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const void* sendbuff;
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void* recvbuff;
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size_t count;
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ncclDataType_t datatype;
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ncclRedOp_t op;
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int root;
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ncclComm_t comm;
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cudaStream_t stream;
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// Algorithm details
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int chunkSteps;
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int sliceSteps;
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// Computed later
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int algorithm;
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int protocol;
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ncclPattern_t pattern;
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int nChannels;
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int nThreads;
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size_t nBytes;
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int nstepsPerLoop;
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int nchunksPerLoop;
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ssize_t sendbytes;
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ssize_t recvbytes;
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int recvChunkSize;
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int sendChunkSize;
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uint32_t delta;
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int channelId;
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};
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#endif
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