080687ffdc
Change-Id: I5cbb8ca5745c77ae877101ac76921e59dd221dee
[ROCm/hip commit: 5f70ceb5e5]
25 строки
1.4 KiB
Markdown
25 строки
1.4 KiB
Markdown
# Glossary of terms
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* **host**, **host CPU** : Executes the HIP runtime API and is capable of initiating kernel launches to one or more devices.
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* **default device** : Each host thread maintains a default device.
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Most HIP runtime APIs (including memory allocation, copy commands, kernel launches) do not accept an explicit device
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argument but instead implicitly use the default device.
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The default device can be set with `hipSetDevice`.
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* **active host thread** - the thread which is running the HIP APIs.
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* **HIP-Clang** - Heterogeneous AMDGPU Compiler, with its capability to compile HIP programs on AMD platform (https://github.com/RadeonOpenCompute/llvm-project).
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* **clr** - a repository for AMD Compute Language Runtime, contains source codes for AMD's compute languages runtimes: HIP and OpenCL.
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clr (https://github.com/ROCm/clr) contains the following three parts,
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* `hipamd`: contains implementation of HIP language on AMD platform.
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* `rocclr`: contains common runtime used in HIP and OpenCL, which provides virtual device interfaces that compute runtimes interact with different backends such as ROCr on Linux or PAL on Windows.
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* `opencl`: contains implementation of OpenCL on AMD platform.
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* **hipify tools** - tools to convert CUDA code to portable C++ code (https://github.com/ROCm/HIPIFY).
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* **`hipconfig`** - tool to report various configuration properties of the target platform.
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* **`nvcc`** - NVIDIA CUDA `nvcc` compiler, do not capitalize.
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