rocm-systems/tests/workloads/path/MI200/pmc_perf.csv

Dispatch_ID,Kernel_Name,GPU_ID,Grid_Size,Workgroup_Size,LDS_Per_Workgroup,Scratch_Per_Workitem,Arch_VGPR,Accum_VGPR,SGPR,wave_size,obj,TCC_EA_WRREQ_DRAM_CREDIT_STALL[0],TCC_EA_WRREQ_GMI_CREDIT_STALL[0],TCC_EA_WRREQ_IO_CREDIT_STALL[0],TCC_EA_WRREQ_LEVEL[0],TCC_EA_WRREQ_DRAM_CREDIT_STALL[1],TCC_EA_WRREQ_GMI_CREDIT_STALL[1],TCC_EA_WRREQ_IO_CREDIT_STALL[1],TCC_EA_WRREQ_LEVEL[1],TCC_EA_WRREQ_DRAM_CREDIT_STALL[2],TCC_EA_WRREQ_GMI_CREDIT_STALL[2],TCC_EA_WRREQ_IO_CREDIT_STALL[2],TCC_EA_WRREQ_LEVEL[2],TCC_EA_WRREQ_DRAM_CREDIT_STALL[3],TCC_EA_WRREQ_GMI_CREDIT_STALL[3],TCC_EA_WRREQ_IO_CREDIT_STALL[3],TCC_EA_WRREQ_LEVEL[3],TCC_EA_WRREQ_DRAM_CREDIT_STALL[4],TCC_EA_WRREQ_GMI_CREDIT_STALL[4],TCC_EA_WRREQ_IO_CREDIT_STALL[4],TCC_EA_WRREQ_LEVEL[4],TCC_EA_WRREQ_DRAM_CREDIT_STALL[5],TCC_EA_WRREQ_GMI_CREDIT_STALL[5],TCC_EA_WRREQ_IO_CREDIT_STALL[5],TCC_EA_WRREQ_LEVEL[5],TCC_EA_WRREQ_DRAM_CREDIT_STALL[6],TCC_EA_WRREQ_GMI_CREDIT_STALL[6],TCC_EA_WRREQ_IO_CREDIT_STALL[6],TCC_EA_WRREQ_LEVEL[6],TCC_EA_WRREQ_DRAM_CREDIT_STALL[7],TCC_EA_WRREQ_GMI_CREDIT_STALL[7],TCC_EA_WRREQ_IO_CREDIT_STALL[7],TCC_EA_WRREQ_LEVEL[7],TCC_EA_WRREQ_DRAM_CREDIT_STALL[8],TCC_EA_WRREQ_GMI_CREDIT_STALL[8],TCC_EA_WRREQ_IO_CREDIT_STALL[8],TCC_EA_WRREQ_LEVEL[8],TCC_EA_WRREQ_DRAM_CREDIT_STALL[9],TCC_EA_WRREQ_GMI_CREDIT_STALL[9],TCC_EA_WRREQ_IO_CREDIT_STALL[9],TCC_EA_WRREQ_LEVEL[9],TCC_EA_WRREQ_DRAM_CREDIT_STALL[10],TCC_EA_WRREQ_GMI_CREDIT_STALL[10],TCC_EA_WRREQ_IO_CREDIT_STALL[10],TCC_EA_WRREQ_LEVEL[10],TCC_EA_WRREQ_DRAM_CREDIT_STALL[11],TCC_EA_WRREQ_GMI_CREDIT_STALL[11],TCC_EA_WRREQ_IO_CREDIT_STALL[11],TCC_EA_WRREQ_LEVEL[11],TCC_EA_WRREQ_DRAM_CREDIT_STALL[12],TCC_EA_WRREQ_GMI_CREDIT_STALL[12],TCC_EA_WRREQ_IO_CREDIT_STALL[12],TCC_EA_WRREQ_LEVEL[12],TCC_EA_WRREQ_DRAM_CREDIT_STALL[13],TCC_EA_WRREQ_GMI_CREDIT_STALL[13],TCC_EA_WRREQ_IO_CREDIT_STALL[13],TCC_EA_WRREQ_LEVEL[13],TCC_EA_WRREQ_DRAM_CREDIT_STALL[14],TCC_EA_WRREQ_GMI_CREDIT_STALL[14],TCC_EA_WRREQ_IO_CREDIT_STALL[14],TCC_EA_WRREQ_LEVEL[14],TCC_EA_WRREQ_DRAM_CREDIT_STALL[15],TCC_EA_WRREQ_GMI_CREDIT_STALL[15],TCC_EA_WRREQ_IO_CREDIT_STALL[15],TCC_EA_WRREQ_LEVEL[15],TCC_EA_WRREQ_DRAM_CREDIT_STALL[16],TCC_EA_WRREQ_GMI_CREDIT_STALL[16],TCC_EA_WRREQ_IO_CREDIT_STALL[16],TCC_EA_WRREQ_LEVEL[16],TCC_EA_WRREQ_DRAM_CREDIT_STALL[17],TCC_EA_WRREQ_GMI_CREDIT_STALL[17],TCC_EA_WRREQ_IO_CREDIT_STALL[17],TCC_EA_WRREQ_LEVEL[17],TCC_EA_WRREQ_DRAM_CREDIT_STALL[18],TCC_EA_WRREQ_GMI_CREDIT_STALL[18],TCC_EA_WRREQ_IO_CREDIT_STALL[18],TCC_EA_WRREQ_LEVEL[18],TCC_EA_WRREQ_DRAM_CREDIT_STALL[19],TCC_EA_WRREQ_GMI_CREDIT_STALL[19],TCC_EA_WRREQ_IO_CREDIT_STALL[19],TCC_EA_WRREQ_LEVEL[19],TCC_EA_WRREQ_DRAM_CREDIT_STALL[20],TCC_EA_WRREQ_GMI_CREDIT_STALL[20],TCC_EA_WRREQ_IO_CREDIT_STALL[20],TCC_EA_WRREQ_LEVEL[20],TCC_EA_WRREQ_DRAM_CREDIT_STALL[21],TCC_EA_WRREQ_GMI_CREDIT_STALL[21],TCC_EA_WRREQ_IO_CREDIT_STALL[21],TCC_EA_WRREQ_LEVEL[21],TCC_EA_WRREQ_DRAM_CREDIT_STALL[22],TCC_EA_WRREQ_GMI_CREDIT_STALL[22],TCC_EA_WRREQ_IO_CREDIT_STALL[22],TCC_EA_WRREQ_LEVEL[22],TCC_EA_WRREQ_DRAM_CREDIT_STALL[23],TCC_EA_WRREQ_GMI_CREDIT_STALL[23],TCC_EA_WRREQ_IO_CREDIT_STALL[23],TCC_EA_WRREQ_LEVEL[23],TCC_EA_WRREQ_DRAM_CREDIT_STALL[24],TCC_EA_WRREQ_GMI_CREDIT_STALL[24],TCC_EA_WRREQ_IO_CREDIT_STALL[24],TCC_EA_WRREQ_LEVEL[24],TCC_EA_WRREQ_DRAM_CREDIT_STALL[25],TCC_EA_WRREQ_GMI_CREDIT_STALL[25],TCC_EA_WRREQ_IO_CREDIT_STALL[25],TCC_EA_WRREQ_LEVEL[25],TCC_EA_WRREQ_DRAM_CREDIT_STALL[26],TCC_EA_WRREQ_GMI_CREDIT_STALL[26],TCC_EA_WRREQ_IO_CREDIT_STALL[26],TCC_EA_WRREQ_LEVEL[26],TCC_EA_WRREQ_DRAM_CREDIT_STALL[27],TCC_EA_WRREQ_GMI_CREDIT_STALL[27],TCC_EA_WRREQ_IO_CREDIT_STALL[27],TCC_EA_WRREQ_LEVEL[27],TCC_EA_WRREQ_DRAM_CREDIT_STALL[28],TCC_EA_WRREQ_GMI_CREDIT_STALL[28],TCC_EA_WRREQ_IO_CREDIT_STALL[28],TCC_EA_WRREQ_LEVEL[28],TCC_EA_WRREQ_DRAM_CREDIT_STALL[29],TCC_EA_WRREQ_GMI_CREDIT_STALL[29],TCC_EA_WRREQ_IO_CREDIT_STALL[29],TCC_EA_WRREQ_LEVEL[29],TCC_EA_WRREQ_DRAM_CREDIT_STALL[30],TCC_EA_WRREQ_GMI_CREDIT_STALL[30],TCC_EA_WRREQ_IO_CREDIT_STALL[30],TCC_EA_WRREQ_LEVEL[30],TCC_EA_WRREQ_DRAM_CREDIT_STALL[31],TCC_EA_WRREQ_GMI_CREDIT_STALL[31],TCC_EA_WRREQ_IO_CREDIT_STALL[31],TCC_EA_WRREQ_LEVEL[31],wave_size_1,obj_1,TCC_ATOMIC[0],TCC_CYCLE[0],TCC_EA_ATOMIC[0],TCC_EA_ATOMIC_LEVEL[0],TCC_ATOMIC[1],TCC_CYCLE[1],TCC_EA_ATOMIC[1],TCC_EA_ATOMIC_LEVEL[1],TCC_ATOMIC[2],TCC_CYCLE[2],TCC_EA_ATOMIC[2],TCC_EA_ATOMIC_LEVEL[2],TCC_ATOMIC[3],TCC_CYCLE[3],TCC_EA_ATOMIC[3],TCC_EA_ATOMIC_LEVEL[3],TCC_ATOMIC[4],TCC_CYCLE[4],TCC_EA_ATOMIC[4],TCC_EA_ATOMIC_LEVEL[4],TCC_ATOMIC[5],TCC_CYCLE[5],TCC_EA_ATOMIC[5],TCC_EA_ATOMIC_LEVEL[5],TCC_ATOMIC[6],TCC_CYCLE[6],TCC_EA_ATOMIC[6],TCC_EA_ATOMIC_LEVEL[6],TCC_ATOMIC[7],TCC_CYCLE[7],TCC_EA_ATOMIC[7],TCC_EA_ATOMIC_LEVEL[7],TCC_ATOMIC[8],TCC_CYCLE[8],TCC_EA_ATOMIC[8],TCC_EA_ATOMIC_LEVEL[8],TCC_ATOMIC[9],TCC_CYCLE[9],TCC_EA_ATOMIC[9],TCC_EA_ATOMIC_LEVEL[9],TCC_ATOMIC[10],TCC_CYCLE[10],TCC_EA_ATOMIC[10],TCC_EA_ATOMIC_LEVEL[10],TCC_ATOMIC[11],TCC_CYCLE[11],TCC_EA_ATOMIC[11],TCC_EA_ATOMIC_LEVEL[11],TCC_ATOMIC[12],TCC_CYCLE[12],TCC_EA_ATOMIC[12],TCC_EA_ATOMIC_LEVEL[12],TCC_ATOMIC[13],TCC_CYCLE[13],TCC_EA_ATOMIC[13],TCC_EA_ATOMIC_LEVEL[13],TCC_ATOMIC[14],TCC_CYCLE[14],TCC_EA_ATOMIC[14],TCC_EA_ATOMIC_LEVEL[14],TCC_ATOMIC[15],TCC_CYCLE[15],TCC_EA_ATOMIC[15],TCC_EA_ATOMIC_LEVEL[15],TCC_ATOMIC[16],TCC_CYCLE[16],TCC_EA_ATOMIC[16],TCC_EA_ATOMIC_LEVEL[16],TCC_ATOMIC[17],TCC_CYCLE[17],TCC_EA_ATOMIC[17],TCC_EA_ATOMIC_LEVEL[17],TCC_ATOMIC[18],TCC_CYCLE[18],TCC_EA_ATOMIC[18],TCC_EA_ATOMIC_LEVEL[18],TCC_ATOMIC[19],TCC_CYCLE[19],TCC_EA_ATOMIC[19],TCC_EA_ATOMIC_LEVEL[19],TCC_ATOMIC[20],TCC_CYCLE[20],TCC_EA_ATOMIC[20],TCC_EA_ATOMIC_LEVEL[20],TCC_ATOMIC[21],TCC_CYCLE[21],TCC_EA_ATOMIC[21],TCC_EA_ATOMIC_LEVEL[21],TCC_ATOMIC[22],TCC_CYCLE[22],TCC_EA_ATOMIC[22],TCC_EA_ATOMIC_LEVEL[22],TCC_ATOMIC[23],TCC_CYCLE[23],TCC_EA_ATOMIC[23],TCC_EA_ATOMIC_LEVEL[23],TCC_ATOMIC[24],TCC_CYCLE[24],TCC_EA_ATOMIC[24],TCC_EA_ATOMIC_LEVEL[24],TCC_ATOMIC[25],TCC_CYCLE[25],TCC_EA_ATOMIC[25],TCC_EA_ATOMIC_LEVEL[25],TCC_ATOMIC[26],TCC_CYCLE[26],TCC_EA_ATOMIC[26],TCC_EA_ATOMIC_LEVEL[26],TCC_ATOMIC[27],TCC_CYCLE[27],TCC_EA_ATOMIC[27],TCC_EA_ATOMIC_LEVEL[27],TCC_ATOMIC[28],TCC_CYCLE[28],TCC_EA_ATOMIC[28],TCC_EA_ATOMIC_LEVEL[28],TCC_ATOMIC[29],TCC_CYCLE[29],TCC_EA_ATOMIC[29],TCC_EA_ATOMIC_LEVEL[29],TCC_ATOMIC[30],TCC_CYCLE[30],TCC_EA_ATOMIC[30],TCC_EA_ATOMIC_LEVEL[30],TCC_ATOMIC[31],TCC_CYCLE[31],TCC_EA_ATOMIC[31],TCC_EA_ATOMIC_LEVEL[31],wave_size_2,obj_2,SQ_INSTS_VALU_MUL_F32,SQ_INSTS_VALU_FMA_F32,SQ_INSTS_VALU_TRANS_F32,SQ_INSTS_VALU_ADD_F64,SQ_INSTS_VALU_MUL_F64,SQ_INSTS_VALU_FMA_F64,SQ_INSTS_VALU_TRANS_F64,SQ_INSTS_VALU_INT32,TCP_VOLATILE_sum,TCP_TOTAL_ACCESSES_sum,TCP_TOTAL_READ_sum,TCP_TOTAL_WRITE_sum,TA_BUFFER_ATOMIC_WAVEFRONTS_sum,TA_BUFFER_TOTAL_CYCLES_sum,TD_ATOMIC_WAVEFRONT_sum,TD_STORE_WAVEFRONT_sum,SPI_RA_REQ_NO_ALLOC,SPI_RA_REQ_NO_ALLOC_CSN,CPC_CPC_STAT_STALL,CPC_UTCL1_STALL_ON_TRANSLATION,CPF_CPF_STAT_IDLE,CPF_CPF_TCIU_IDLE,TCC_REQ_sum,TCC_STREAMING_REQ_sum,TCC_HIT_sum,TCC_MISS_sum,wave_size_3,obj_3,SQ_INSTS_VSKIPPED,SQ_INSTS,SQ_INSTS_VALU,SQ_INSTS_VALU_ADD_F16,SQ_INSTS_VALU_MUL_F16,SQ_INSTS_VALU_FMA_F16,SQ_INSTS_VALU_TRANS_F16,SQ_INSTS_VALU_ADD_F32,GRBM_SPI_BUSY,TCP_READ_TAGCONFLICT_STALL_CYCLES_sum,TCP_WRITE_TAGCONFLICT_STALL_CYCLES_sum,TCP_ATOMIC_TAGCONFLICT_STALL_CYCLES_sum,TCP_TA_TCP_STATE_READ_sum,TA_BUFFER_READ_WAVEFRONTS_sum,TA_BUFFER_WRITE_WAVEFRONTS_sum,TD_SPI_STALL_sum,TD_LOAD_WAVEFRONT_sum,SPI_CSN_NUM_THREADGROUPS,SPI_CSN_WAVE,CPC_CPC_TCIU_BUSY,CPC_CPC_TCIU_IDLE,CPF_CPF_TCIU_BUSY,CPF_CPF_TCIU_STALL,TCC_NC_REQ_sum,TCC_UC_REQ_sum,TCC_CC_REQ_sum,TCC_RW_REQ_sum,wave_size_4,obj_4,SQ_THREAD_CYCLES_VALU,SQ_IFETCH,SQ_LDS_BANK_CONFLICT,SQ_LDS_ADDR_CONFLICT,SQ_LDS_UNALIGNED_STALL,SQ_WAVES_EQ_64,SQ_WAVES_LT_64,SQ_WAVES_LT_48,TCP_TCC_WRITE_REQ_sum,TCP_TCC_ATOMIC_WITH_RET_REQ_sum,TCP_TCC_ATOMIC_WITHOUT_RET_REQ_sum,TCP_TCC_NC_READ_REQ_sum,TA_FLAT_WAVEFRONTS_sum,TA_FLAT_READ_WAVEFRONTS_sum,SPI_RA_BAR_CU_FULL_CSN,SPI_RA_TGLIM_CU_FULL_CSN,TCC_EA_RDREQ_DRAM_sum,TCC_TAG_STALL_sum,TCC_NORMAL_WRITEBACK_sum,TCC_ALL_TC_OP_WB_WRITEBACK_sum,wave_size_5,obj_5,SQ_ACTIVE_INST_SCA,SQ_ACTIVE_INST_EXP_GDS,SQ_ACTIVE_INST_MISC,SQ_ACTIVE_INST_FLAT,SQ_INST_CYCLES_VMEM_WR,SQ_INST_CYCLES_VMEM_RD,SQ_INST_CYCLES_SMEM,SQ_INST_CYCLES_SALU,TCP_TCP_LATENCY_sum,TCP_TCC_READ_REQ_LATENCY_sum,TCP_TCC_WRITE_REQ_LATENCY_sum,TCP_TCC_READ_REQ_sum,TA_ADDR_STALLED_BY_TD_CYCLES_sum,TA_DATA_STALLED_BY_TC_CYCLES_sum,SPI_RA_SGPR_SIMD_FULL_CSN,SPI_RA_LDS_CU_FULL_CSN,CPC_ME1_DC0_SPI_BUSY,TCC_EA_WRREQ_STALL_sum,TCC_EA_RDREQ_sum,TCC_EA_RDREQ_32B_sum,TCC_EA_RD_UNCACHED_32B_sum,wave_size_6,obj_6,SQC_ICACHE_MISSES_DUPLICATE,SQC_DCACHE_INPUT_VALID_READYB,SQC_DCACHE_ATOMIC,SQC_DCACHE_REQ_READ_8,SQC_DCACHE_REQ,SQC_DCACHE_HITS,SQC_DCACHE_MISSES,SQC_DCACHE_MISSES_DUPLICATE,wave_size_7,obj_7,SQC_DCACHE_REQ_READ_1,SQC_DCACHE_REQ_READ_2,SQC_DCACHE_REQ_READ_4,wave_size_8,obj_8,SQC_TC_DATA_WRITE_REQ,SQC_TC_DATA_ATOMIC_REQ,SQC_TC_STALL,SQC_TC_REQ,SQC_DCACHE_REQ_READ_16,SQC_ICACHE_REQ,SQC_ICACHE_HITS,SQC_ICACHE_MISSES,wave_size_9,obj_9,TCC_EA_RDREQ_IO_CREDIT_STALL[0],TCC_EA_RDREQ_LEVEL[0],TCC_EA_WRREQ[0],TCC_EA_WRREQ_64B[0],TCC_EA_RDREQ_IO_CREDIT_STALL[1],TCC_EA_RDREQ_LEVEL[1],TCC_EA_WRREQ[1],TCC_EA_WRREQ_64B[1],TCC_EA_RDREQ_IO_CREDIT_STALL[2],TCC_EA_RDREQ_LEVEL[2],TCC_EA_WRREQ[2],TCC_EA_WRREQ_64B[2],TCC_EA_RDREQ_IO_CREDIT_STALL[3],TCC_EA_RDREQ_LEVEL[3],TCC_EA_WRREQ[3],TCC_EA_WRREQ_64B[3],TCC_EA_RDREQ_IO_CREDIT_STALL[4],TCC_EA_RDREQ_LEVEL[4],TCC_EA_WRREQ[4],TCC_EA_WRREQ_64B[4],TCC_EA_RDREQ_IO_CREDIT_STALL[5],TCC_EA_RDREQ_LEVEL[5],TCC_EA_WRREQ[5],TCC_EA_WRREQ_64B[5],TCC_EA_RDREQ_IO_CREDIT_STALL[6],TCC_EA_RDREQ_LEVEL[6],TCC_EA_WRREQ[6],TCC_EA_WRREQ_64B[6],TCC_EA_RDREQ_IO_CREDIT_STALL[7],TCC_EA_RDREQ_LEVEL[7],TCC_EA_WRREQ[7],TCC_EA_WRREQ_64B[7],TCC_EA_RDREQ_IO_CREDIT_STALL[8],TCC_EA_RDREQ_LEVEL[8],TCC_EA_WRREQ[8],TCC_EA_WRREQ_64B[8],TCC_EA_RDREQ_IO_CREDIT_STALL[9],TCC_EA_RDREQ_LEVEL[9],TCC_EA_WRREQ[9],TCC_EA_WRREQ_64B[9],TCC_EA_RDREQ_IO_CREDIT_STALL[10],TCC_EA_RDREQ_LEVEL[10],TCC_EA_WRREQ[10],TCC_EA_WRREQ_64B[10],TCC_EA_RDREQ_IO_CREDIT_STALL[11],TCC_EA_RDREQ_LEVEL[11],TCC_EA_WRREQ[11],TCC_EA_WRREQ_64B[11],TCC_EA_RDREQ_IO_CREDIT_STALL[12],TCC_EA_RDREQ_LEVEL[12],TCC_EA_WRREQ[12],TCC_EA_WRREQ_64B[12],TCC_EA_RDREQ_IO_CREDIT_STALL[13],TCC_EA_RDREQ_LEVEL[13],TCC_EA_WRREQ[13],TCC_EA_WRREQ_64B[13],TCC_EA_RDREQ_IO_CREDIT_STALL[14],TCC_EA_RDREQ_LEVEL[14],TCC_EA_WRREQ[14],TCC_EA_WRREQ_64B[14],TCC_EA_RDREQ_IO_CREDIT_STALL[15],TCC_EA_RDREQ_LEVEL[15],TCC_EA_WRREQ[15],TCC_EA_WRREQ_64B[15],TCC_EA_RDREQ_IO_CREDIT_STALL[16],TCC_EA_RDREQ_LEVEL[16],TCC_EA_WRREQ[16],TCC_EA_WRREQ_64B[16],TCC_EA_RDREQ_IO_CREDIT_STALL[17],TCC_EA_RDREQ_LEVEL[17],TCC_EA_WRREQ[17],TCC_EA_WRREQ_64B[17],TCC_EA_RDREQ_IO_CREDIT_STALL[18],TCC_EA_RDREQ_LEVEL[18],TCC_EA_WRREQ[18],TCC_EA_WRREQ_64B[18],TCC_EA_RDREQ_IO_CREDIT_STALL[19],TCC_EA_RDREQ_LEVEL[19],TCC_EA_WRREQ[19],TCC_EA_WRREQ_64B[19],TCC_EA_RDREQ_IO_CREDIT_STALL[20],TCC_EA_RDREQ_LEVEL[20],TCC_EA_WRREQ[20],TCC_EA_WRREQ_64B[20],TCC_EA_RDREQ_IO_CREDIT_STALL[21],TCC_EA_RDREQ_LEVEL[21],TCC_EA_WRREQ[21],TCC_EA_WRREQ_64B[21],TCC_EA_RDREQ_IO_CREDIT_STALL[22],TCC_EA_RDREQ_LEVEL[22],TCC_EA_WRREQ[22],TCC_EA_WRREQ_64B[22],TCC_EA_RDREQ_IO_CREDIT_STALL[23],TCC_EA_RDREQ_LEVEL[23],TCC_EA_WRREQ[23],TCC_EA_WRREQ_64B[23],TCC_EA_RDREQ_IO_CREDIT_STALL[24],TCC_EA_RDREQ_LEVEL[24],TCC_EA_WRREQ[24],TCC_EA_WRREQ_64B[24],TCC_EA_RDREQ_IO_CREDIT_STALL[25],TCC_EA_RDREQ_LEVEL[25],TCC_EA_WRREQ[25],TCC_EA_WRREQ_64B[25],TCC_EA_RDREQ_IO_CREDIT_STALL[26],TCC_EA_RDREQ_LEVEL[26],TCC_EA_WRREQ[26],TCC_EA_WRREQ_64B[26],TCC_EA_RDREQ_IO_CREDIT_STALL[27],TCC_EA_RDREQ_LEVEL[27],TCC_EA_WRREQ[27],TCC_EA_WRREQ_64B[27],TCC_EA_RDREQ_IO_CREDIT_STALL[28],TCC_EA_RDREQ_LEVEL[28],TCC_EA_WRREQ[28],TCC_EA_WRREQ_64B[28],TCC_EA_RDREQ_IO_CREDIT_STALL[29],TCC_EA_RDREQ_LEVEL[29],TCC_EA_WRREQ[29],TCC_EA_WRREQ_64B[29],TCC_EA_RDREQ_IO_CREDIT_STALL[30],TCC_EA_RDREQ_LEVEL[30],TCC_EA_WRREQ[30],TCC_EA_WRREQ_64B[30],TCC_EA_RDREQ_IO_CREDIT_STALL[31],TCC_EA_RDREQ_LEVEL[31],TCC_EA_WRREQ[31],TCC_EA_WRREQ_64B[31],wave_size_10,obj_10,SQ_WAVE_CYCLES,SQ_WAIT_ANY,SQ_WAIT_INST_ANY,SQ_ACTIVE_INST_ANY,SQ_BUSY_CU_CYCLES,SQ_ACTIVE_INST_VMEM,SQ_ACTIVE_INST_LDS,SQ_ACTIVE_INST_VALU,TCP_UTCL1_TRANSLATION_MISS_sum,TCP_UTCL1_TRANSLATION_HIT_sum,TCP_UTCL1_PERMISSION_MISS_sum,TCP_UTCL1_REQUEST_sum,TA_ADDR_STALLED_BY_TC_CYCLES_sum,TA_TOTAL_WAVEFRONTS_sum,SPI_RA_WAVE_SIMD_FULL_CSN,SPI_RA_VGPR_SIMD_FULL_CSN,CPC_CPC_UTCL2IU_STALL,CPC_ME1_BUSY_FOR_PACKET_DECODE,TCC_EA_WRREQ_sum,TCC_EA_WRREQ_64B_sum,TCC_EA_WR_UNCACHED_32B_sum,TCC_EA_WRREQ_DRAM_sum,wave_size_11,obj_11,SQ_INSTS_VALU_INT64,SQ_INSTS_SMEM,SQ_INSTS_FLAT,SQ_INSTS_LDS,SQ_INSTS_GDS,SQ_INSTS_EXP_GDS,SQ_INSTS_BRANCH,SQ_INSTS_SENDMSG,TCP_TOTAL_ATOMIC_WITH_RET_sum,TCP_TOTAL_ATOMIC_WITHOUT_RET_sum,TCP_TOTAL_WRITEBACK_INVALIDATES_sum,TCP_TOTAL_CACHE_ACCESSES_sum,TA_BUFFER_COALESCED_READ_CYCLES_sum,TA_BUFFER_COALESCED_WRITE_CYCLES_sum,TD_COALESCABLE_WAVEFRONT_sum,SPI_RA_RES_STALL_CSN,SPI_RA_TMP_STALL_CSN,CPC_CPC_UTCL2IU_BUSY,CPC_CPC_UTCL2IU_IDLE,CPF_CMP_UTCL1_STALL_ON_TRANSLATION,TCC_READ_sum,TCC_WRITE_sum,TCC_ATOMIC_sum,TCC_WRITEBACK_sum,wave_size_12,obj_12,SQ_WAVES_LT_32,SQ_WAVES_LT_16,SQ_ITEMS,SQ_LDS_MEM_VIOLATIONS,SQ_LDS_ATOMIC_RETURN,SQ_LDS_IDX_ACTIVE,SQ_WAVES_RESTORED,SQ_WAVES_SAVED,TCP_TCC_NC_WRITE_REQ_sum,TCP_TCC_NC_ATOMIC_REQ_sum,TCP_TCC_UC_READ_REQ_sum,TCP_TCC_UC_WRITE_REQ_sum,TA_FLAT_WRITE_WAVEFRONTS_sum,TA_FLAT_ATOMIC_WAVEFRONTS_sum,SPI_RA_WVLIM_STALL_CSN,SPI_SWC_CSC_WR,TCC_NORMAL_EVICT_sum,TCC_ALL_TC_OP_INV_EVICT_sum,TCC_TOO_MANY_EA_WRREQS_STALL_sum,TCC_EA_ATOMIC_sum,wave_size_13,obj_13,TCC_HIT[0],TCC_MISS[0],TCC_READ[0],TCC_REQ[0],TCC_HIT[1],TCC_MISS[1],TCC_READ[1],TCC_REQ[1],TCC_HIT[2],TCC_MISS[2],TCC_READ[2],TCC_REQ[2],TCC_HIT[3],TCC_MISS[3],TCC_READ[3],TCC_REQ[3],TCC_HIT[4],TCC_MISS[4],TCC_READ[4],TCC_REQ[4],TCC_HIT[5],TCC_MISS[5],TCC_READ[5],TCC_REQ[5],TCC_HIT[6],TCC_MISS[6],TCC_READ[6],TCC_REQ[6],TCC_HIT[7],TCC_MISS[7],TCC_READ[7],TCC_REQ[7],TCC_HIT[8],TCC_MISS[8],TCC_READ[8],TCC_REQ[8],TCC_HIT[9],TCC_MISS[9],TCC_READ[9],TCC_REQ[9],TCC_HIT[10],TCC_MISS[10],TCC_READ[10],TCC_REQ[10],TCC_HIT[11],TCC_MISS[11],TCC_READ[11],TCC_REQ[11],TCC_HIT[12],TCC_MISS[12],TCC_READ[12],TCC_REQ[12],TCC_HIT[13],TCC_MISS[13],TCC_READ[13],TCC_REQ[13],TCC_HIT[14],TCC_MISS[14],TCC_READ[14],TCC_REQ[14],TCC_HIT[15],TCC_MISS[15],TCC_READ[15],TCC_REQ[15],TCC_HIT[16],TCC_MISS[16],TCC_READ[16],TCC_REQ[16],TCC_HIT[17],TCC_MISS[17],TCC_READ[17],TCC_REQ[17],TCC_HIT[18],TCC_MISS[18],TCC_READ[18],TCC_REQ[18],TCC_HIT[19],TCC_MISS[19],TCC_READ[19],TCC_REQ[19],TCC_HIT[20],TCC_MISS[20],TCC_READ[20],TCC_REQ[20],TCC_HIT[21],TCC_MISS[21],TCC_READ[21],TCC_REQ[21],TCC_HIT[22],TCC_MISS[22],TCC_READ[22],TCC_REQ[22],TCC_HIT[23],TCC_MISS[23],TCC_READ[23],TCC_REQ[23],TCC_HIT[24],TCC_MISS[24],TCC_READ[24],TCC_REQ[24],TCC_HIT[25],TCC_MISS[25],TCC_READ[25],TCC_REQ[25],TCC_HIT[26],TCC_MISS[26],TCC_READ[26],TCC_REQ[26],TCC_HIT[27],TCC_MISS[27],TCC_READ[27],TCC_REQ[27],TCC_HIT[28],TCC_MISS[28],TCC_READ[28],TCC_REQ[28],TCC_HIT[29],TCC_MISS[29],TCC_READ[29],TCC_REQ[29],TCC_HIT[30],TCC_MISS[30],TCC_READ[30],TCC_REQ[30],TCC_HIT[31],TCC_MISS[31],TCC_READ[31],TCC_REQ[31],wave_size_14,obj_14,TCC_RW_REQ[0],TCC_TOO_MANY_EA_WRREQS_STALL[0],TCC_WRITE[0],TCC_RW_REQ[1],TCC_TOO_MANY_EA_WRREQS_STALL[1],TCC_WRITE[1],TCC_RW_REQ[2],TCC_TOO_MANY_EA_WRREQS_STALL[2],TCC_WRITE[2],TCC_RW_REQ[3],TCC_TOO_MANY_EA_WRREQS_STALL[3],TCC_WRITE[3],TCC_RW_REQ[4],TCC_TOO_MANY_EA_WRREQS_STALL[4],TCC_WRITE[4],TCC_RW_REQ[5],TCC_TOO_MANY_EA_WRREQS_STALL[5],TCC_WRITE[5],TCC_RW_REQ[6],TCC_TOO_MANY_EA_WRREQS_STALL[6],TCC_WRITE[6],TCC_RW_REQ[7],TCC_TOO_MANY_EA_WRREQS_STALL[7],TCC_WRITE[7],TCC_RW_REQ[8],TCC_TOO_MANY_EA_WRREQS_STALL[8],TCC_WRITE[8],TCC_RW_REQ[9],TCC_TOO_MANY_EA_WRREQS_STALL[9],TCC_WRITE[9],TCC_RW_REQ[10],TCC_TOO_MANY_EA_WRREQS_STALL[10],TCC_WRITE[10],TCC_RW_REQ[11],TCC_TOO_MANY_EA_WRREQS_STALL[11],TCC_WRITE[11],TCC_RW_REQ[12],TCC_TOO_MANY_EA_WRREQS_STALL[12],TCC_WRITE[12],TCC_RW_REQ[13],TCC_TOO_MANY_EA_WRREQS_STALL[13],TCC_WRITE[13],TCC_RW_REQ[14],TCC_TOO_MANY_EA_WRREQS_STALL[14],TCC_WRITE[14],TCC_RW_REQ[15],TCC_TOO_MANY_EA_WRREQS_STALL[15],TCC_WRITE[15],TCC_RW_REQ[16],TCC_TOO_MANY_EA_WRREQS_STALL[16],TCC_WRITE[16],TCC_RW_REQ[17],TCC_TOO_MANY_EA_WRREQS_STALL[17],TCC_WRITE[17],TCC_RW_REQ[18],TCC_TOO_MANY_EA_WRREQS_STALL[18],TCC_WRITE[18],TCC_RW_REQ[19],TCC_TOO_MANY_EA_WRREQS_STALL[19],TCC_WRITE[19],TCC_RW_REQ[20],TCC_TOO_MANY_EA_WRREQS_STALL[20],TCC_WRITE[20],TCC_RW_REQ[21],TCC_TOO_MANY_EA_WRREQS_STALL[21],TCC_WRITE[21],TCC_RW_REQ[22],TCC_TOO_MANY_EA_WRREQS_STALL[22],TCC_WRITE[22],TCC_RW_REQ[23],TCC_TOO_MANY_EA_WRREQS_STALL[23],TCC_WRITE[23],TCC_RW_REQ[24],TCC_TOO_MANY_EA_WRREQS_STALL[24],TCC_WRITE[24],TCC_RW_REQ[25],TCC_TOO_MANY_EA_WRREQS_STALL[25],TCC_WRITE[25],TCC_RW_REQ[26],TCC_TOO_MANY_EA_WRREQS_STALL[26],TCC_WRITE[26],TCC_RW_REQ[27],TCC_TOO_MANY_EA_WRREQS_STALL[27],TCC_WRITE[27],TCC_RW_REQ[28],TCC_TOO_MANY_EA_WRREQS_STALL[28],TCC_WRITE[28],TCC_RW_REQ[29],TCC_TOO_MANY_EA_WRREQS_STALL[29],TCC_WRITE[29],TCC_RW_REQ[30],TCC_TOO_MANY_EA_WRREQS_STALL[30],TCC_WRITE[30],TCC_RW_REQ[31],TCC_TOO_MANY_EA_WRREQS_STALL[31],TCC_WRITE[31],wave_size_15,obj_15,TCC_EA_RDREQ[0],TCC_EA_RDREQ_32B[0],TCC_EA_RDREQ_DRAM_CREDIT_STALL[0],TCC_EA_RDREQ_GMI_CREDIT_STALL[0],TCC_EA_RDREQ[1],TCC_EA_RDREQ_32B[1],TCC_EA_RDREQ_DRAM_CREDIT_STALL[1],TCC_EA_RDREQ_GMI_CREDIT_STALL[1],TCC_EA_RDREQ[2],TCC_EA_RDREQ_32B[2],TCC_EA_RDREQ_DRAM_CREDIT_STALL[2],TCC_EA_RDREQ_GMI_CREDIT_STALL[2],TCC_EA_RDREQ[3],TCC_EA_RDREQ_32B[3],TCC_EA_RDREQ_DRAM_CREDIT_STALL[3],TCC_EA_RDREQ_GMI_CREDIT_STALL[3],TCC_EA_RDREQ[4],TCC_EA_RDREQ_32B[4],TCC_EA_RDREQ_DRAM_CREDIT_STALL[4],TCC_EA_RDREQ_GMI_CREDIT_STALL[4],TCC_EA_RDREQ[5],TCC_EA_RDREQ_32B[5],TCC_EA_RDREQ_DRAM_CREDIT_STALL[5],TCC_EA_RDREQ_GMI_CREDIT_STALL[5],TCC_EA_RDREQ[6],TCC_EA_RDREQ_32B[6],TCC_EA_RDREQ_DRAM_CREDIT_STALL[6],TCC_EA_RDREQ_GMI_CREDIT_STALL[6],TCC_EA_RDREQ[7],TCC_EA_RDREQ_32B[7],TCC_EA_RDREQ_DRAM_CREDIT_STALL[7],TCC_EA_RDREQ_GMI_CREDIT_STALL[7],TCC_EA_RDREQ[8],TCC_EA_RDREQ_32B[8],TCC_EA_RDREQ_DRAM_CREDIT_STALL[8],TCC_EA_RDREQ_GMI_CREDIT_STALL[8],TCC_EA_RDREQ[9],TCC_EA_RDREQ_32B[9],TCC_EA_RDREQ_DRAM_CREDIT_STALL[9],TCC_EA_RDREQ_GMI_CREDIT_STALL[9],TCC_EA_RDREQ[10],TCC_EA_RDREQ_32B[10],TCC_EA_RDREQ_DRAM_CREDIT_STALL[10],TCC_EA_RDREQ_GMI_CREDIT_STALL[10],TCC_EA_RDREQ[11],TCC_EA_RDREQ_32B[11],TCC_EA_RDREQ_DRAM_CREDIT_STALL[11],TCC_EA_RDREQ_GMI_CREDIT_STALL[11],TCC_EA_RDREQ[12],TCC_EA_RDREQ_32B[12],TCC_EA_RDREQ_DRAM_CREDIT_STALL[12],TCC_EA_RDREQ_GMI_CREDIT_STALL[12],TCC_EA_RDREQ[13],TCC_EA_RDREQ_32B[13],TCC_EA_RDREQ_DRAM_CREDIT_STALL[13],TCC_EA_RDREQ_GMI_CREDIT_STALL[13],TCC_EA_RDREQ[14],TCC_EA_RDREQ_32B[14],TCC_EA_RDREQ_DRAM_CREDIT_STALL[14],TCC_EA_RDREQ_GMI_CREDIT_STALL[14],TCC_EA_RDREQ[15],TCC_EA_RDREQ_32B[15],TCC_EA_RDREQ_DRAM_CREDIT_STALL[15],TCC_EA_RDREQ_GMI_CREDIT_STALL[15],TCC_EA_RDREQ[16],TCC_EA_RDREQ_32B[16],TCC_EA_RDREQ_DRAM_CREDIT_STALL[16],TCC_EA_RDREQ_GMI_CREDIT_STALL[16],TCC_EA_RDREQ[17],TCC_EA_RDREQ_32B[17],TCC_EA_RDREQ_DRAM_CREDIT_STALL[17],TCC_EA_RDREQ_GMI_CREDIT_STALL[17],TCC_EA_RDREQ[18],TCC_EA_RDREQ_32B[18],TCC_EA_RDREQ_DRAM_CREDIT_STALL[18],TCC_EA_RDREQ_GMI_CREDIT_STALL[18],TCC_EA_RDREQ[19],TCC_EA_RDREQ_32B[19],TCC_EA_RDREQ_DRAM_CREDIT_STALL[19],TCC_EA_RDREQ_GMI_CREDIT_STALL[19],TCC_EA_RDREQ[20],TCC_EA_RDREQ_32B[20],TCC_EA_RDREQ_DRAM_CREDIT_STALL[20],TCC_EA_RDREQ_GMI_CREDIT_STALL[20],TCC_EA_RDREQ[21],TCC_EA_RDREQ_32B[21],TCC_EA_RDREQ_DRAM_CREDIT_STALL[21],TCC_EA_RDREQ_GMI_CREDIT_STALL[21],TCC_EA_RDREQ[22],TCC_EA_RDREQ_32B[22],TCC_EA_RDREQ_DRAM_CREDIT_STALL[22],TCC_EA_RDREQ_GMI_CREDIT_STALL[22],TCC_EA_RDREQ[23],TCC_EA_RDREQ_32B[23],TCC_EA_RDREQ_DRAM_CREDIT_STALL[23],TCC_EA_RDREQ_GMI_CREDIT_STALL[23],TCC_EA_RDREQ[24],TCC_EA_RDREQ_32B[24],TCC_EA_RDREQ_DRAM_CREDIT_STALL[24],TCC_EA_RDREQ_GMI_CREDIT_STALL[24],TCC_EA_RDREQ[25],TCC_EA_RDREQ_32B[25],TCC_EA_RDREQ_DRAM_CREDIT_STALL[25],TCC_EA_RDREQ_GMI_CREDIT_STALL[25],TCC_EA_RDREQ[26],TCC_EA_RDREQ_32B[26],TCC_EA_RDREQ_DRAM_CREDIT_STALL[26],TCC_EA_RDREQ_GMI_CREDIT_STALL[26],TCC_EA_RDREQ[27],TCC_EA_RDREQ_32B[27],TCC_EA_RDREQ_DRAM_CREDIT_STALL[27],TCC_EA_RDREQ_GMI_CREDIT_STALL[27],TCC_EA_RDREQ[28],TCC_EA_RDREQ_32B[28],TCC_EA_RDREQ_DRAM_CREDIT_STALL[28],TCC_EA_RDREQ_GMI_CREDIT_STALL[28],TCC_EA_RDREQ[29],TCC_EA_RDREQ_32B[29],TCC_EA_RDREQ_DRAM_CREDIT_STALL[29],TCC_EA_RDREQ_GMI_CREDIT_STALL[29],TCC_EA_RDREQ[30],TCC_EA_RDREQ_32B[30],TCC_EA_RDREQ_DRAM_CREDIT_STALL[30],TCC_EA_RDREQ_GMI_CREDIT_STALL[30],TCC_EA_RDREQ[31],TCC_EA_RDREQ_32B[31],TCC_EA_RDREQ_DRAM_CREDIT_STALL[31],TCC_EA_RDREQ_GMI_CREDIT_STALL[31],wave_size_16,obj_16,SQ_INSTS_FLAT_LDS_ONLY,SQ_INSTS_VALU_MFMA_MOPS_I8,SQ_INSTS_VALU_MFMA_MOPS_F16,SQ_INSTS_VALU_MFMA_MOPS_BF16,SQ_INSTS_VALU_MFMA_MOPS_F32,SQ_INSTS_VALU_MFMA_MOPS_F64,SQC_TC_INST_REQ,SQC_TC_DATA_READ_REQ,TCP_TCC_RW_READ_REQ_sum,TCP_TCC_RW_WRITE_REQ_sum,TCP_TCC_RW_ATOMIC_REQ_sum,TCP_PENDING_STALL_CYCLES_sum,wave_size_17,obj_17,SQ_INSTS_SMEM_NORM,SQ_INSTS_MFMA,SQ_INSTS_VALU_MFMA_I8,SQ_INSTS_VALU_MFMA_F16,SQ_INSTS_VALU_MFMA_BF16,SQ_INSTS_VALU_MFMA_F32,SQ_INSTS_VALU_MFMA_F64,SQ_VALU_MFMA_BUSY_CYCLES,TCP_TCC_UC_ATOMIC_REQ_sum,TCP_TCC_CC_READ_REQ_sum,TCP_TCC_CC_WRITE_REQ_sum,TCP_TCC_CC_ATOMIC_REQ_sum,SPI_VWC_CSC_WR,SPI_RA_BULKY_CU_FULL_CSN,TCC_EA_RDREQ_LEVEL_sum,TCC_EA_WRREQ_LEVEL_sum,TCC_EA_ATOMIC_LEVEL_sum,wave_size_18,obj_18,SQ_CYCLES,SQ_BUSY_CYCLES,SQ_WAVES,SQ_INSTS_VALU_CVT,SQ_INSTS_VMEM_WR,SQ_INSTS_VMEM_RD,SQ_INSTS_VMEM,SQ_INSTS_SALU,GRBM_COUNT,GRBM_GUI_ACTIVE,TCP_GATE_EN1_sum,TCP_GATE_EN2_sum,TCP_TD_TCP_STALL_CYCLES_sum,TCP_TCR_TCP_STALL_CYCLES_sum,TA_TA_BUSY_sum,TA_BUFFER_WAVEFRONTS_sum,TD_TD_BUSY_sum,TD_TC_STALL_sum,SPI_CSN_WINDOW_VALID,SPI_CSN_BUSY,CPC_CPC_STAT_BUSY,CPC_CPC_STAT_IDLE,CPF_CPF_STAT_BUSY,CPF_CPF_STAT_STALL,TCC_CYCLE_sum,TCC_BUSY_sum,TCC_PROBE_sum,TCC_PROBE_ALL_sum,Start_Timestamp,End_Timestamp
0,"vecCopy(double*, double*, double*, int, int) ",2,1048576,256,0,0,8,0,16,64,0x7f5586690ec0,0,0,0,1009613,0,0,0,1210421,0,0,0,1020607,0,0,0,1128348,0,0,0,1121396,0,0,0,1170810,0,0,0,1190615,0,0,0,1195998,0,0,0,1053274,0,0,0,1132469,0,0,0,1065292,0,0,0,1104783,0,0,0,1104256,0,0,0,1082836,0,0,0,1096052,0,0,0,1183851,0,0,0,1013346,0,0,0,1096776,0,0,0,1033298,70,0,0,1412694,0,0,0,1104457,0,0,0,1076884,0,0,0,1190548,0,0,0,1072945,0,0,0,1042655,0,0,0,1016368,0,0,0,1028047,0,0,0,1093274,120,0,0,1290753,0,0,0,1151143,0,0,0,1073576,34,0,0,1247284,64,0x7fc8dfd14ec0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,0,27776,0,0,64,0x7f66353a4ec0,0,0,0,0,0,0,0,114688,2097152.0,2097152.0,1048576.0,1048576.0,0.0,0.0,0.0,16384.0,12048,19512,7999,545,0,26110,204779.0,0.0,73698.0,131081.0,64,0x7fd132dccec0,0,393216,163840,0,0,0,0,0,18304,0.0,0.0,0.0,32768.0,0.0,0.0,384.0,32768.0,4096,16384,352,28867,2036,0,56.0,6.0,0.0,203954.0,64,0x7f7622100ec0,10485760,65536,0,0,0,16384,0,0,131072.0,0.0,0.0,0.0,32768.0,16384.0,0,0,131081.0,34827.0,46079.0,19457.0,64,0x7fc24eab0ec0,114688,0,32768,32768,16384,16384,65536,49152,27900749.0,87525958.0,38815333.0,131072.0,0.0,195404.0,0,0,15055,483.0,131082.0,0.0,12.0,64,0x7f05f6cb4ec0,1223,115917,0,0,65536,63800,56,1680,64,0x7f7979944ec0,32768,32768,0,64,0x7f8b36f4cec0,0,0,0,224,0,65536,64208,56,64,0x7f7f8fd68ec0,0,1154934,4096,4096,0,1340147,4096,4096,0,1260032,4096,4096,0,1397661,4096,4096,0,1303303,4096,4096,0,1436622,4096,4096,0,1163591,4096,4096,0,1413520,4096,4096,0,1190092,4096,4096,0,1174336,4096,4096,0,1251898,4096,4096,0,1219411,4096,4096,0,1540832,4096,4096,0,1327608,4096,4096,0,1498472,4096,4096,0,1304506,4096,4096,0,1122818,4096,4096,0,1207949,4096,4096,0,1170089,4096,4096,0,1380481,4096,4096,0,1791325,4096,4096,0,1273765,4096,4096,0,1369542,4096,4096,0,1300406,4096,4096,0,1330419,4096,4096,0,1147903,4096,4096,0,1229230,4096,4096,0,1352574,4096,4096,0,1358736,4096,4096,0,1187941,4096,4096,0,1201096,4096,4096,0,1500028,4096,4096,64,0x7f86da894ec0,11336020,9895548,1096408,344064,1695425,0,0,163840,832.0,515136.0,0.0,524288.0,250243.0,32768.0,554799,0,0,11197,131072.0,131072.0,0.0,131072.0,64,0x7fdcd059cec0,0,65536,32768,0,0,0,16384,16384,0.0,0.0,0.0,524288.0,0.0,0.0,0.0,9888,0,814,27667,0,73331.0,131072.0,0.0,65568.0,64,0x7f77830c8ec0,0,0,1048576,0,0,0,0,0,0.0,0.0,0.0,0.0,16384.0,0.0,0,32768,65551.0,0.0,0.0,0.0,64,0x7f293e384ec0,2309,4096,2309,6405,2323,4096,2323,6419,2248,4096,2248,6344,2332,4096,2332,6428,2254,4096,2254,6350,2325,4096,2325,6421,2256,4096,2256,6352,2243,4096,2243,6339,2246,4096,2246,6342,2310,4096,2310,6406,2327,4096,2327,6423,2248,4097,2249,6345,2342,4096,2342,6438,2254,4096,2254,6350,2329,4096,2329,6425,2260,4096,2260,6356,2264,4096,2264,6360,2337,4097,2338,6434,2293,4096,2293,6389,2325,4096,2325,6421,2270,4096,2270,6366,2292,4097,2293,6389,2294,4097,2295,6391,2469,4098,2471,6567,2305,4096,2305,6401,2263,4096,2263,6359,2284,4096,2284,6380,2293,4096,2293,6389,2325,4096,2325,6421,2271,4096,2271,6367,2301,4096,2301,6397,2295,4096,2295,6391,64,0x7ffbbdbe4ec0,6350,0,4096,6378,0,4096,6365,0,4096,6427,0,4096,6320,0,4096,6342,0,4096,6360,0,4096,6388,0,4096,6390,0,4096,6351,0,4096,6379,0,4096,6365,0,4096,6425,0,4096,6321,0,4096,6346,0,4096,6362,0,4096,6374,0,4096,6406,0,4096,6347,0,4096,6372,0,4096,6379,0,4096,6411,0,4096,6358,0,4096,6505,0,4096,6342,0,4096,6377,0,4096,6408,0,4096,6349,0,4096,6376,0,4096,6381,0,4096,6412,0,4096,6364,0,4096,64,0x7ff50cc30ec0,4096,0,0,0,4096,0,106,0,4096,0,0,0,4096,0,4,0,4096,0,0,0,4096,0,0,0,4096,0,31,0,4096,0,419,0,4098,0,0,0,4096,0,0,0,4096,0,0,0,4096,0,0,0,4096,0,25,0,4097,0,54,0,4096,0,0,0,4097,0,9,0,4096,0,17,0,4096,0,0,0,4097,0,0,0,4096,0,0,0,4096,0,208,0,4096,0,15,0,4096,0,0,0,4099,0,0,0,4096,0,0,0,4096,0,0,0,4096,0,0,0,4096,0,1,0,4096,0,0,0,4096,0,0,0,4096,0,6,0,4102,0,34,0,64,0x7ffb644dcec0,0,0,0,0,0,0,168,56,131072.0,131072.0,0.0,937283.0,64,0x7f6ddd954ec0,131072,0,0,0,0,0,0,0,0.0,0.0,0.0,0.0,16384,0,39353520.0,35049108.0,0.0,64,0x7fd4bab78ec0,234688,130013,16384,0,16384,16384,32768,49152,29335,29335,1967880.0,1359889.0,3535.0,162265.0,1050686.0,0.0,1352059.0,1055289.0,232977,138138,29335,0,29335,0,938720.0,491751.0,0.0,0.0,198066321926096,198066321946896
1,"vecCopy(double*, double*, double*, int, int) ",2,1048576,256,0,0,8,0,16,64,0x7f5586690ec0,0,0,0,1879799,193,0,0,2059321,0,0,0,1667888,236,0,0,1836956,406,0,0,2153597,158,0,0,2269512,0,0,0,1611624,0,0,0,1841775,0,0,0,1781362,0,0,0,1824172,593,0,0,2533833,0,0,0,1778493,170,0,0,1581261,36,0,0,1801445,115,0,0,1983703,0,0,0,1563556,0,0,0,2020646,0,0,0,1656319,0,0,0,1383819,0,0,0,2118498,126,0,0,1970622,0,0,0,1714280,0,0,0,1777168,0,0,0,2029443,0,0,0,1740216,0,0,0,1824736,0,0,0,1804029,0,0,0,1783379,91,0,0,2382721,0,0,0,1588253,179,0,0,1963037,0,0,0,1973011,64,0x7fc8dfd14ec0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,0,40924,0,0,64,0x7f66353a4ec0,0,0,0,0,0,0,0,114688,2097152.0,2097152.0,1048576.0,1048576.0,0.0,0.0,0.0,16384.0,26333,27320,8554,550,0,34758,200168.0,0.0,69093.0,131075.0,64,0x7fd132dccec0,0,393216,163840,0,0,0,0,0,30625,0.0,0.0,0.0,32768.0,0.0,0.0,237.0,32768.0,4096,16384,302,42260,1974,0,56.0,11.0,0.0,200675.0,64,0x7f7622100ec0,10485760,65536,0,0,0,16384,0,0,131072.0,0.0,0.0,0.0,32768.0,16384.0,0,0,131084.0,110600.0,45558.0,0.0,64,0x7fc24eab0ec0,114688,0,32768,32768,16384,16384,65536,49152,57376816.0,199314100.0,45113202.0,131072.0,0.0,539568.0,0,0,25183,1990.0,131085.0,0.0,24.0,64,0x7f05f6cb4ec0,0,186876,0,0,65536,63800,56,1680,64,0x7f7979944ec0,32768,32768,0,64,0x7f8b36f4cec0,0,0,0,56,0,65536,65536,0,64,0x7f7f8fd68ec0,0,4122076,2832,2832,0,3346983,2872,2872,0,3715584,2856,2856,0,3820385,2872,2872,0,3413891,2861,2861,0,5284638,2824,2824,0,2980631,2852,2852,0,3936768,2824,2824,0,3533388,2820,2820,0,3553601,2832,2832,0,3803751,2872,2872,0,3580135,2858,2858,0,3894600,2876,2876,0,3391898,2860,2860,0,4392189,2824,2824,0,3780819,2852,2852,0,3646066,2806,2806,0,3727763,2820,2820,0,3782899,2860,2860,0,3681675,2868,2868,0,3942662,2840,2840,0,4340688,2880,2880,0,3691052,2818,2818,0,4473114,2826,2826,0,3464598,2828,2828,0,3139625,2796,2796,0,3652578,2808,2808,0,3844260,2860,2860,0,3137652,2862,2862,0,3965136,2836,2836,0,4628713,2876,2876,0,3653513,2820,2820,64,0x7f86da894ec0,20407512,18434719,1628729,344064,2941662,0,0,163840,832.0,515136.0,0.0,524288.0,569230.0,32768.0,1120885,0,0,13514,91302.0,91302.0,0.0,91302.0,64,0x7fdcd059cec0,0,65536,32768,0,0,0,16384,16384,0.0,0.0,0.0,524288.0,0.0,0.0,0.0,21290,0,3009,39056,0,69699.0,131072.0,0.0,45755.0,64,0x7f77830c8ec0,0,0,1048576,0,0,0,0,0,0.0,0.0,0.0,0.0,16384.0,0.0,0,32768,65552.0,0.0,0.0,0.0,64,0x7f293e384ec0,2162,4096,2162,6258,2157,4096,2157,6253,2177,4096,2177,6273,2193,4098,2195,6291,2169,4096,2169,6265,2165,4097,2166,6262,2171,4096,2171,6267,2174,4096,2174,6270,2175,4096,2175,6271,2162,4096,2162,6258,2160,4096,2160,6256,2178,4097,2179,6275,2199,4096,2199,6295,2169,4096,2169,6265,2172,4096,2172,6268,2170,4096,2170,6266,2173,4096,2173,6269,2257,4097,2258,6354,2179,4096,2179,6275,2165,4096,2165,6261,2160,4097,2161,6257,2163,4097,2164,6260,2164,4097,2165,6261,2202,4096,2202,6298,2210,4096,2210,6306,2174,4096,2174,6270,2206,4096,2206,6302,2182,4096,2182,6278,2170,4096,2170,6266,2162,4096,2162,6258,2164,4096,2164,6260,2164,4096,2164,6260,64,0x7ffbbdbe4ec0,6278,0,4096,6275,0,4096,6300,0,4096,6270,0,4096,6273,0,4096,6275,0,4096,6249,0,4096,6298,0,4096,6300,0,4096,6281,0,4096,6280,0,4096,6307,0,4096,6268,0,4096,6272,0,4096,6278,0,4096,6250,0,4096,6266,0,4096,6246,0,4096,6295,0,4096,6301,0,4096,6266,0,4096,6284,0,4096,6249,0,4096,6281,0,4096,6279,0,4096,6271,0,4096,6249,0,4096,6295,0,4096,6299,0,4096,6267,0,4096,6284,0,4096,6250,0,4096,64,0x7ff50cc30ec0,4098,0,371,0,4096,0,79,0,4096,0,302,0,4096,0,291,0,4096,0,84,0,4096,0,299,0,4096,0,0,0,4096,0,432,0,4097,0,69,0,4096,0,116,0,4096,0,132,0,4096,0,2,0,4096,0,820,0,4097,0,0,0,4096,0,0,0,4097,0,40,0,4096,0,225,0,4096,0,1251,0,4098,0,354,0,4096,0,11,0,4096,0,2142,0,4096,0,11,0,4096,0,95,0,4096,0,1498,0,4096,0,337,0,4096,0,1,0,4096,0,123,0,4096,0,36,0,4096,0,10,0,4096,0,178,0,4097,0,0,0,4100,0,24,0,64,0x7ffb644dcec0,0,0,0,0,0,0,0,56,131072.0,131072.0,0.0,2023963.0,64,0x7f6ddd954ec0,131072,0,0,0,0,0,0,0,0.0,0.0,0.0,0.0,16384,0,118970920.0,56874571.0,0.0,64,0x7fd4bab78ec0,333384,229274,16384,0,16384,16384,32768,49152,41672,41672,3257957.0,2523106.0,3874.0,392885.0,1701516.0,0.0,2512487.0,2206848.0,333376,238727,41672,0,41672,0,1333504.0,792321.0,0.0,0.0,198066321965776,198066321981616
2,"vecCopy(double*, double*, double*, int, int) ",2,1048576,256,0,0,8,0,16,64,0x7f5586690ec0,0,0,0,1565799,159,0,0,1851390,0,0,0,1624876,0,0,0,1989193,0,0,0,2106924,0,0,0,1738605,0,0,0,1451545,36,0,0,1846101,20,0,0,1861366,0,0,0,1433783,266,0,0,1833004,278,0,0,1864721,0,0,0,1734065,0,0,0,1821516,0,0,0,1676158,0,0,0,1689892,0,0,0,1609089,0,0,0,2202284,10,0,0,1608959,0,0,0,2076188,0,0,0,1688492,400,0,0,2376883,316,0,0,2057724,0,0,0,1812743,0,0,0,1614915,0,0,0,1692468,0,0,0,1545768,0,0,0,1586132,0,0,0,2062759,0,0,0,1757420,0,0,0,1826147,0,0,0,1878706,64,0x7fc8dfd14ec0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,0,41184,0,0,64,0x7f66353a4ec0,0,0,0,0,0,0,0,114688,2097152.0,2097152.0,1048576.0,1048576.0,0.0,0.0,0.0,16384.0,29923,27350,9629,2477,0,38229,200782.0,0.0,69699.0,131083.0,64,0x7fd132dccec0,0,393216,163840,0,0,0,0,0,31069,0.0,0.0,0.0,32768.0,0.0,0.0,245.0,32768.0,4096,16384,302,42010,1972,0,56.0,9.0,0.0,201123.0,64,0x7f7622100ec0,10485760,65536,0,0,0,16384,0,0,131072.0,0.0,0.0,0.0,32768.0,16384.0,0,0,131084.0,81947.0,45589.0,0.0,64,0x7fc24eab0ec0,114688,0,32768,32768,16384,16384,65536,49152,58830502.0,198598781.0,52503940.0,131072.0,0.0,552263.0,0,0,26334,9941.0,131084.0,0.0,22.0,64,0x7f05f6cb4ec0,0,184329,0,0,65536,63800,56,1680,64,0x7f7979944ec0,32768,32768,0,64,0x7f8b36f4cec0,0,0,0,56,0,65536,65536,0,64,0x7f7f8fd68ec0,0,2859174,2824,2824,0,5922048,2868,2868,0,4038699,2848,2848,0,3464207,2846,2846,0,2762943,2916,2916,0,2984922,2872,2872,0,3340493,2858,2858,0,3517330,2824,2824,0,3965921,2824,2824,0,2767921,2828,2828,0,3016307,2864,2864,0,3692943,2846,2846,0,3193630,2844,2844,0,2881939,2916,2916,0,2944922,2872,2872,0,3064831,2864,2864,0,3663324,2772,2772,0,3501582,2848,2848,0,3303647,2840,2840,0,4194113,2880,2880,0,3289818,2816,2816,0,3527719,2836,2836,0,3103674,2844,2844,0,3433666,2852,2852,0,3328802,2852,2852,0,3410767,2772,2772,0,4371152,2850,2850,0,3061701,2840,2840,0,3350193,2880,2880,0,3781300,2816,2816,0,2689555,2832,2832,0,4523522,2842,2842,64,0x7f86da894ec0,19813603,18446486,1023053,344064,2829785,0,0,163840,832.0,515140.0,0.0,524288.0,659654.0,32768.0,1061136,0,0,12691,91020.0,91020.0,0.0,91020.0,64,0x7fdcd059cec0,0,65536,32768,0,0,0,16384,16384,0.0,0.0,0.0,524288.0,0.0,0.0,0.0,20017,0,2658,38559,0,69309.0,131072.0,0.0,45674.0,64,0x7f77830c8ec0,0,0,1048576,0,0,0,0,0,0.0,0.0,0.0,0.0,16384.0,0.0,0,32768,65554.0,0.0,0.0,0.0,64,0x7f293e384ec0,2153,4096,2153,6249,2192,4096,2192,6288,2189,4096,2189,6285,2207,4098,2209,6305,2161,4096,2161,6257,2163,4097,2164,6260,2187,4096,2187,6283,2191,4096,2191,6287,2195,4096,2195,6291,2154,4096,2154,6250,2195,4096,2195,6291,2188,4097,2189,6285,2214,4096,2214,6310,2165,4096,2165,6261,2161,4096,2161,6257,2180,4096,2180,6276,2209,4096,2209,6305,2222,4097,2223,6319,2155,4096,2155,6251,2167,4096,2167,6263,2173,4097,2174,6270,2208,4097,2209,6305,2174,4097,2175,6271,2176,4096,2176,6272,2179,4096,2179,6275,2207,4096,2207,6303,2173,4096,2173,6269,2161,4096,2161,6257,2171,4096,2171,6267,2175,4096,2175,6271,2208,4096,2208,6304,2176,4096,2176,6272,64,0x7ffbbdbe4ec0,6259,0,4096,6256,0,4096,6230,0,4096,6257,0,4096,6256,0,4096,6268,0,4096,6240,0,4096,6258,0,4096,6258,0,4096,6259,0,4096,6264,0,4096,6229,0,4096,6255,0,4096,6259,0,4096,6267,0,4096,6247,0,4096,6233,0,4096,6240,0,4096,6272,0,4096,6274,0,4096,6236,0,4096,6266,0,4096,6255,0,4096,6254,0,4096,6253,0,4096,6235,0,4096,6242,0,4096,6272,0,4096,6274,0,4096,6236,0,4096,6261,0,4096,6257,0,4096,64,0x7ff50cc30ec0,4098,0,182,0,4096,0,566,0,4096,0,605,0,4096,0,217,0,4096,0,947,0,4096,0,546,0,4096,0,0,0,4096,0,532,0,4097,0,0,0,4096,0,149,0,4096,0,32,0,4096,0,0,0,4096,0,44,0,4097,0,1028,0,4096,0,605,0,4097,0,27,0,4096,0,238,0,4096,0,356,0,4098,0,1223,0,4096,0,804,0,4096,0,384,0,4096,0,256,0,4096,0,1958,0,4096,0,1438,0,4096,0,441,0,4096,0,21,0,4096,0,0,0,4096,0,0,0,4096,0,332,0,4096,0,194,0,4097,0,12,0,4101,0,329,0,64,0x7ffb644dcec0,0,0,0,0,0,0,0,56,131072.0,131072.0,0.0,2063337.0,64,0x7f6ddd954ec0,131072,0,0,0,0,0,0,0,0.0,0.0,0.0,0.0,16384,0,115536914.0,57383341.0,0.0,64,0x7fd4bab78ec0,328120,219675,16384,0,16384,16384,32768,49152,41014,41014,3132692.0,2417506.0,5270.0,340382.0,1662652.0,0.0,2405700.0,2096975.0,328112,228813,41014,0,41014,0,1312448.0,775461.0,0.0,0.0,198066322044816,198066322061136