Graham Sider
c845b976d0
- Reformat shaders for legibility - Move assembly processes to from IsaGen (CompileShader) to Assembler (RunAssembleBuf) Signed-off-by: Graham Sider <Graham.Sider@amd.com> Change-Id: I174f1ea5332c499440b30d9bcf06836274428a0f
260 строки
8.5 KiB
C++
260 строки
8.5 KiB
C++
/*
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* Copyright (C) 2015-2018 Advanced Micro Devices, Inc. All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "KFDCWSRTest.hpp"
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#include "Dispatch.hpp"
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/* Initial state:
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* s[0:1] - 64 bits iteration number; only the lower 32 bits are useful.
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* s[2:3] - result buffer base address
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* s4 - workgroup id
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* v0 - workitem id, always 0 because
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* NUM_THREADS_X(number of threads) in workgroup set to 1
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* Registers:
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* v0 - calculated workitem = v0 + s4 * NUM_THREADS_X, which is s4
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* v2 - = s0, 32 bits iteration number
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* v[4:5] - corresponding output buf address: s[2:3] + v0 * 4
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* v6 - counter
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*/
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static const char* IterateIsa_gfx8 = R"(
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.text
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// Copy the parameters from scalar registers to vector registers
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v_mov_b32 v2, s0 // v[2:3] = s[0:1]
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v_mov_b32 v3, s1 // v[2:3] = s[0:1]
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v_mov_b32 v0, s4 // use workgroup id as index
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v_lshlrev_b32 v0, 2, v0 // v0 *= 4
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v_add_u32 v4, vcc, s2, v0 // v[4:5] = s[2:3] + v0 * 4
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v_mov_b32 v5, s3 // v[4:5] = s[2:3] + v0 * 4
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v_add_u32 v5, vcc, v5, vcc_lo // v[4:5] = s[2:3] + v0 * 4
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v_mov_b32 v6, 0
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LOOP:
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v_add_u32 v6, vcc, 1, v6
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// Compare the result value (v6) to iteration value (v2), and
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// jump if equal (i.e. if VCC is not zero after the comparison)
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v_cmp_lt_u32 vcc, v6, v2
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s_cbranch_vccnz LOOP
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flat_store_dword v[4:5], v6
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s_waitcnt vmcnt(0) & lgkmcnt(0)
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s_endpgm
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)";
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// This shader can be used by gfx9 and gfx10
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static const char* IterateIsa_gfx9 = R"(
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.text
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// Copy the parameters from scalar registers to vector registers
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v_mov_b32 v2, s0 // v[2:3] = s[0:1]
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v_mov_b32 v3, s1 // v[2:3] = s[0:1]
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v_mov_b32 v0, s4 // use workgroup id as index
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v_lshlrev_b32 v0, 2, v0 // v0 *= 4
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v_add_co_u32 v4, vcc, s2, v0 // v[4:5] = s[2:3] + v0 * 4
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v_mov_b32 v5, s3 // v[4:5] = s[2:3] + v0 * 4
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v_add_co_u32 v5, vcc, v5, vcc_lo // v[4:5] = s[2:3] + v0 * 4
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v_mov_b32 v6, 0
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LOOP:
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v_add_co_u32 v6, vcc, 1, v6
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// Compare the result value (v6) to iteration value (v2), and
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// jump if equal (i.e. if VCC is not zero after the comparison)
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v_cmp_lt_u32 vcc, v6, v2
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s_cbranch_vccnz LOOP
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flat_store_dword v[4:5], v6
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s_waitcnt vmcnt(0) & lgkmcnt(0)
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s_endpgm
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)";
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static const char* InfiniteIsa = R"(
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.text
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LOOP:
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s_branch LOOP
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s_endpgm
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)";
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void KFDCWSRTest::SetUp() {
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ROUTINE_START
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KFDBaseComponentTest::SetUp();
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wave_number = 1;
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ROUTINE_END
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}
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void KFDCWSRTest::TearDown() {
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ROUTINE_START
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KFDBaseComponentTest::TearDown();
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ROUTINE_END
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}
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bool isOnEmulator() {
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uint32_t isEmuMode = 0;
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fscanf_dec("/sys/module/amdgpu/parameters/emu_mode", &isEmuMode);
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return isEmuMode;
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}
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static inline uint32_t checkCWSREnabled() {
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uint32_t cwsr_enable = 0;
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fscanf_dec("/sys/module/amdgpu/parameters/cwsr_enable", &cwsr_enable);
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return cwsr_enable;
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}
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/**
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* KFDCWSRTest.BasicTest
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*
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* This test dispatches the loop_inc_isa shader and lets it run, ensuring its destination pointer gets incremented.
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* It then triggers CWSR and ensures the shader stops running.
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* It then resumes the shader, ensures that it's running again and terminates it.
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*/
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TEST_F(KFDCWSRTest, BasicTest) {
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TEST_START(TESTPROFILE_RUNALL);
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int defaultGPUNode = m_NodeInfo.HsaDefaultGPUNode();
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if ((m_FamilyId >= FAMILY_VI) && (checkCWSREnabled())) {
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const char *pIterateIsa;
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HsaMemoryBuffer isaBuffer(PAGE_SIZE, defaultGPUNode, true/*zero*/, false/*local*/, true/*exec*/);
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HsaMemoryBuffer resultBuf1(PAGE_SIZE, defaultGPUNode, true, false, false);
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uint64_t count1 = 400000000;
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if (m_FamilyId < FAMILY_AI)
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pIterateIsa = IterateIsa_gfx8;
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else
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pIterateIsa = IterateIsa_gfx9;
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if (isOnEmulator()) {
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// Divide the iterator times by 10000 so that the test can
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// finish in a reasonable time.
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count1 /= 10000;
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LOG() << "On Emulators" << std::endl;
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}
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unsigned int* result1 = resultBuf1.As<unsigned int*>();
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ASSERT_SUCCESS(m_pAsm->RunAssembleBuf(pIterateIsa, isaBuffer.As<char*>()));
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PM4Queue queue1;
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ASSERT_SUCCESS(queue1.Create(defaultGPUNode));
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Dispatch *dispatch1;
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dispatch1 = new Dispatch(isaBuffer);
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dispatch1->SetArgs(reinterpret_cast<void *>(count1), result1);
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dispatch1->SetDim(wave_number, 1, 1);
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// Submit the shader, queue1
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dispatch1->Submit(queue1);
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//Give time for waves to launch before disabling queue.
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Delay(1);
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EXPECT_SUCCESS(queue1.Update(0/*percentage*/, BaseQueue::DEFAULT_PRIORITY, false));
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Delay(5);
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EXPECT_SUCCESS(queue1.Update(100/*percentage*/, BaseQueue::DEFAULT_PRIORITY, false));
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dispatch1->Sync();
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// Ensure all the waves complete as expected
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int i;
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for (i = 0 ; i < wave_number; ++i) {
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if (result1[i] != count1) {
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LOG() << "Dispatch 1, work item [" << std::dec << i << "] "
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<< result1[i] << " != " << count1 << std::endl;
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break;
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}
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}
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EXPECT_EQ(i, wave_number);
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EXPECT_SUCCESS(queue1.Destroy());
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delete dispatch1;
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} else {
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LOG() << "Skipping test: No CWSR present for family ID 0x" << m_FamilyId << "." << std::endl;
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}
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TEST_END
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}
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/**
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* KFDCWSRTest.InterruptRestore
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*
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* This test verifies that CP can preempt an HQD while it is restoring a dispatch.
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* Create queue 1.
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* Start a dispatch on queue 1 which runs indefinitely and fills all CU wave slots.
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* Create queue 2, triggering context save on queue 1.
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* Start a dispatch on queue 2 which runs indefinitely and fills all CU wave slots.
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* Create queue 3, triggering context save and restore on queues 1 and 2.
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* Preempt runlist. One or both queues must interrupt context restore to preempt.
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*/
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TEST_F(KFDCWSRTest, InterruptRestore) {
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TEST_START(TESTPROFILE_RUNALL);
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int defaultGPUNode = m_NodeInfo.HsaDefaultGPUNode();
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if ((m_FamilyId >= FAMILY_VI) && (checkCWSREnabled())) {
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HsaMemoryBuffer isaBuffer(PAGE_SIZE, defaultGPUNode, true/*zero*/, false/*local*/, true/*exec*/);
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ASSERT_SUCCESS(m_pAsm->RunAssembleBuf(InfiniteIsa, isaBuffer.As<char*>()));
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PM4Queue queue1, queue2, queue3;
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ASSERT_SUCCESS(queue1.Create(defaultGPUNode));
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Dispatch *dispatch1, *dispatch2;
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dispatch1 = new Dispatch(isaBuffer);
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dispatch2 = new Dispatch(isaBuffer);
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dispatch1->SetDim(0x10000, 1, 1);
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dispatch2->SetDim(0x10000, 1, 1);
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dispatch1->Submit(queue1);
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ASSERT_SUCCESS(queue2.Create(defaultGPUNode));
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dispatch2->Submit(queue2);
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// Give waves time to launch.
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Delay(1);
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ASSERT_SUCCESS(queue3.Create(defaultGPUNode));
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EXPECT_SUCCESS(queue1.Destroy());
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EXPECT_SUCCESS(queue2.Destroy());
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EXPECT_SUCCESS(queue3.Destroy());
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delete dispatch1;
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delete dispatch2;
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} else {
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LOG() << "Skipping test: No CWSR present for family ID 0x" << m_FamilyId << "." << std::endl;
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}
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TEST_END
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}
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