d033b0eee9
SWDEV-79445 - OCL generic changes and code clean-up - Enable WGP mode in ROCr GFX10 by default - Read GPU_ENABLE_WAVE32_MODE environment variable to control wave32/64 on ROCr Affected files ... ... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocdevice.cpp#142 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/rocm/rocsettings.cpp#46 edit
199 lines
5.5 KiB
C++
199 lines
5.5 KiB
C++
//
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// Copyright (c) 2010 Advanced Micro Devices, Inc. All rights reserved.
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//
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#ifndef WITHOUT_GPU_BACKEND
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#include "top.hpp"
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#include "os/os.hpp"
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#include "device/device.hpp"
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#include "rocsettings.hpp"
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#include "device/rocm/rocglinterop.hpp"
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namespace roc {
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Settings::Settings() {
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// Initialize the HSA device default settings
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// Set this to true when we drop the flag
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doublePrecision_ = ::CL_KHR_FP64;
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enableLocalMemory_ = HSA_LOCAL_MEMORY_ENABLE;
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enableCoarseGrainSVM_ = HSA_ENABLE_COARSE_GRAIN_SVM;
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maxWorkGroupSize_ = 1024;
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preferredWorkGroupSize_ = 256;
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maxWorkGroupSize2DX_ = 16;
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maxWorkGroupSize2DY_ = 16;
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maxWorkGroupSize3DX_ = 4;
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maxWorkGroupSize3DY_ = 4;
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maxWorkGroupSize3DZ_ = 4;
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kernargPoolSize_ = HSA_KERNARG_POOL_SIZE;
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// Determine if user is requesting Non-Coherent mode
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// for system memory. By default system memory is
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// operates or is programmed to be in Coherent mode.
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// Users can turn it off for hardware that does not
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// support this feature naturally
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char* nonCoherentMode = nullptr;
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nonCoherentMode = getenv("OPENCL_USE_NC_MEMORY_POLICY");
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enableNCMode_ = (nonCoherentMode) ? true : false;
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commandQueues_ = 200; //!< Field value set to maximum number
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//!< concurrent Virtual GPUs for ROCm backend
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// Disable image DMA by default (ROCM runtime doesn't support it)
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imageDMA_ = false;
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stagedXferRead_ = true;
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stagedXferWrite_ = true;
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stagedXferSize_ = GPU_STAGING_BUFFER_SIZE * Ki;
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// Initialize transfer buffer size to 1MB by default
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xferBufSize_ = 1024 * Ki;
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const static size_t MaxPinnedXferSize = 32;
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pinnedXferSize_ = std::min(GPU_PINNED_XFER_SIZE, MaxPinnedXferSize) * Mi;
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pinnedMinXferSize_ = std::min(GPU_PINNED_MIN_XFER_SIZE * Ki, pinnedXferSize_);
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// Don't support Denormals for single precision by default
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singleFpDenorm_ = false;
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apuSystem_ = false;
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// Device enqueuing settings
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numDeviceEvents_ = 1024;
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numWaitEvents_ = 8;
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useLightning_ = (!flagIsDefault(GPU_ENABLE_LC)) ? GPU_ENABLE_LC : true;
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lcWavefrontSize64_ = true;
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}
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bool Settings::create(bool fullProfile, int gfxipVersion) {
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customHostAllocator_ = false;
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if (fullProfile) {
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pinnedXferSize_ = 0;
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stagedXferSize_ = 0;
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xferBufSize_ = 0;
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apuSystem_ = true;
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} else {
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pinnedXferSize_ = std::max(pinnedXferSize_, pinnedMinXferSize_);
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stagedXferSize_ = std::max(stagedXferSize_, pinnedMinXferSize_ + 4 * Ki);
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}
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enableXNACK_ = apuSystem_ ? 1 : 0 ; // enable xnack for APU system
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// Enable extensions
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enableExtension(ClKhrByteAddressableStore);
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enableExtension(ClKhrGlobalInt32BaseAtomics);
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enableExtension(ClKhrGlobalInt32ExtendedAtomics);
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enableExtension(ClKhrLocalInt32BaseAtomics);
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enableExtension(ClKhrLocalInt32ExtendedAtomics);
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enableExtension(ClKhrInt64BaseAtomics);
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enableExtension(ClKhrInt64ExtendedAtomics);
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enableExtension(ClKhr3DImageWrites);
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enableExtension(ClAmdMediaOps);
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enableExtension(ClAmdMediaOps2);
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enableExtension(ClKhrImage2dFromBuffer);
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if (MesaInterop::Supported()) {
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enableExtension(ClKhrGlSharing);
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}
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// Enable platform extension
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enableExtension(ClAmdDeviceAttributeQuery);
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// Enable KHR double precision extension
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enableExtension(ClKhrFp64);
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enableExtension(ClKhrSubGroups);
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enableExtension(ClKhrDepthImages);
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enableExtension(ClAmdCopyBufferP2P);
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enableExtension(ClKhrFp16);
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supportDepthsRGB_ = true;
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if (useLightning_) {
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enableExtension(ClAmdAssemblyProgram);
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// enable subnormals for gfx900 and later
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if (gfxipVersion >= 900) {
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singleFpDenorm_ = true;
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enableCoopGroups_ = true;
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enableCoopMultiDeviceGroups_ = true;
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}
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} else {
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// Also enable AMD double precision extension?
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enableExtension(ClAmdFp64);
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}
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if (gfxipVersion >= 1000) {
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enableWave32Mode_ = true;
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enableWgpMode_ = GPU_ENABLE_WGP_MODE;
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}
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if (!flagIsDefault(GPU_ENABLE_WAVE32_MODE)) {
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enableWave32Mode_ = GPU_ENABLE_WAVE32_MODE;
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}
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lcWavefrontSize64_ = !enableWave32Mode_;
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// Override current device settings
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override();
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return true;
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}
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void Settings::override() {
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// Limit reported workgroup size
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if (GPU_MAX_WORKGROUP_SIZE != 0) {
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preferredWorkGroupSize_ = GPU_MAX_WORKGROUP_SIZE;
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}
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if (GPU_MAX_WORKGROUP_SIZE_2D_X != 0) {
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maxWorkGroupSize2DX_ = GPU_MAX_WORKGROUP_SIZE_2D_X;
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}
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if (GPU_MAX_WORKGROUP_SIZE_2D_Y != 0) {
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maxWorkGroupSize2DY_ = GPU_MAX_WORKGROUP_SIZE_2D_Y;
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}
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if (GPU_MAX_WORKGROUP_SIZE_3D_X != 0) {
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maxWorkGroupSize3DX_ = GPU_MAX_WORKGROUP_SIZE_3D_X;
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}
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if (GPU_MAX_WORKGROUP_SIZE_3D_Y != 0) {
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maxWorkGroupSize3DY_ = GPU_MAX_WORKGROUP_SIZE_3D_Y;
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}
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if (GPU_MAX_WORKGROUP_SIZE_3D_Z != 0) {
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maxWorkGroupSize3DZ_ = GPU_MAX_WORKGROUP_SIZE_3D_Z;
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}
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if (!flagIsDefault(GPU_MAX_COMMAND_QUEUES)) {
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commandQueues_ = GPU_MAX_COMMAND_QUEUES;
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}
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if (!flagIsDefault(GPU_XFER_BUFFER_SIZE)) {
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xferBufSize_ = GPU_XFER_BUFFER_SIZE * Ki;
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}
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if (!flagIsDefault(GPU_PINNED_MIN_XFER_SIZE)) {
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pinnedMinXferSize_ = std::min(GPU_PINNED_MIN_XFER_SIZE * Ki, pinnedXferSize_);
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}
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if (!flagIsDefault(AMD_GPU_FORCE_SINGLE_FP_DENORM)) {
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switch (AMD_GPU_FORCE_SINGLE_FP_DENORM) {
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case 0:
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singleFpDenorm_ = false;
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break;
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case 1:
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singleFpDenorm_ = true;
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break;
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default:
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break;
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}
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}
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if (!flagIsDefault(GPU_ENABLE_COOP_GROUPS)) {
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enableCoopGroups_ = GPU_ENABLE_COOP_GROUPS;
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enableCoopMultiDeviceGroups_ = GPU_ENABLE_COOP_GROUPS;
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}
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}
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} // namespace roc
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#endif // WITHOUT_GPU_BACKEND
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