e631b3978f75dec124f2f8d498c44d6bbb389d69
SWDEV-132899 - [OCL][GFX10] report number of WGP by default on gfx10 ASICs Both HSAIL/SC and LC compilers use WGP mode by default on gfx10 ASICs (i.e., COMPUTE_PGM_RSRC1.WGP_MODE is set to 1 by both compilers) therefore runtime should report number of WGP (i.e., CU/2) on gfx10 ASICs by default. The new environment variable (GPU_ENABLE_WGP_MODE = 0) can be used to force CU mode on LC (i.e., -mcumode option) if its needed (HSAIL/SC doesn't have any compiler option for forcing the CU mode) Also, using the new environment variable (GPU_ENABLE_WAVE32_MODE) to control the wave32 mode on gfx10+. ReviewRequestURL = http://ocltc.amd.com/reviews/r/16435/diff/ Affected files ... ... //depot/stg/opencl/drivers/opencl/runtime/device/device.hpp#329 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/devprogram.cpp#27 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/pal/paldevice.cpp#121 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/pal/palsettings.cpp#65 edit ... //depot/stg/opencl/drivers/opencl/runtime/utils/flags.hpp#301 edit
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