Ioannis Assiouras
136 righe
4.2 KiB
C++
136 righe
4.2 KiB
C++
/* Copyright (c) 2016 - 2021 Advanced Micro Devices, Inc.
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Permission is hereby granted, free of charge, to any person obtaining a copy
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of this software and associated documentation files (the "Software"), to deal
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in the Software without restriction, including without limitation the rights
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to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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copies of the Software, and to permit persons to whom the Software is
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furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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THE SOFTWARE. */
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#pragma once
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#ifndef WITHOUT_HSA_BACKEND
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#ifndef _WIN32
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#include <GL/glx.h>
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#include <EGL/egl.h>
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#else
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#include <GL/gl.h>
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#include <EGL/egl.h>
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typedef _XDisplay Display;
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typedef __GLXcontextRec* GLXContext;
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#endif
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#include "device/rocm/mesa_glinterop.h"
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#include "device/rocm/rocregisters.hpp"
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#include "hsa/hsa_ext_amd.h"
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namespace amd::roc {
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// Specific typed container for version 1
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typedef struct metadata_amd_ci_vi_s {
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uint32_t version; // Must be 1
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uint32_t vendorID; // AMD | CZ
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SQ_IMG_RSRC_WORD0 word0;
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SQ_IMG_RSRC_WORD1 word1;
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SQ_IMG_RSRC_WORD2 word2;
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SQ_IMG_RSRC_WORD3 word3;
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SQ_IMG_RSRC_WORD4 word4;
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SQ_IMG_RSRC_WORD5 word5;
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SQ_IMG_RSRC_WORD6 word6;
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SQ_IMG_RSRC_WORD7 word7;
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uint32_t mip_offsets[0]; // Mip level offset bits [39:8] for each level (if any)
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} metadata_amd_ci_vi_t;
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class image_metadata {
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private:
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metadata_amd_ci_vi_t* data;
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image_metadata(const image_metadata&) = delete;
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image_metadata& operator=(const image_metadata&) = delete;
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public:
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image_metadata() : data(nullptr) {}
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~image_metadata() { data = nullptr; }
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bool create(hsa_amd_image_descriptor_t* image_desc) {
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if ((image_desc->version != 1) || ((image_desc->deviceID >> 16) != 0x1002)) return false;
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data = reinterpret_cast<metadata_amd_ci_vi_t*>(image_desc);
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return true;
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}
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bool setMipLevel(uint32_t level) {
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if (level > data->word3.bits.last_level) return false;
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data->word3.bits.base_level = level;
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data->word3.bits.last_level = level;
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return true;
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}
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bool setFace(GLenum face, int32_t gfxipMajor) {
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int index = face - GL_TEXTURE_CUBE_MAP_POSITIVE_X;
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if (index < 0 || index > 5) {
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return false;
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}
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if (data->word3.bits.type != SQ_RSRC_IMG_CUBE) {
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return false;
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}
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data->word3.bits.type = SQ_RSRC_IMG_2D_ARRAY;
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if (gfxipMajor >= 10) {
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// The base array is moved to word4 for gfx10
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data->word4.u32_all = index << 16;
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} else {
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data->word5.bits.last_array = index;
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data->word5.bits.base_array = index;
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}
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return true;
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}
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};
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namespace MesaInterop {
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enum MESA_INTEROP_KIND { MESA_INTEROP_NONE = 0, MESA_INTEROP_GLX = 1, MESA_INTEROP_EGL = 2 };
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union DisplayHandle {
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Display* glxDisplay;
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EGLDisplay eglDisplay;
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DisplayHandle() {}
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DisplayHandle(Display* display) : glxDisplay(display) {}
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DisplayHandle(EGLDisplay display) : eglDisplay(display) {}
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};
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union ContextHandle {
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GLXContext glxContext;
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EGLContext eglContext;
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ContextHandle() {}
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ContextHandle(GLXContext context) : glxContext(context) {}
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ContextHandle(EGLContext context) : eglContext(context) {}
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};
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// True if the build supports Mesa interop.
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bool Supported();
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// Returns true if the required subsystem is supported on the GL device.
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// Must be called at least once, may be called multiple times.
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bool Init(MESA_INTEROP_KIND Kind);
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bool GetInfo(mesa_glinterop_device_info& info, MESA_INTEROP_KIND Kind, const DisplayHandle display,
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const ContextHandle context);
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bool Export(mesa_glinterop_export_in& in, mesa_glinterop_export_out& out, MESA_INTEROP_KIND Kind,
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const DisplayHandle display, const ContextHandle context);
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}
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}
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#endif /*WITHOUT_HSA_BACKEND*/
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