SWDEV-311271 - Add a key to control memory pool feature

Change-Id: Ibd929592b802e65d0e1a4fd9689050bce5059e98


[ROCm/clr commit: a02ae1b851]

projects/clr/rocclr/utils/flags.hpp

@@ -249,6 +249,8 @@ release(bool, ROC_ENABLE_PRE_VEGA, false,                                     \
         "Enable support of pre-vega ASICs in ROCm path")                      \
 release(bool, HIP_FORCE_QUEUE_PROFILING, false,                               \
         "Force command queue profiling by default")                           \
+release(bool, HIP_MEM_POOL_SUPPORT, false,                                    \
+        "Enables memory pool support in HIP")                                 \
 release(uint, PAL_FORCE_ASIC_REVISION, 0,                                     \
         "Force a specific asic revision for all devices")                     \
 release(bool, PAL_EMBED_KERNEL_MD, false,                                     \