rocr: Use view3dAs2dArray flag, for thick/3D swizzle modes.
Added HSA_IMAGE_ENABLE_3D_SWIZZLE_DEBUG environment flag to
enable/disable this. Default value is false (view3dAs2dArray = 1)
Enabling this flag will enable support for swizzles that do 3D
interleaving. Note that all features of 3D images are supported
with 2D swizzles,it's just that the access patterns are different
and therefore cache hit-rates may be better or worse, depending
on how it's used. Volumetric algorithms do better with 3D and apps
that tend to access a single slice at a time do better with 2D.
Change-Id: Id8574a6710fe4333a1ee331e5ce9195a81434198
[ROCm/ROCR-Runtime commit: 6361466baa]
This commit is contained in:
@@ -273,6 +273,9 @@ class Flag {
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else
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fprintf(stderr, "Failed to parse HSA_ASYNCEVENTS_THREAD_PRIORITY");
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}
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var = os::GetEnvVar("HSA_IMAGE_ENABLE_3D_SWIZZLE_DEBUG");
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enable_3d_swizzle_ = (var == "1") ? true : false;
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}
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void parse_masks(uint32_t maxGpu, uint32_t maxCU) {
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@@ -391,6 +394,8 @@ class Flag {
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int async_events_thread_priority() const { return async_events_thread_priority_; }
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bool enable_3d_swizzle() const { return enable_3d_swizzle_; }
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private:
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bool check_flat_scratch_;
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bool enable_vm_fault_message_;
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@@ -423,6 +428,7 @@ class Flag {
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bool dev_mem_queue_;
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uint32_t signal_abort_timeout_;
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int async_events_thread_priority_;
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bool enable_3d_swizzle_ = false;
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SDMA_OVERRIDE enable_sdma_;
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SDMA_OVERRIDE enable_peer_sdma_;
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@@ -1253,7 +1253,8 @@ void Gfx12Lib::SanityCheckSurfSize(
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// image, at least for single samples) but they still have the same number of mip levels as the
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// parent image. This disconnect produces false assertions below as the image size doesn't apparently
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// support the specified number of mip levels.
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((pIn->flags.hiZHiS == 0) || (pIn->numMipLevels == 1)))
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((pIn->flags.hiZHiS == 0) || (pIn->numMipLevels == 1)) &&
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!(pIn->flags.view3dAs2dArray))
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{
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UINT_32 lastMipSize = 1;
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UINT_32 dataChainSize = 0;
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@@ -48,6 +48,7 @@
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#include <algorithm>
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#include <climits>
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#include "core/inc/runtime.h"
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#include "inc/hsa_ext_amd.h"
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#include "core/inc/hsa_internal.h"
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#include "core/util/utils.h"
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@@ -681,9 +682,39 @@ uint32_t ImageManagerGfx12::GetAddrlibSurfaceInfoNv(
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break;
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case HSA_EXT_IMAGE_GEOMETRY_3D:
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in.resourceType = ADDR_RSRC_TEX_3D;
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break;
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{
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in.resourceType = ADDR_RSRC_TEX_3D;
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/*
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* 3D swizzle modes on GFX12 enforces alignment
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* of the number of slices to the block depth.
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* If numSlices = 3 then the 3 slices are
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* interleaved for 3D locality among the 8 slices
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* that make up each block. This causes the memory
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* footprint to jump from an ideal size of ~12 GB
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* to ~32 GB.
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* 'enable3DSwizzleMode' flag tests for env variable
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* HSA_IMAGE_ENABLE_3D_SWIZZLE_DEBUG to enable or disable
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* 3D swizzle:
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* true: Keep view3dAs2dArray = 0 for real 3D interleaving.
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* false: Use view3dAs2dArray = 1 to avoid the alignment
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* expansion.
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* 2D swizzle modes can lower size overhead but may yield
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* suboptimal cache behavior for fully 3D volumetric
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* operations.
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*/
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bool enable3DSwizzleMode = core::Runtime::runtime_singleton_->flag().enable_3d_swizzle();
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if (enable3DSwizzleMode)
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{
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in.flags.view3dAs2dArray = 0;
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}
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else
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{
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in.flags.view3dAs2dArray = 1;
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}
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break;
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}
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}
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in.flags.texture = 1;
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if (tileMode == Image::TileMode::LINEAR)
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@@ -779,6 +810,7 @@ uint32_t ImageManagerGfx12::GetAddrlibSurfaceInfoNv(
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minSize = surfaceSize;
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bestSwizzle = (Addr3SwizzleMode) i;
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} else if ((surfaceSize * ratioHigh) <= (minSize * ratioLow)) {
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minSize = surfaceSize;
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bestSwizzle = (Addr3SwizzleMode) i;
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}
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}
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