Add support for GC 11.5.0 and 11.5.1
Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Change-Id: I3c4116e78a5c1ddac2389f5fece57485bdb17f68
[ROCm/ROCR-Runtime commit: e877840197]
Этот коммит содержится в:
Lang Yu
@@ -82,7 +82,10 @@ if ( PROC_RESULT EQUAL "0" AND NOT EVAL_RESULT STREQUAL "" )
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endif()
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set (CPACK_RPM_PACKAGE_REQUIRES "rocm-core")
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set(DEFAULT_TARGETS "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810;gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx940;gfx941;gfx942;gfx1010;gfx1011;gfx1012;gfx1013;gfx1030;gfx1031;gfx1032;gfx1033;gfx1034;gfx1035;gfx1036;gfx1100;gfx1101;gfx1102;gfx1103")
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set(DEFAULT_TARGETS "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810"
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"gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx940;gfx941;gfx942"
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"gfx1010;gfx1011;gfx1012;gfx1013;gfx1030;gfx1031;gfx1032;gfx1033;gfx1034;gfx1035;gfx1036"
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"gfx1100;gfx1101;gfx1102;gfx1103;gfx1150;gfx1151")
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#
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# Currently support for Windows platform is not present
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@@ -347,6 +347,8 @@ constexpr size_t hsa_name_size = 63;
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ISAREG_ENTRY_GEN("gfx1101", 11, 0, 1, unsupported, unsupported, 32)
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ISAREG_ENTRY_GEN("gfx1102", 11, 0, 2, unsupported, unsupported, 32)
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ISAREG_ENTRY_GEN("gfx1103", 11, 0, 3, unsupported, unsupported, 32)
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ISAREG_ENTRY_GEN("gfx1150", 11, 5, 0, unsupported, unsupported, 32)
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ISAREG_ENTRY_GEN("gfx1151", 11, 5, 1, unsupported, unsupported, 32)
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#undef ISAREG_ENTRY_GEN
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return supported_isas;
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}
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+5
-1
@@ -46,10 +46,12 @@
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#define FAMILY_VGH 0x90
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#define FAMILY_GFX1100 0x91
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#define FAMILY_GFX1103 0x94
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#define FAMILY_GFX1150 0x96
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#define FAMILY_RMB 0x92
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#define FAMILY_GC_10_3_6 0x95
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#define FAMILY_GC_10_3_7 0x97
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// AMDGPU_FAMILY_IS(familyId, familyName)
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#define FAMILY_IS(f, fn) (f == FAMILY_##fn)
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#define FAMILY_IS_TN(f) FAMILY_IS(f, TN)
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@@ -65,6 +67,7 @@
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#define FAMILY_IS_RMB(f) FAMILY_IS(f, RMB)
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#define FAMILY_IS_GFX1100(f) FAMILY_IS(f, GFX1100)
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#define FAMILY_IS_GFX1103(f) FAMILY_IS(f, GFX1103)
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#define FAMILY_IS_GFX1150(f) FAMILY_IS(f, GFX1150)
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#define AMDGPU_UNKNOWN 0xFF
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@@ -117,8 +120,8 @@
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#define AMDGPU_GFX1100_RANGE 0x01, 0x10
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#define AMDGPU_GFX1101_RANGE 0x20, 0xFF
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#define AMDGPU_GFX1102_RANGE 0x10, 0x20
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#define AMDGPU_GFX1103_RANGE 0x01, 0xFF
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#define AMDGPU_GFX1150_RANGE 0x01, 0xFF
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#define AMDGPU_REMBRANDT_RANGE 0x01, 0xFF
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@@ -191,6 +194,7 @@
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#define ASICREV_IS_GFX1101(r) ASICREV_IS(r, GFX1101)
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#define ASICREV_IS_GFX1102(r) ASICREV_IS(r, GFX1102)
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#define ASICREV_IS_GFX1103(r) ASICREV_IS(r, GFX1103)
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#define ASICREV_IS_GFX1150(r) ASICREV_IS(r, GFX1150)
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#define ASICREV_IS_REMBRANDT(r) ASICREV_IS(r, REMBRANDT)
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@@ -234,6 +234,7 @@ ADDR_E_RETURNCODE Lib::Create(
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break;
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case FAMILY_GFX1100:
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case FAMILY_GFX1103:
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case FAMILY_GFX1150:
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pLib = Gfx11HwlInit(&client);
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break;
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default:
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@@ -755,6 +755,11 @@ ChipFamily Gfx11Lib::HwlConvertChipFamily(
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{
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}
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break;
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case FAMILY_GFX1150:
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if (ASICREV_IS_GFX1150(chipRevision))
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{
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}
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break;
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default:
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ADDR_ASSERT(!"Unknown chip family");
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break;
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@@ -103,6 +103,8 @@ extern uint8_t ocl_blit_object_gfx1100[];
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extern uint8_t ocl_blit_object_gfx1101[];
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extern uint8_t ocl_blit_object_gfx1102[];
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extern uint8_t ocl_blit_object_gfx1103[];
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extern uint8_t ocl_blit_object_gfx1150[];
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extern uint8_t ocl_blit_object_gfx1151[];
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// Arguments inserted by OCL compiler, all zero here.
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struct OCLHiddenArgs {
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@@ -1046,6 +1048,10 @@ hsa_status_t BlitKernel::GetPatchedBlitObject(const char* agent_name,
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*blit_code_object = ocl_blit_object_gfx1102;
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} else if (sname == "gfx1103") {
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*blit_code_object = ocl_blit_object_gfx1103;
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} else if (sname == "gfx1150") {
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*blit_code_object = ocl_blit_object_gfx1150;
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} else if (sname == "gfx1151") {
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*blit_code_object = ocl_blit_object_gfx1151;
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} else {
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return HSA_STATUS_ERROR_INVALID_ISA_NAME;
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}
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@@ -47,7 +47,10 @@ find_package(Clang REQUIRED HINTS ${CMAKE_PREFIX_PATH}/llvm PATHS /opt/rocm/llvm
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# Determine the target devices if not specified
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if (NOT DEFINED TARGET_DEVICES)
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set(TARGET_DEVICES "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810;gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx940;gfx941;gfx942;gfx1010;gfx1011;gfx1012;gfx1013;gfx1030;gfx1031;gfx1032;gfx1033;gfx1034;gfx1035;gfx1036;gfx1100;gfx1101;gfx1102;gfx1103")
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set (TARGET_DEVICES "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810"
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"gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx940;gfx941;gfx942"
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"gfx1010;gfx1011;gfx1012;gfx1013;gfx1030;gfx1031;gfx1032;gfx1033;gfx1034;gfx1035;gfx1036"
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"gfx1100;gfx1101;gfx1102;gfx1103;gfx1150;gfx1151")
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endif()
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set( TARGET_DEVICES ${TARGET_DEVICES} CACHE STRING "Build targets" FORCE )
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@@ -122,10 +122,12 @@ enum : unsigned {
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EF_AMDGPU_MACH_AMDGCN_GFX940 = 0x040,
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EF_AMDGPU_MACH_AMDGCN_GFX1100 = 0x041,
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EF_AMDGPU_MACH_AMDGCN_GFX1013 = 0x042,
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EF_AMDGPU_MACH_AMDGCN_GFX1150 = 0x043,
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EF_AMDGPU_MACH_AMDGCN_GFX1103 = 0x044,
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EF_AMDGPU_MACH_AMDGCN_GFX1036 = 0x045,
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EF_AMDGPU_MACH_AMDGCN_GFX1101 = 0x046,
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EF_AMDGPU_MACH_AMDGCN_GFX1102 = 0x047,
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EF_AMDGPU_MACH_AMDGCN_GFX1151 = 0x04a,
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EF_AMDGPU_MACH_AMDGCN_GFX941 = 0x04b,
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EF_AMDGPU_MACH_AMDGCN_GFX942 = 0x04c,
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@@ -598,6 +598,8 @@ namespace code {
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1101: MI.Name = "gfx1101"; MI.XnackSupported = false; MI.SrameccSupported = false; break;
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1102: MI.Name = "gfx1102"; MI.XnackSupported = false; MI.SrameccSupported = false; break;
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1103: MI.Name = "gfx1103"; MI.XnackSupported = false; MI.SrameccSupported = false; break;
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1150: MI.Name = "gfx1150"; MI.XnackSupported = false; MI.SrameccSupported = false; break;
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case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1151: MI.Name = "gfx1151"; MI.XnackSupported = false; MI.SrameccSupported = false; break;
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default: return false;
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}
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return true;
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