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P4 to Git Change 1448141 by smekhano@stas-nova-hsa on 2017/08/16 17:26:46

Kaynağa Gözat 
SWDEV-121551 - Complib: add missing Baffin and Ellesmere chip ids
	Reviewed by Evgeny Mankov

Affected files ...

... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/v0_8/target_mappings_amdil.h#45 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/v0_8/target_mappings_amdil64.h#41 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/v0_8/target_mappings_hsail.h#44 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/v0_8/target_mappings_hsail64.h#39 edit
Bu işleme şunda yer alıyor:
foreman
2017-08-16 17:40:09 -04:00
ebeveyn 93d2dfaa16
işleme 804fab7700
4 değiştirilmiş dosya ile 8 ekleme ve 0 silme
Yama Dosyasını İndir Diff Dosyasını İndir Tüm dosyaları genişlet Tüm dosyaları daralt
rocclr/compiler/lib/utils/v0_8/target_mappings_amdil.h
+2
Dosyayı Görüntüle
@@ -99,7 +99,9 @@ static const TargetMapping AMDILTargetMapping_0_8[] = {
{ "VI", "Fiji", "fiji", amd::GPU_Library_CI, VI_FIJI_P_A0, F_SI_BASE, true, true, FAMILY_VI },
{ "CZ", "Stoney", "stoney", amd::GPU_Library_CI, STONEY_A0, F_SI_BASE, true, true, FAMILY_CZ },
{ "VI", "Baffin", "baffin", amd::GPU_Library_CI, VI_BAFFIN_M_A0, F_SI_BASE, true, true, FAMILY_VI },
{ "VI", "Baffin", "baffin", amd::GPU_Library_CI, VI_BAFFIN_M_A1, F_SI_BASE, true, true, FAMILY_VI },
{ "VI", "Ellesmere", "ellesmere", amd::GPU_Library_CI, VI_ELLESMERE_P_A0, F_SI_BASE, true, true, FAMILY_VI },
{ "VI", "Ellesmere", "ellesmere", amd::GPU_Library_CI, VI_ELLESMERE_P_A1, F_SI_BASE, true, true, FAMILY_VI },
#ifndef BRAHMA
{ "VI", "gfx804", "gfx804", amd::GPU_Library_CI, VI_LEXA_V_A0, F_SI_BASE, true, true, FAMILY_VI },
#else
rocclr/compiler/lib/utils/v0_8/target_mappings_amdil64.h
+2
Dosyayı Görüntüle
@@ -45,7 +45,9 @@ static const TargetMapping AMDIL64TargetMapping_0_8[] = {
{ "VI", "Fiji", "fiji", amd::GPU64_Library_CI, VI_FIJI_P_A0, F_SI_64BIT_PTR, true, true, FAMILY_VI },
{ "CZ", "Stoney", "stoney", amd::GPU64_Library_CI, STONEY_A0, F_SI_64BIT_PTR, true, true, FAMILY_CZ },
{ "VI", "Baffin", "baffin", amd::GPU64_Library_CI, VI_BAFFIN_M_A0, F_SI_64BIT_PTR, true, true, FAMILY_VI },
{ "VI", "Baffin", "baffin", amd::GPU64_Library_CI, VI_BAFFIN_M_A1, F_SI_64BIT_PTR, true, true, FAMILY_VI },
{ "VI", "Ellesmere", "ellesmere", amd::GPU64_Library_CI, VI_ELLESMERE_P_A0, F_SI_64BIT_PTR, true, true, FAMILY_VI },
{ "VI", "Ellesmere", "ellesmere", amd::GPU64_Library_CI, VI_ELLESMERE_P_A1, F_SI_64BIT_PTR, true, true, FAMILY_VI },
#ifndef BRAHMA
{ "VI", "gfx804", "gfx804", amd::GPU64_Library_CI, VI_LEXA_V_A0, F_SI_64BIT_PTR, true, true, FAMILY_VI },
#else
rocclr/compiler/lib/utils/v0_8/target_mappings_hsail.h
+2
Dosyayı Görüntüle
@@ -30,7 +30,9 @@ static const TargetMapping HSAILTargetMapping_0_8[] = {
{ "VI", "Fiji", "GFX8", amd::GPU_Library_HSAIL, VI_FIJI_P_A0, F_VI_BASE, true, true, FAMILY_VI },
{ "CZ", "Stoney", "GFX8", amd::GPU_Library_HSAIL, STONEY_A0, F_VI_BASE, true, true, FAMILY_CZ },
{ "VI", "Baffin", "GFX8", amd::GPU_Library_HSAIL, VI_BAFFIN_M_A0, F_VI_BASE, true, true, FAMILY_VI },
{ "VI", "Baffin", "GFX8", amd::GPU_Library_HSAIL, VI_BAFFIN_M_A1, F_VI_BASE, true, true, FAMILY_VI },
{ "VI", "Ellesmere", "GFX8", amd::GPU_Library_HSAIL, VI_ELLESMERE_P_A0, F_VI_BASE, true, true, FAMILY_VI },
{ "VI", "Ellesmere", "GFX8", amd::GPU_Library_HSAIL, VI_ELLESMERE_P_A1, F_VI_BASE, true, true, FAMILY_VI },
#ifndef BRAHMA
{ "AI", "gfx900", "GFX9", amd::GPU_Library_HSAIL, AI_GREENLAND_P_A0, F_AI_BASE, true, true, FAMILY_AI },
{ "VI", "gfx804", "GFX8", amd::GPU_Library_HSAIL, VI_LEXA_V_A0, F_VI_BASE, true, true, FAMILY_VI },
rocclr/compiler/lib/utils/v0_8/target_mappings_hsail64.h
+2
Dosyayı Görüntüle
@@ -29,7 +29,9 @@ static const TargetMapping HSAIL64TargetMapping_0_8[] = {
{ "VI", "Fiji", "GFX8", amd::GPU_Library_HSAIL, VI_FIJI_P_A0, F_VI_BASE, true, true, FAMILY_VI },
{ "CZ", "Stoney", "GFX8", amd::GPU_Library_HSAIL, STONEY_A0, F_VI_BASE, true, true, FAMILY_CZ },
{ "VI", "Baffin", "GFX8", amd::GPU_Library_HSAIL, VI_BAFFIN_M_A0, F_VI_BASE, true, true, FAMILY_VI },
{ "VI", "Baffin", "GFX8", amd::GPU_Library_HSAIL, VI_BAFFIN_M_A1, F_VI_BASE, true, true, FAMILY_VI },
{ "VI", "Ellesmere", "GFX8", amd::GPU_Library_HSAIL, VI_ELLESMERE_P_A0, F_VI_BASE, true, true, FAMILY_VI },
{ "VI", "Ellesmere", "GFX8", amd::GPU_Library_HSAIL, VI_ELLESMERE_P_A1, F_VI_BASE, true, true, FAMILY_VI },
#ifndef BRAHMA
{ "AI", "gfx900", "GFX9", amd::GPU_Library_HSAIL, AI_GREENLAND_P_A0, F_AI_BASE, true, true, FAMILY_AI },
{ "VI", "gfx804", "GFX8", amd::GPU_Library_HSAIL, VI_LEXA_V_A0, F_VI_BASE, true, true, FAMILY_VI },