P4 to Git Change 1385569 by wchau@wchau_brahma on 2017/03/14 16:12:25
SWDEV-115692 - Remove Lexa and Polaris 22 support from Linux Pro
Affected files ...
... //depot/stg/opencl/drivers/opencl/compiler/legacy-lib/utils/v0_8/target_mappings.h#18 edit
... //depot/stg/opencl/drivers/opencl/compiler/legacy-lib/utils/v0_8/target_mappings_amdil.h#17 edit
... //depot/stg/opencl/drivers/opencl/compiler/legacy-lib/utils/v0_8/target_mappings_amdil64.h#16 edit
... //depot/stg/opencl/drivers/opencl/compiler/legacy-lib/utils/v0_8/target_mappings_hsail.h#17 edit
... //depot/stg/opencl/drivers/opencl/compiler/legacy-lib/utils/v0_8/target_mappings_hsail64.h#17 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/v0_8/target_mappings.h#50 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/v0_8/target_mappings_amdil.h#43 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/v0_8/target_mappings_amdil64.h#39 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/v0_8/target_mappings_hsail.h#42 edit
... //depot/stg/opencl/drivers/opencl/compiler/lib/utils/v0_8/target_mappings_hsail64.h#37 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpudefs.hpp#146 edit
... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpudevice.cpp#564 edit
[ROCm/clr commit: 598d635fc4]
This commit is contained in:
foreman
@@ -206,7 +206,10 @@ static const char* calTargetMapping[] = {
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"Hainan", "Hawaii",
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"Iceland", "Tonga", "Mullins", "Fiji",
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"Carrizo", "Ellesmere", "Baffin",
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"gfx900", "Stoney", "gfx804", "gfx901",
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IF(IS_BRAHMA,"","gfx900"),
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"Stoney",
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IF(IS_BRAHMA,"","gfx804"),
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IF(IS_BRAHMA,"","gfx901"),
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};
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#include "utils/v0_8/target_mappings_amdil.h"
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@@ -52,7 +52,7 @@ static const TargetMapping AMDILTargetMapping_0_8[] = {
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{ "Sumo", "Loveland", "cedar", amd::GPU_Library_Evergreen, WRESTLER_A1, F_REDWOOD, false , false, FAMILY_SUMO },
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{ "Sumo", "Loveland", "cedar", amd::GPU_Library_Evergreen, WRESTLER_B0, F_REDWOOD, false , false, FAMILY_SUMO },
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{ "Sumo", "Loveland", "cedar", amd::GPU_Library_Evergreen, WRESTLER_C0, F_REDWOOD, false , true , FAMILY_SUMO },
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{ "Sumo", "Bheem", "cedar", amd::GPU_Library_Evergreen, BHEEM_A0, F_REDWOOD, false , true , FAMILY_SUMO },
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{ "Sumo", "Bheem", "cedar", amd::GPU_Library_Evergreen, BHEEM_A0, F_REDWOOD, false , true , FAMILY_SUMO },
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{ "SI", "Tahiti", "tahiti", amd::GPU_Library_SI, SI_TAHITI_P_A11, F_SI_BASE, true ,false, FAMILY_SI },
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{ "SI", "Tahiti", "tahiti", amd::GPU_Library_SI, SI_TAHITI_P_A0, F_SI_BASE, true ,false, FAMILY_SI },
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{ "SI", "Tahiti", "tahiti", amd::GPU_Library_SI, SI_TAHITI_P_A21, F_SI_BASE, true ,false, FAMILY_SI },
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@@ -100,7 +100,11 @@ static const TargetMapping AMDILTargetMapping_0_8[] = {
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{ "CZ", "Stoney", "stoney", amd::GPU_Library_CI, STONEY_A0, F_SI_BASE, true, true, FAMILY_CZ },
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{ "VI", "Baffin", "baffin", amd::GPU_Library_CI, VI_BAFFIN_M_A0, F_SI_BASE, true, true, FAMILY_VI },
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{ "VI", "Ellesmere", "ellesmere", amd::GPU_Library_CI, VI_ELLESMERE_P_A0, F_SI_BASE, true, true, FAMILY_VI },
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#ifndef BRAHMA
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{ "VI", "gfx804", "gfx804", amd::GPU_Library_CI, VI_LEXA_V_A0, F_SI_BASE, true, true, FAMILY_VI },
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#else
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UnknownTarget,
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#endif
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InvalidTarget
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};
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@@ -46,7 +46,11 @@ static const TargetMapping AMDIL64TargetMapping_0_8[] = {
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{ "CZ", "Stoney", "stoney", amd::GPU64_Library_CI, STONEY_A0, F_SI_64BIT_PTR, true, true, FAMILY_CZ },
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{ "VI", "Baffin", "baffin", amd::GPU64_Library_CI, VI_BAFFIN_M_A0, F_SI_64BIT_PTR, true, true, FAMILY_VI },
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{ "VI", "Ellesmere", "ellesmere", amd::GPU64_Library_CI, VI_ELLESMERE_P_A0, F_SI_64BIT_PTR, true, true, FAMILY_VI },
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#ifndef BRAHMA
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{ "VI", "gfx804", "gfx804", amd::GPU64_Library_CI, VI_LEXA_V_A0, F_SI_64BIT_PTR, true, true, FAMILY_VI },
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#else
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UnknownTarget,
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#endif
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InvalidTarget
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};
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@@ -31,9 +31,15 @@ static const TargetMapping HSAILTargetMapping_0_8[] = {
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{ "CZ", "Stoney", "GFX8", amd::GPU_Library_HSAIL, STONEY_A0, F_VI_BASE, true, true, FAMILY_CZ },
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{ "VI", "Baffin", "GFX8", amd::GPU_Library_HSAIL, VI_BAFFIN_M_A0, F_VI_BASE, true, true, FAMILY_VI },
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{ "VI", "Ellesmere", "GFX8", amd::GPU_Library_HSAIL, VI_ELLESMERE_P_A0, F_VI_BASE, true, true, FAMILY_VI },
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#ifndef BRAHMA
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{ "AI", "gfx900", "GFX9", amd::GPU_Library_HSAIL, AI_GREENLAND_P_A0, F_AI_BASE, true, true, FAMILY_AI },
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{ "VI", "gfx804", "GFX8", amd::GPU_Library_HSAIL, VI_LEXA_V_A0, F_VI_BASE, true, true, FAMILY_VI },
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{ "RV", "gfx901", "GFX9", amd::GPU_Library_HSAIL, RAVEN_A0, F_AI_BASE, true, true, FAMILY_RV },
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#else
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UnknownTarget,
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UnknownTarget,
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UnknownTarget,
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#endif
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InvalidTarget
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};
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@@ -30,9 +30,15 @@ static const TargetMapping HSAIL64TargetMapping_0_8[] = {
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{ "CZ", "Stoney", "GFX8", amd::GPU_Library_HSAIL, STONEY_A0, F_VI_BASE, true, true, FAMILY_CZ },
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{ "VI", "Baffin", "GFX8", amd::GPU_Library_HSAIL, VI_BAFFIN_M_A0, F_VI_BASE, true, true, FAMILY_VI },
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{ "VI", "Ellesmere", "GFX8", amd::GPU_Library_HSAIL, VI_ELLESMERE_P_A0, F_VI_BASE, true, true, FAMILY_VI },
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#ifndef BRAHMA
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{ "AI", "gfx900", "GFX9", amd::GPU_Library_HSAIL, AI_GREENLAND_P_A0, F_AI_BASE, true, true, FAMILY_AI },
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{ "VI", "gfx804", "GFX8", amd::GPU_Library_HSAIL, VI_LEXA_V_A0, F_VI_BASE, true, true, FAMILY_VI },
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{ "RV", "gfx901", "GFX9", amd::GPU_Library_HSAIL, RAVEN_A0, F_AI_BASE, true, true, FAMILY_RV },
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#else
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UnknownTarget,
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UnknownTarget,
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UnknownTarget,
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#endif
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InvalidTarget
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};
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@@ -125,11 +125,11 @@ static const AMDDeviceInfo DeviceInfo[] = {
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/* CAL_TARGET_CARRIZO */ { ED_ATI_CAL_MACHINE_CARRIZO_ISA, "Carrizo" , "carrizo", 4, 16, 1, 256, 64 * Ki, 32, 800 },
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/* CAL_TARGET_ELLESMERE */ { ED_ATI_CAL_MACHINE_ELLESMERE_ISA, "Ellesmere", "ellesmere", 4, 16, 1, 256, 64 * Ki, 32, 800 },
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/* CAL_TARGET_BAFFIN */ { ED_ATI_CAL_MACHINE_BAFFIN_ISA, "Baffin", "baffin", 4, 16, 1, 256, 64 * Ki, 32, 800 },
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/* CAL_TARGET_GREENLAND */ { ED_ATI_CAL_MACHINE_GREENLAND_ISA, "gfx900", "gfx900", 4, 16, 1, 256, 64 * Ki, 32, 900 },
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/* CAL_TARGET_GREENLAND */ { ED_ATI_CAL_MACHINE_GREENLAND_ISA, IF(IS_BRAHMA,"","gfx900"), IF(IS_BRAHMA,"","gfx900"), 4, 16, 1, 256, 64 * Ki, 32, 900 },
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/* CAL_TARGET_STONEY */ { ED_ATI_CAL_MACHINE_STONEY_ISA, "Stoney", "stoney", 4, 16, 1, 256, 64 * Ki, 32, 800 },
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/* CAL_TARGET_LEXA */ { ED_ATI_CAL_MACHINE_LEXA_ISA, "gfx804", "gfx804", 4, 16, 1, 256, 64 * Ki, 32, 800 },
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/* CAL_TARGET_RAVEN */ { ED_ATI_CAL_MACHINE_RAVEN_ISA, "gfx901", "gfx901", 4, 16, 1, 256, 64 * Ki, 32, 900 },
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/* CAL_TARGET_POLARIS22 */ { ED_ATI_CAL_MACHINE_POLARIS22_ISA, "gfx804", "gfx804", 4, 16, 1, 256, 64 * Ki, 32, 800 },
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/* CAL_TARGET_LEXA */ { ED_ATI_CAL_MACHINE_LEXA_ISA, IF(IS_BRAHMA,"","gfx804"), IF(IS_BRAHMA,"","gfx804"), 4, 16, 1, 256, 64 * Ki, 32, 800 },
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/* CAL_TARGET_RAVEN */ { ED_ATI_CAL_MACHINE_RAVEN_ISA, IF(IS_BRAHMA,"","gfx901"), IF(IS_BRAHMA,"","gfx901"), 4, 16, 1, 256, 64 * Ki, 32, 900 },
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/* CAL_TARGET_POLARIS22 */ { ED_ATI_CAL_MACHINE_POLARIS22_ISA, IF(IS_BRAHMA,"","gfx804"), IF(IS_BRAHMA,"","gfx804"), 4, 16, 1, 256, 64 * Ki, 32, 800 },
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};
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enum gfx_handle {
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@@ -884,6 +884,15 @@ Device::create(CALuint ordinal, CALuint numOfDevices)
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return false;
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}
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#if defined(BRAHMA)
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if (calTarget_ == CAL_TARGET_GREENLAND ||
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calTarget_ == CAL_TARGET_LEXA ||
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calTarget_ == CAL_TARGET_RAVEN ||
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calTarget_ == CAL_TARGET_POLARIS22) {
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return false;
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}
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#endif
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// Creates device settings
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settings_ = new gpu::Settings();
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gpu::Settings* gpuSettings = reinterpret_cast<gpu::Settings*>(settings_);
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@@ -2086,7 +2095,7 @@ Device::allocScratch(uint regNum, const VirtualGPU* vgpu)
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// Serialize the scratch buffer allocation code
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amd::ScopedLock lk(*scratchAlloc_);
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uint sb = vgpu->hwRing();
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static const uint WaveSizeLimit = ((1 << 21) - 256);
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const uint threadSizeLimit = WaveSizeLimit / getAttribs().wavefrontSize;
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if (regNum > threadSizeLimit) {
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