AI/rocm-systems
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Update addrLib to support gfx11

فهرست منبع 
This library was taken from public MESA library:
https://gitlab.freedesktop.org/mesa/mesa/-/tree/main/src/amd/addrlib

with top commit:
2866ae32da0348caf71ad2d11c353321df626ff4

Removing macros.h as it is no longer used by addrlib

Change-Id: I0fdabfe48b74c259b4d29d81beae89604bbc141a
This commit is contained in:
David Yat Sin
2022-04-27 09:25:17 -04:00
کامیت شده توسط David Yat Sin
والد c2a60a4d5d
کامیت a742b7e830
40فایلهای تغییر یافته به همراه11317 افزوده شده و 2361 حذف شده
دانلود پرونده وصله دانلود فایل تغییرات diff Expand all files Collapse all files
runtime/hsa-runtime/CMakeLists.txt
+4 -1
مشاهده پرونده
@@ -228,6 +228,7 @@ if(${IMAGE_SUPPORT})
image/addrlib/src/r800/siaddrlib.cpp
image/addrlib/src/gfx9/gfx9addrlib.cpp
image/addrlib/src/gfx10/gfx10addrlib.cpp
image/addrlib/src/gfx11/gfx11addrlib.cpp
image/device_info.cpp
image/hsa_ext_image.cpp
image/image_runtime.cpp
@@ -255,9 +256,11 @@ if(${IMAGE_SUPPORT})
${CMAKE_CURRENT_SOURCE_DIR}/image/addrlib/src/r800
${CMAKE_CURRENT_SOURCE_DIR}/image/addrlib/src/gfx9
${CMAKE_CURRENT_SOURCE_DIR}/image/addrlib/src/gfx10
${CMAKE_CURRENT_SOURCE_DIR}/image/addrlib/src/gfx11
${CMAKE_CURRENT_SOURCE_DIR}/image/addrlib/src/chip/r800
${CMAKE_CURRENT_SOURCE_DIR}/image/addrlib/src/chip/gfx9
${CMAKE_CURRENT_SOURCE_DIR}/image/addrlib/src/chip/gfx10 )
${CMAKE_CURRENT_SOURCE_DIR}/image/addrlib/src/chip/gfx10
${CMAKE_CURRENT_SOURCE_DIR}/image/addrlib/src/chip/gfx11 )
target_sources( ${CORE_RUNTIME_TARGET} PRIVATE ${IMAGE_SRCS} )
runtime/hsa-runtime/image/addrlib/inc/addrinterface.h
+260 -39
مشاهده پرونده
@@ -1,28 +1,27 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
/**
****************************************************************************************************
@@ -33,6 +32,7 @@
#ifndef __ADDR_INTERFACE_H__
#define __ADDR_INTERFACE_H__
// Includes should be before extern "C"
#include "addrtypes.h"
namespace rocr {
@@ -174,6 +174,7 @@ typedef struct _ADDR_EQUATION
///< stacked vertically prior to swizzling
} ADDR_EQUATION;
/**
****************************************************************************************************
* @brief Alloc system memory flags.
@@ -305,8 +306,9 @@ typedef union _ADDR_CREATE_FLAGS
UINT_32 useHtileSliceAlign : 1; ///< Do htile single slice alignment
UINT_32 allowLargeThickTile : 1; ///< Allow 64*thickness*bytesPerPixel > rowSize
UINT_32 forceDccAndTcCompat : 1; ///< Force enable DCC and TC compatibility
UINT_32 nonPower2MemConfig : 1; ///< Physical video memory size is not power of 2
UINT_32 reserved : 23; ///< Reserved bits for future use
UINT_32 nonPower2MemConfig : 1; ///< Video memory bit width is not power of 2
UINT_32 enableAltTiling : 1; ///< Enable alt tile mode
UINT_32 reserved : 22; ///< Reserved bits for future use
};
UINT_32 value;
@@ -404,6 +406,8 @@ ADDR_E_RETURNCODE ADDR_API AddrCreate(
const ADDR_CREATE_INPUT* pAddrCreateIn,
ADDR_CREATE_OUTPUT* pAddrCreateOut);
/**
****************************************************************************************************
* AddrDestroy
@@ -418,6 +422,8 @@ ADDR_E_RETURNCODE ADDR_API AddrCreate(
ADDR_E_RETURNCODE ADDR_API AddrDestroy(
ADDR_HANDLE hLib);
////////////////////////////////////////////////////////////////////////////////////////////////////
// Surface functions
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -649,6 +655,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceInfo(
const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut);
/**
****************************************************************************************************
* ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
@@ -737,6 +745,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceAddrFromCoord(
const ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
ADDR_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut);
/**
****************************************************************************************************
* ADDR_COMPUTE_SURFACE_COORDFROMADDR_INPUT
@@ -918,6 +928,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeHtileInfo(
const ADDR_COMPUTE_HTILE_INFO_INPUT* pIn,
ADDR_COMPUTE_HTILE_INFO_OUTPUT* pOut);
/**
****************************************************************************************************
* ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT
@@ -980,6 +992,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeHtileAddrFromCoord(
const ADDR_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn,
ADDR_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut);
/**
****************************************************************************************************
* ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT
@@ -1040,6 +1054,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeHtileCoordFromAddr(
const ADDR_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn,
ADDR_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut);
////////////////////////////////////////////////////////////////////////////////////////////////////
// C-mask functions
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -1127,6 +1143,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskInfo(
const ADDR_COMPUTE_CMASK_INFO_INPUT* pIn,
ADDR_COMPUTE_CMASK_INFO_OUTPUT* pOut);
/**
****************************************************************************************************
* ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT
@@ -1187,6 +1205,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskAddrFromCoord(
const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn,
ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut);
/**
****************************************************************************************************
* ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT
@@ -1245,6 +1265,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskCoordFromAddr(
const ADDR_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn,
ADDR_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut);
////////////////////////////////////////////////////////////////////////////////////////////////////
// F-mask functions
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -1325,6 +1347,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskInfo(
const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn,
ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut);
/**
****************************************************************************************************
* ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT
@@ -1401,6 +1425,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskAddrFromCoord(
const ADDR_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn,
ADDR_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut);
/**
****************************************************************************************************
* ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT
@@ -1474,6 +1500,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskCoordFromAddr(
const ADDR_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn,
ADDR_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut);
////////////////////////////////////////////////////////////////////////////////////////////////////
// Element/utility functions
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -1562,6 +1590,7 @@ ADDR_E_RETURNCODE ADDR_API AddrExtractBankPipeSwizzle(
const ADDR_EXTRACT_BANKPIPE_SWIZZLE_INPUT* pIn,
ADDR_EXTRACT_BANKPIPE_SWIZZLE_OUTPUT* pOut);
/**
****************************************************************************************************
* ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT
@@ -1619,6 +1648,8 @@ ADDR_E_RETURNCODE ADDR_API AddrCombineBankPipeSwizzle(
const ADDR_COMBINE_BANKPIPE_SWIZZLE_INPUT* pIn,
ADDR_COMBINE_BANKPIPE_SWIZZLE_OUTPUT* pOut);
/**
****************************************************************************************************
* ADDR_COMPUTE_SLICESWIZZLE_INPUT
@@ -1645,6 +1676,8 @@ typedef struct _ADDR_COMPUTE_SLICESWIZZLE_INPUT
///< README: When tileIndex is not -1, this must be valid
} ADDR_COMPUTE_SLICESWIZZLE_INPUT;
/**
****************************************************************************************************
* ADDR_COMPUTE_SLICESWIZZLE_OUTPUT
@@ -1675,6 +1708,7 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeSliceSwizzle(
const ADDR_COMPUTE_SLICESWIZZLE_INPUT* pIn,
ADDR_COMPUTE_SLICESWIZZLE_OUTPUT* pOut);
/**
****************************************************************************************************
* AddrSwizzleGenOption
@@ -1765,6 +1799,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeBaseSwizzle(
const ADDR_COMPUTE_BASE_SWIZZLE_INPUT* pIn,
ADDR_COMPUTE_BASE_SWIZZLE_OUTPUT* pOut);
/**
****************************************************************************************************
* ELEM_GETEXPORTNORM_INPUT
@@ -1805,6 +1841,8 @@ BOOL_32 ADDR_API ElemGetExportNorm(
ADDR_HANDLE hLib,
const ELEM_GETEXPORTNORM_INPUT* pIn);
/**
****************************************************************************************************
* ELEM_FLT32TODEPTHPIXEL_INPUT
@@ -1860,6 +1898,8 @@ ADDR_E_RETURNCODE ADDR_API ElemFlt32ToDepthPixel(
const ELEM_FLT32TODEPTHPIXEL_INPUT* pIn,
ELEM_FLT32TODEPTHPIXEL_OUTPUT* pOut);
/**
****************************************************************************************************
* ELEM_FLT32TOCOLORPIXEL_INPUT
@@ -1986,6 +2026,8 @@ ADDR_E_RETURNCODE ADDR_API AddrConvertTileInfoToHW(
const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn,
ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut);
/**
****************************************************************************************************
* ADDR_CONVERT_TILEINDEX_INPUT
@@ -2110,6 +2152,8 @@ ADDR_E_RETURNCODE ADDR_API AddrConvertTileIndex1(
const ADDR_CONVERT_TILEINDEX1_INPUT* pIn,
ADDR_CONVERT_TILEINDEX_OUTPUT* pOut);
/**
****************************************************************************************************
* ADDR_GET_TILEINDEX_INPUT
@@ -2155,6 +2199,8 @@ ADDR_E_RETURNCODE ADDR_API AddrGetTileIndex(
const ADDR_GET_TILEINDEX_INPUT* pIn,
ADDR_GET_TILEINDEX_OUTPUT* pOut);
/**
****************************************************************************************************
* ADDR_PRT_INFO_INPUT
@@ -2199,6 +2245,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputePrtInfo(
const ADDR_PRT_INFO_INPUT* pIn,
ADDR_PRT_INFO_OUTPUT* pOut);
////////////////////////////////////////////////////////////////////////////////////////////////////
// DCC key functions
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -2259,6 +2307,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeDccInfo(
const ADDR_COMPUTE_DCCINFO_INPUT* pIn,
ADDR_COMPUTE_DCCINFO_OUTPUT* pOut);
/**
****************************************************************************************************
* ADDR_GET_MAX_ALIGNMENTS_OUTPUT
@@ -2267,7 +2317,7 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeDccInfo(
* Output structure of AddrGetMaxAlignments
****************************************************************************************************
*/
typedef struct _ADDR_GET_MAX_ALIGNMENTS_OUTPUT
typedef struct ADDR_GET_MAX_ALINGMENTS_OUTPUT
{
UINT_32 size; ///< Size of this structure in bytes
UINT_32 baseAlign; ///< Maximum base alignment in bytes
@@ -2322,6 +2372,7 @@ ADDR_E_RETURNCODE ADDR_API AddrGetMaxMetaAlignments(
*
**/
////////////////////////////////////////////////////////////////////////////////////////////////////
// Surface functions for Gfx9
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -2485,6 +2536,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceInfo(
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut);
/**
****************************************************************************************************
* ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT
@@ -2551,6 +2604,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceAddrFromCoord(
const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut);
/**
****************************************************************************************************
* ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT
@@ -2616,6 +2671,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceCoordFromAddr(
const ADDR2_COMPUTE_SURFACE_COORDFROMADDR_INPUT* pIn,
ADDR2_COMPUTE_SURFACE_COORDFROMADDR_OUTPUT* pOut);
////////////////////////////////////////////////////////////////////////////////////////////////////
// HTile functions for Gfx9
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -2664,6 +2721,7 @@ typedef struct _ADDR2_META_MIP_INFO
UINT_32 depth;
};
// GFX10
struct
{
UINT_32 offset; ///< Metadata offset within one slice,
@@ -2696,6 +2754,7 @@ typedef struct _ADDR2_COMPUTE_HTILE_INFO_INPUT
UINT_32 firstMipIdInTail; /// Id of the first mip in tail,
/// if no mip is in tail, it should be set to
/// number of mip levels
/// Only for GFX10
} ADDR2_COMPUTE_HTILE_INFO_INPUT;
/**
@@ -2722,6 +2781,10 @@ typedef struct _ADDR2_COMPUTE_HTILE_INFO_OUTPUT
UINT_32 metaBlkNumPerSlice; ///< Number of metablock within one slice
ADDR2_META_MIP_INFO* pMipInfo; ///< HTILE mip information
struct {
UINT_16* gfx10_bits; /* 72 2-byte elements */
} equation;
} ADDR2_COMPUTE_HTILE_INFO_OUTPUT;
/**
@@ -2737,6 +2800,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileInfo(
const ADDR2_COMPUTE_HTILE_INFO_INPUT* pIn,
ADDR2_COMPUTE_HTILE_INFO_OUTPUT* pOut);
/**
****************************************************************************************************
* ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT
@@ -2794,6 +2859,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileAddrFromCoord(
const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn,
ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut);
/**
****************************************************************************************************
* ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT
@@ -2852,6 +2919,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileCoordFromAddr(
const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn,
ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut);
////////////////////////////////////////////////////////////////////////////////////////////////////
// C-mask functions for Gfx9
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -2878,8 +2947,23 @@ typedef struct _ADDR2_COMPUTE_CMASKINFO_INPUT
UINT_32 numMipLevels; ///< Number of mip levels
UINT_32 firstMipIdInTail; ///< The id of first mip in tail, if no mip is in tail,
/// it should be number of mip levels
/// Only for GFX10
} ADDR2_COMPUTE_CMASK_INFO_INPUT;
/* DCC addr meta equation for GFX9. */
struct gfx9_addr_meta_equation {
UINT_8 num_bits;
struct {
struct {
UINT_8 dim; /* 0..4 as index, 5 means invalid */
UINT_8 ord; /* 0..31 */
} coord[8]; /* 0..num_coords */
} bit[32]; /* 0..num_bits */
UINT_8 numPipeBits;
};
/**
****************************************************************************************************
* ADDR2_COMPUTE_CMASK_INFO_OUTPUT
@@ -2906,6 +2990,21 @@ typedef struct _ADDR2_COMPUTE_CMASK_INFO_OUTPUT
UINT_32 metaBlkNumPerSlice; ///< Number of metablock within one slice
ADDR2_META_MIP_INFO* pMipInfo; ///< CMASK mip information
/* The equation for doing CMASK address computations in shaders. */
union {
/* This is chip-specific, and it varies with:
* - resource type
* - swizzle_mode
* - bpp
* - pipe_aligned
* - rb_aligned
*/
struct gfx9_addr_meta_equation gfx9;
/* This is chip-specific, it requires 64KB_Z_X. */
UINT_16 *gfx10_bits; /* 68 2-byte elements */
} equation;
} ADDR2_COMPUTE_CMASK_INFO_OUTPUT;
/**
@@ -2922,6 +3021,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskInfo(
const ADDR2_COMPUTE_CMASK_INFO_INPUT* pIn,
ADDR2_COMPUTE_CMASK_INFO_OUTPUT* pOut);
/**
****************************************************************************************************
* ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT
@@ -2983,6 +3084,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskAddrFromCoord(
const ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn,
ADDR2_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut);
/**
****************************************************************************************************
* ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT
@@ -3041,6 +3144,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskCoordFromAddr(
const ADDR2_COMPUTE_CMASK_COORDFROMADDR_INPUT* pIn,
ADDR2_COMPUTE_CMASK_COORDFROMADDR_OUTPUT* pOut);
////////////////////////////////////////////////////////////////////////////////////////////////////
// F-mask functions for Gfx9
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -3123,6 +3228,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskInfo(
const ADDR2_COMPUTE_FMASK_INFO_INPUT* pIn,
ADDR2_COMPUTE_FMASK_INFO_OUTPUT* pOut);
/**
****************************************************************************************************
* ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT
@@ -3182,6 +3289,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskAddrFromCoord(
const ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_INPUT* pIn,
ADDR2_COMPUTE_FMASK_ADDRFROMCOORD_OUTPUT* pOut);
/**
****************************************************************************************************
* ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT
@@ -3240,6 +3349,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskCoordFromAddr(
const ADDR2_COMPUTE_FMASK_COORDFROMADDR_INPUT* pIn,
ADDR2_COMPUTE_FMASK_COORDFROMADDR_OUTPUT* pOut);
////////////////////////////////////////////////////////////////////////////////////////////////////
// DCC key functions for Gfx9
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -3270,6 +3381,7 @@ typedef struct _ADDR2_COMPUTE_DCCINFO_INPUT
///< useful in meta linear case
UINT_32 firstMipIdInTail; ///< The id of first mip in tail, if no mip is in tail,
/// it should be number of mip levels
/// Only for GFX10
} ADDR2_COMPUTE_DCCINFO_INPUT;
/**
@@ -3298,7 +3410,7 @@ typedef struct _ADDR2_COMPUTE_DCCINFO_OUTPUT
UINT_32 metaBlkWidth; ///< DCC meta block width
UINT_32 metaBlkHeight; ///< DCC meta block height
UINT_32 metaBlkDepth; ///< DCC meta block depth
UINT_32 metaBlkSize; ///< DCC meta block size in bytes
UINT_32 metaBlkNumPerSlice; ///< Number of metablock within one slice
union
@@ -3307,9 +3419,29 @@ typedef struct _ADDR2_COMPUTE_DCCINFO_OUTPUT
UINT_32 dccRamSliceSize; ///< DCC ram size per slice. For mipmap, it's
/// the slize size of a mip chain, the thickness of a
/// a slice is meta block depth
/// Only for GFX10
};
ADDR2_META_MIP_INFO* pMipInfo; ///< DCC mip information
/* The equation for doing DCC address computations in shaders. */
union {
/* This is chip-specific, and it varies with:
* - resource type
* - swizzle_mode
* - bpp
* - number of fragments
* - pipe_aligned
* - rb_aligned
*/
struct gfx9_addr_meta_equation gfx9;
/* This is chip-specific, it requires 64KB_R_X, and it varies with:
* - bpp
* - pipe_aligned
*/
UINT_16 *gfx10_bits; /* 68 2-byte elements */
} equation;
} ADDR2_COMPUTE_DCCINFO_OUTPUT;
/**
@@ -3326,6 +3458,7 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeDccInfo(
const ADDR2_COMPUTE_DCCINFO_INPUT* pIn,
ADDR2_COMPUTE_DCCINFO_OUTPUT* pOut);
/**
****************************************************************************************************
* ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT
@@ -3346,9 +3479,12 @@ typedef struct _ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT
UINT_32 mipId; ///< mipmap level id
ADDR2_META_FLAGS dccKeyFlags; ///< DCC flags
ADDR2_SURFACE_FLAGS colorFlags; ///< Color surface flags
AddrResourceType resourceType; ///< Color surface type
AddrSwizzleMode swizzleMode; ///< Color surface swizzle mode
UINT_32 bpp; ///< Color surface bits per pixel
UINT_32 unalignedWidth; ///< Color surface original width (of mip0)
UINT_32 unalignedHeight; ///< Color surface original height (of mip0)
UINT_32 numSlices; ///< Color surface original slices (of mip0)
UINT_32 numMipLevels; ///< Color surface mipmap levels
UINT_32 numFrags; ///< Color surface fragment number
@@ -3459,6 +3595,7 @@ typedef struct _ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT
UINT_32 size; ///< Size of this structure in bytes
AddrSwizzleMode swizzleMode; ///< Surface swizzle mode
AddrResourceType resourceType; ///< Surface resource type
UINT_32 bpe; ///< bits per element (e.g. block size for BCn format)
UINT_32 basePipeBankXor; ///< Base pipe bank xor
UINT_32 slice; ///< Slice id
UINT_32 numSamples; ///< Number of samples
@@ -3538,6 +3675,62 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeSubResourceOffsetForSwizzlePattern(
const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn,
ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT* pOut);
/**
****************************************************************************************************
* ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT
*
* @brief
* Input structure of Addr2ComputeNonBlockCompressedView
****************************************************************************************************
*/
typedef struct _ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT
{
UINT_32 size; ///< Size of this structure in bytes
ADDR2_SURFACE_FLAGS flags; ///< Surface flags
AddrSwizzleMode swizzleMode; ///< Swizzle Mode for Gfx9
AddrResourceType resourceType; ///< Surface type
AddrFormat format; ///< Surface format
UINT_32 width; ///< Width of mip0 in texels (not in compressed block)
UINT_32 height; ///< Height of mip0 in texels (not in compressed block)
UINT_32 numSlices; ///< Number surface slice/depth of mip0
UINT_32 numMipLevels; ///< Total mipmap levels.
UINT_32 pipeBankXor; ///< Combined swizzle used to do bank/pipe rotation
UINT_32 slice; ///< Index of slice to view
UINT_32 mipId; ///< Id of mip to view
} ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT;
/**
****************************************************************************************************
* ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT
*
* @brief
* Output structure of Addr2ComputeNonBlockCompressedView
****************************************************************************************************
*/
typedef struct _ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT
{
UINT_32 size; ///< Size of this structure in bytes
UINT_64 offset; ///< Offset shifted from resource base for the view
UINT_32 pipeBankXor; ///< Pipe bank xor for the view
UINT_32 unalignedWidth; ///< Mip0 width (in element) for the view
UINT_32 unalignedHeight; ///< Mip0 height (in element) for the view
UINT_32 numMipLevels; ///< Total mipmap levels for the view
UINT_32 mipId; ///< Mip ID for the view
} ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT;
/**
****************************************************************************************************
* Addr2ComputeNonBlockCompressedView
*
* @brief
* Compute non-block-compressed view for a given mipmap level/slice
****************************************************************************************************
*/
ADDR_E_RETURNCODE ADDR_API Addr2ComputeNonBlockCompressedView(
ADDR_HANDLE hLib,
const ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT* pIn,
ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT* pOut);
/**
****************************************************************************************************
* ADDR2_BLOCK_SET
@@ -3556,10 +3749,19 @@ typedef union _ADDR2_BLOCK_SET
UINT_32 macroThin64KB : 1; // Thin 64KB for 2D/3D resource
UINT_32 macroThick64KB : 1; // Thick 64KB for 3D resource
UINT_32 var : 1; // VAR block
UINT_32 : 1;
UINT_32 linear : 1; // Linear block
UINT_32 reserved : 25;
UINT_32 reserved : 24;
};
struct
{
UINT_32 : 5;
UINT_32 thin256KB : 1; // Thin 256KB block
UINT_32 thick256KB : 1; // Thick 256KB block
UINT_32 : 25;
} gfx11;
UINT_32 value;
} ADDR2_BLOCK_SET;
@@ -3609,10 +3811,10 @@ typedef union _ADDR2_SWMODE_SET
UINT_32 sw64KB_S : 1;
UINT_32 sw64KB_D : 1;
UINT_32 sw64KB_R : 1;
UINT_32 swReserved0 : 1;
UINT_32 swReserved1 : 1;
UINT_32 swReserved2 : 1;
UINT_32 swReserved3 : 1;
UINT_32 swMiscDef12 : 1;
UINT_32 swMiscDef13 : 1;
UINT_32 swMiscDef14 : 1;
UINT_32 swMiscDef15 : 1;
UINT_32 sw64KB_Z_T : 1;
UINT_32 sw64KB_S_T : 1;
UINT_32 sw64KB_D_T : 1;
@@ -3625,12 +3827,29 @@ typedef union _ADDR2_SWMODE_SET
UINT_32 sw64KB_S_X : 1;
UINT_32 sw64KB_D_X : 1;
UINT_32 sw64KB_R_X : 1;
UINT_32 swVar_Z_X : 1;
UINT_32 swReserved4 : 1;
UINT_32 swReserved5 : 1;
UINT_32 swVar_R_X : 1;
UINT_32 swMiscDef28 : 1;
UINT_32 swMiscDef29 : 1;
UINT_32 swMiscDef30 : 1;
UINT_32 swMiscDef31 : 1;
};
struct
{
UINT_32 : 28;
UINT_32 swVar_Z_X : 1;
UINT_32 : 2;
UINT_32 swVar_R_X : 1;
} gfx10;
struct
{
UINT_32 : 28;
UINT_32 sw256KB_Z_X : 1;
UINT_32 sw256KB_S_X : 1;
UINT_32 sw256KB_D_X : 1;
UINT_32 sw256KB_R_X : 1;
} gfx11;
UINT_32 value;
} ADDR2_SWMODE_SET;
@@ -3666,6 +3885,8 @@ typedef struct _ADDR2_GET_PREFERRED_SURF_SETTING_INPUT
UINT_32 maxAlign; ///< maximum base/size alignment requested by client
UINT_32 minSizeAlign; ///< memory allocated for surface in client driver will
/// be padded to multiple of this value (in bytes)
DOUBLE memoryBudget; ///< Memory consumption ratio based on minimum possible
/// size.
} ADDR2_GET_PREFERRED_SURF_SETTING_INPUT;
/**
@@ -3708,14 +3929,14 @@ ADDR_E_RETURNCODE ADDR_API Addr2GetPreferredSurfaceSetting(
* Addr2IsValidDisplaySwizzleMode
*
* @brief
* Return whether the swizzle mode is supported by DCE / DCN.
* Return whether the swizzle mode is supported by display engine
****************************************************************************************************
*/
ADDR_E_RETURNCODE ADDR_API Addr2IsValidDisplaySwizzleMode(
ADDR_HANDLE hLib,
AddrSwizzleMode swizzleMode,
UINT_32 bpp,
bool *result);
BOOL_32 *pResult);
} // rocr
runtime/hsa-runtime/image/addrlib/inc/addrtypes.h
+72 -45
مشاهده پرونده
@@ -1,28 +1,27 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
/**
****************************************************************************************************
@@ -49,6 +48,10 @@ typedef void VOID;
typedef float FLOAT;
#endif
#if !defined(DOUBLE)
typedef double DOUBLE;
#endif
#if !defined(CHAR)
typedef char CHAR;
#endif
@@ -68,7 +71,11 @@ typedef int INT;
*/
#ifndef ADDR_CDECL
#if defined(__GNUC__)
#define ADDR_CDECL __attribute__((cdecl))
#if defined(__i386__)
#define ADDR_CDECL __attribute__((cdecl))
#else
#define ADDR_CDECL
#endif
#else
#define ADDR_CDECL __cdecl
#endif
@@ -76,10 +83,10 @@ typedef int INT;
#ifndef ADDR_STDCALL
#if defined(__GNUC__)
#if defined(__amd64__) || defined(__x86_64__)
#define ADDR_STDCALL
#else
#if defined(__i386__)
#define ADDR_STDCALL __attribute__((stdcall))
#else
#define ADDR_STDCALL
#endif
#else
#define ADDR_STDCALL __stdcall
@@ -88,7 +95,11 @@ typedef int INT;
#ifndef ADDR_FASTCALL
#if defined(__GNUC__)
#define ADDR_FASTCALL __attribute__((regparm(0)))
#if defined(__i386__) || defined(__amd64__) || defined(__x86_64__)
#define ADDR_FASTCALL __attribute__((regparm(0)))
#else
#define ADDR_FASTCALL
#endif
#else
#define ADDR_FASTCALL __fastcall
#endif
@@ -106,6 +117,7 @@ typedef int INT;
#define GC_FASTCALL ADDR_FASTCALL
#endif
#if defined(__GNUC__)
#define ADDR_INLINE static inline // inline needs to be static to link
#else
@@ -113,11 +125,7 @@ typedef int INT;
#define ADDR_INLINE __inline
#endif // #if defined(__GNUC__)
#if defined(__amd64__) || defined(__x86_64__) || defined(__i386__)
#define ADDR_API ADDR_FASTCALL // default call convention is fast call
#else
#define ADDR_API
#endif
#define ADDR_API ADDR_FASTCALL //default call convention is fast call
/**
****************************************************************************************************
@@ -205,9 +213,10 @@ typedef enum _AddrTileMode
* @note
*
* ADDR_SW_LINEAR linear aligned addressing mode, for 1D/2D/3D resource
* ADDR_SW_256B_* addressing block aligned size is 256B, for 2D/3D resource
* ADDR_SW_256B_* addressing block aligned size is 256B, for 2D resource
* ADDR_SW_4KB_* addressing block aligned size is 4KB, for 2D/3D resource
* ADDR_SW_64KB_* addressing block aligned size is 64KB, for 2D/3D resource
* ADDR_SW_64KB_* addressing block aligned size is 64KB, for 1D/2D/3D resource
* ADDR_SW_VAR_* addressing block aligned size is ASIC specific
*
* ADDR_SW_*_Z For GFX9:
- for 2D resource, represents Z-order swizzle mode for depth/stencil/FMask
@@ -244,10 +253,10 @@ typedef enum _AddrSwizzleMode
ADDR_SW_64KB_S = 9,
ADDR_SW_64KB_D = 10,
ADDR_SW_64KB_R = 11,
ADDR_SW_RESERVED0 = 12,
ADDR_SW_RESERVED1 = 13,
ADDR_SW_RESERVED2 = 14,
ADDR_SW_RESERVED3 = 15,
ADDR_SW_MISCDEF12 = 12,
ADDR_SW_MISCDEF13 = 13,
ADDR_SW_MISCDEF14 = 14,
ADDR_SW_MISCDEF15 = 15,
ADDR_SW_64KB_Z_T = 16,
ADDR_SW_64KB_S_T = 17,
ADDR_SW_64KB_D_T = 18,
@@ -260,12 +269,27 @@ typedef enum _AddrSwizzleMode
ADDR_SW_64KB_S_X = 25,
ADDR_SW_64KB_D_X = 26,
ADDR_SW_64KB_R_X = 27,
ADDR_SW_VAR_Z_X = 28,
ADDR_SW_RESERVED4 = 29,
ADDR_SW_RESERVED5 = 30,
ADDR_SW_VAR_R_X = 31,
ADDR_SW_MISCDEF28 = 28,
ADDR_SW_MISCDEF29 = 29,
ADDR_SW_MISCDEF30 = 30,
ADDR_SW_MISCDEF31 = 31,
ADDR_SW_LINEAR_GENERAL = 32,
ADDR_SW_MAX_TYPE = 33,
ADDR_SW_RESERVED0 = ADDR_SW_MISCDEF12,
ADDR_SW_RESERVED1 = ADDR_SW_MISCDEF13,
ADDR_SW_RESERVED2 = ADDR_SW_MISCDEF14,
ADDR_SW_RESERVED3 = ADDR_SW_MISCDEF15,
ADDR_SW_RESERVED4 = ADDR_SW_MISCDEF29,
ADDR_SW_RESERVED5 = ADDR_SW_MISCDEF30,
ADDR_SW_VAR_Z_X = ADDR_SW_MISCDEF28,
ADDR_SW_VAR_R_X = ADDR_SW_MISCDEF31,
ADDR_SW_256KB_Z_X = ADDR_SW_MISCDEF28,
ADDR_SW_256KB_S_X = ADDR_SW_MISCDEF29,
ADDR_SW_256KB_D_X = ADDR_SW_MISCDEF30,
ADDR_SW_256KB_R_X = ADDR_SW_MISCDEF31,
} AddrSwizzleMode;
/**
@@ -553,6 +577,7 @@ typedef enum _AddrHtileBlockSize
ADDR_HTILE_BLOCKSIZE_8 = 8,
} AddrHtileBlockSize;
/**
****************************************************************************************************
* AddrPipeCfg
@@ -638,7 +663,7 @@ typedef enum _AddrTileType
#endif
#ifndef INT_8
#define INT_8 char
#define INT_8 signed char // signed must be used because of aarch64
#endif
#ifndef UINT_8
@@ -715,6 +740,7 @@ typedef enum _AddrTileType
#define ADDR64D "lld" OR "I64d"
#endif
/// @brief Union for storing a 32-bit float or 32-bit integer
/// @ingroup type
///
@@ -730,6 +756,7 @@ typedef union {
float f;
} ADDR_FLT_32;
////////////////////////////////////////////////////////////////////////////////////////////////////
//
// Macros for controlling linking and building on multiple systems
runtime/hsa-runtime/image/addrlib/src/addrinterface.cpp
+94 -35
مشاهده پرونده
@@ -1,28 +1,27 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
/**
****************************************************************************************************
@@ -36,8 +35,6 @@
#include "addrcommon.h"
#include "util/macros.h"
namespace rocr {
using namespace Addr;
@@ -68,6 +65,8 @@ ADDR_E_RETURNCODE ADDR_API AddrCreate(
return returnCode;
}
/**
****************************************************************************************************
* AddrDestroy
@@ -97,6 +96,8 @@ ADDR_E_RETURNCODE ADDR_API AddrDestroy(
return returnCode;
}
////////////////////////////////////////////////////////////////////////////////////////////////////
// Surface functions
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -133,6 +134,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceInfo(
return returnCode;
}
/**
****************************************************************************************************
* AddrComputeSurfaceAddrFromCoord
@@ -197,6 +200,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeSurfaceCoordFromAddr(
return returnCode;
}
////////////////////////////////////////////////////////////////////////////////////////////////////
// HTile functions
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -298,6 +303,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeHtileCoordFromAddr(
return returnCode;
}
////////////////////////////////////////////////////////////////////////////////////////////////////
// C-mask functions
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -400,6 +407,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeCmaskCoordFromAddr(
return returnCode;
}
////////////////////////////////////////////////////////////////////////////////////////////////////
// F-mask functions
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -500,6 +509,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeFmaskCoordFromAddr(
return returnCode;
}
////////////////////////////////////////////////////////////////////////////////////////////////////
// DCC key functions
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -534,6 +545,8 @@ ADDR_E_RETURNCODE ADDR_API AddrComputeDccInfo(
return returnCode;
}
///////////////////////////////////////////////////////////////////////////////
// Below functions are element related or helper functions
///////////////////////////////////////////////////////////////////////////////
@@ -820,7 +833,7 @@ BOOL_32 ADDR_API ElemGetExportNorm(
Addr::Lib* pLib = Lib::GetLib(hLib);
BOOL_32 enabled = FALSE;
ASSERTED ADDR_E_RETURNCODE returnCode = ADDR_OK;
ADDR_E_RETURNCODE returnCode = ADDR_OK;
if (pLib != NULL)
{
@@ -1119,6 +1132,7 @@ ADDR_E_RETURNCODE ADDR_API AddrGetMaxMetaAlignments(
return returnCode;
}
////////////////////////////////////////////////////////////////////////////////////////////////////
// Surface functions for Addr2
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -1155,6 +1169,7 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceInfo(
return returnCode;
}
/**
****************************************************************************************************
* Addr2ComputeSurfaceAddrFromCoord
@@ -1187,6 +1202,7 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceAddrFromCoord(
return returnCode;
}
/**
****************************************************************************************************
* Addr2ComputeSurfaceCoordFromAddr
@@ -1219,6 +1235,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeSurfaceCoordFromAddr(
return returnCode;
}
////////////////////////////////////////////////////////////////////////////////////////////////////
// HTile functions for Addr2
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -1255,6 +1273,7 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileInfo(
return returnCode;
}
/**
****************************************************************************************************
* Addr2ComputeHtileAddrFromCoord
@@ -1287,6 +1306,7 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileAddrFromCoord(
return returnCode;
}
/**
****************************************************************************************************
* Addr2ComputeHtileCoordFromAddr
@@ -1320,6 +1340,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeHtileCoordFromAddr(
return returnCode;
}
////////////////////////////////////////////////////////////////////////////////////////////////////
// C-mask functions for Addr2
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -1357,6 +1379,7 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskInfo(
return returnCode;
}
/**
****************************************************************************************************
* Addr2ComputeCmaskAddrFromCoord
@@ -1389,6 +1412,7 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskAddrFromCoord(
return returnCode;
}
/**
****************************************************************************************************
* Addr2ComputeCmaskCoordFromAddr
@@ -1422,6 +1446,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeCmaskCoordFromAddr(
return returnCode;
}
////////////////////////////////////////////////////////////////////////////////////////////////////
// F-mask functions for Addr2
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -1458,6 +1484,7 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskInfo(
return returnCode;
}
/**
****************************************************************************************************
* Addr2ComputeFmaskAddrFromCoord
@@ -1490,6 +1517,7 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskAddrFromCoord(
return returnCode;
}
/**
****************************************************************************************************
* Addr2ComputeFmaskCoordFromAddr
@@ -1522,6 +1550,8 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeFmaskCoordFromAddr(
return returnCode;
}
////////////////////////////////////////////////////////////////////////////////////////////////////
// DCC key functions for Addr2
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -1675,6 +1705,35 @@ ADDR_E_RETURNCODE ADDR_API Addr2ComputeSubResourceOffsetForSwizzlePattern(
return returnCode;
}
/**
****************************************************************************************************
* Addr2ComputeNonBlockCompressedView
*
* @brief
* Compute non-block-compressed view for a given mipmap level/slice.
****************************************************************************************************
*/
ADDR_E_RETURNCODE ADDR_API Addr2ComputeNonBlockCompressedView(
ADDR_HANDLE hLib, ///< handle of addrlib
const ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT* pIn, ///< [in] input
ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT* pOut) ///< [out] output
{
ADDR_E_RETURNCODE returnCode;
V2::Lib* pLib = V2::Lib::GetLib(hLib);
if (pLib != NULL)
{
returnCode = pLib->ComputeNonBlockCompressedView(pIn, pOut);
}
else
{
returnCode = ADDR_ERROR;
}
return returnCode;
}
/**
****************************************************************************************************
* Addr2GetPreferredSurfaceSetting
@@ -1709,14 +1768,14 @@ ADDR_E_RETURNCODE ADDR_API Addr2GetPreferredSurfaceSetting(
* Addr2IsValidDisplaySwizzleMode
*
* @brief
* Return whether the swizzle mode is supported by DCE / DCN.
* Return whether the swizzle mode is supported by display engine
****************************************************************************************************
*/
ADDR_E_RETURNCODE ADDR_API Addr2IsValidDisplaySwizzleMode(
ADDR_HANDLE hLib,
AddrSwizzleMode swizzleMode,
UINT_32 bpp,
bool *result)
BOOL_32 *pResult)
{
ADDR_E_RETURNCODE returnCode;
@@ -1724,12 +1783,12 @@ ADDR_E_RETURNCODE ADDR_API Addr2IsValidDisplaySwizzleMode(
if (pLib != NULL)
{
ADDR2_COMPUTE_SURFACE_INFO_INPUT in;
ADDR2_COMPUTE_SURFACE_INFO_INPUT in = {};
in.resourceType = ADDR_RSRC_TEX_2D;
in.swizzleMode = swizzleMode;
in.bpp = bpp;
in.swizzleMode = swizzleMode;
in.bpp = bpp;
*result = pLib->IsValidDisplaySwizzleMode(&in);
*pResult = pLib->IsValidDisplaySwizzleMode(&in);
returnCode = ADDR_OK;
}
else
@@ -1737,7 +1796,7 @@ ADDR_E_RETURNCODE ADDR_API Addr2IsValidDisplaySwizzleMode(
returnCode = ADDR_ERROR;
}
return returnCode;
return returnCode;
}
} // rocr
} // namespace rocr
runtime/hsa-runtime/image/addrlib/src/amdgpu_asic_addr.h
+80 -29
مشاهده پرونده
@@ -1,28 +1,27 @@
/*
* Copyright © 2017-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2017-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
#ifndef _AMDGPU_ASIC_ADDR_H
#define _AMDGPU_ASIC_ADDR_H
@@ -44,6 +43,12 @@
#define FAMILY_AI 0x8D
#define FAMILY_RV 0x8E
#define FAMILY_NV 0x8F
#define FAMILY_VGH 0x90
#define FAMILY_GFX1100 0x91
#define FAMILY_GFX1103 0x94
#define FAMILY_RMB 0x92
#define FAMILY_GC_10_3_6 0x95
#define FAMILY_GC_10_3_7 0x97
// AMDGPU_FAMILY_IS(familyId, familyName)
#define FAMILY_IS(f, fn) (f == FAMILY_##fn)
@@ -57,6 +62,9 @@
#define FAMILY_IS_AI(f) FAMILY_IS(f, AI)
#define FAMILY_IS_RV(f) FAMILY_IS(f, RV)
#define FAMILY_IS_NV(f) FAMILY_IS(f, NV)
#define FAMILY_IS_RMB(f) FAMILY_IS(f, RMB)
#define FAMILY_IS_GFX1100(f) FAMILY_IS(f, GFX1100)
#define FAMILY_IS_GFX1103(f) FAMILY_IS(f, GFX1103)
#define AMDGPU_UNKNOWN 0xFF
@@ -77,6 +85,7 @@
#define AMDGPU_ICELAND_RANGE 0x01, 0x14
#define AMDGPU_TONGA_RANGE 0x14, 0x28
#define AMDGPU_FIJI_RANGE 0x3C, 0x50
#define AMDGPU_POLARIS10_RANGE 0x50, 0x5A
#define AMDGPU_POLARIS11_RANGE 0x5A, 0x64
#define AMDGPU_POLARIS12_RANGE 0x64, 0x6E
@@ -88,7 +97,8 @@
#define AMDGPU_VEGA10_RANGE 0x01, 0x14
#define AMDGPU_VEGA12_RANGE 0x14, 0x28
#define AMDGPU_VEGA20_RANGE 0x28, 0x32
#define AMDGPU_ARCTURUS_RANGE 0x32, 0xFF
#define AMDGPU_ARCTURUS_RANGE 0x32, 0x3C
#define AMDGPU_ALDEBARAN_RANGE 0x3C, 0xFF
#define AMDGPU_RAVEN_RANGE 0x01, 0x81
#define AMDGPU_RAVEN2_RANGE 0x81, 0x91
@@ -97,12 +107,30 @@
#define AMDGPU_NAVI10_RANGE 0x01, 0x0A
#define AMDGPU_NAVI12_RANGE 0x0A, 0x14
#define AMDGPU_NAVI14_RANGE 0x14, 0x28
#define AMDGPU_SIENNA_RANGE 0x28, 0x32
#define AMDGPU_NAVI21_RANGE 0x28, 0x32
#define AMDGPU_NAVI22_RANGE 0x32, 0x3C
#define AMDGPU_NAVI23_RANGE 0x3C, 0x46
#define AMDGPU_NAVI24_RANGE 0x46, 0x50
#define AMDGPU_VANGOGH_RANGE 0x01, 0xFF
#define AMDGPU_GFX1100_RANGE 0x01, 0x10
#define AMDGPU_GFX1101_RANGE 0x20, 0xFF
#define AMDGPU_GFX1102_RANGE 0x10, 0x20
#define AMDGPU_GFX1103_RANGE 0x01, 0xFF
#define AMDGPU_REMBRANDT_RANGE 0x01, 0xFF
#define AMDGPU_GFX1036_RANGE 0x01, 0xFF
#define AMDGPU_GFX1037_RANGE 0x01, 0xFF
#define AMDGPU_EXPAND_FIX(x) x
#define AMDGPU_RANGE_HELPER(val, min, max) ((val >= min) && (val < max))
#define AMDGPU_IN_RANGE(val, ...) AMDGPU_EXPAND_FIX(AMDGPU_RANGE_HELPER(val, __VA_ARGS__))
// ASICREV_IS(eRevisionId, revisionName)
#define ASICREV_IS(r, rn) AMDGPU_IN_RANGE(r, AMDGPU_##rn##_RANGE)
#define ASICREV_IS_TAHITI_P(r) ASICREV_IS(r, TAHITI)
@@ -137,14 +165,37 @@
#define ASICREV_IS_VEGA12_p(r) ASICREV_IS(r, VEGA12)
#define ASICREV_IS_VEGA20_P(r) ASICREV_IS(r, VEGA20)
#define ASICREV_IS_ARCTURUS(r) ASICREV_IS(r, ARCTURUS)
#define ASICREV_IS_ALDEBARAN(r) ASICREV_IS(r, ALDEBARAN)
#define ASICREV_IS_RAVEN(r) ASICREV_IS(r, RAVEN)
#define ASICREV_IS_RAVEN2(r) ASICREV_IS(r, RAVEN2)
#define ASICREV_IS_RENOIR(r) ASICREV_IS(r, RENOIR)
#define ASICREV_IS_NAVI10_P(r) ASICREV_IS(r, NAVI10)
#define ASICREV_IS_NAVI12(r) ASICREV_IS(r, NAVI12)
#define ASICREV_IS_NAVI14(r) ASICREV_IS(r, NAVI14)
#define ASICREV_IS_SIENNA_M(r) ASICREV_IS(r, SIENNA)
#define ASICREV_IS_NAVI12_P(r) ASICREV_IS(r, NAVI12)
#define ASICREV_IS_NAVI14_M(r) ASICREV_IS(r, NAVI14)
#define ASICREV_IS_NAVI21_M(r) ASICREV_IS(r, NAVI21)
#define ASICREV_IS_NAVI22_P(r) ASICREV_IS(r, NAVI22)
#define ASICREV_IS_NAVI23_P(r) ASICREV_IS(r, NAVI23)
#define ASICREV_IS_NAVI24_P(r) ASICREV_IS(r, NAVI24)
#define ASICREV_IS_VANGOGH(r) ASICREV_IS(r, VANGOGH)
#define ASICREV_IS_GFX1100(r) ASICREV_IS(r, GFX1100)
#define ASICREV_IS_GFX1101(r) ASICREV_IS(r, GFX1101)
#define ASICREV_IS_GFX1102(r) ASICREV_IS(r, GFX1102)
#define ASICREV_IS_GFX1103(r) ASICREV_IS(r, GFX1103)
#define ASICREV_IS_REMBRANDT(r) ASICREV_IS(r, REMBRANDT)
#define ASICREV_IS_GFX1036(r) ASICREV_IS(r, GFX1036)
#define ASICREV_IS_GFX1037(r) ASICREV_IS(r, GFX1037)
#endif // _AMDGPU_ASIC_ADDR_H
runtime/hsa-runtime/image/addrlib/src/chip/gfx10/gfx10_gb_reg.h
+33 -25
مشاهده پرونده
@@ -1,28 +1,27 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
#if !defined (__GFX10_GB_REG_H__)
#define __GFX10_GB_REG_H__
@@ -34,7 +33,16 @@
*
*/
union GB_ADDR_CONFIG
//
// Make sure the necessary endian defines are there.
//
#if defined(LITTLEENDIAN_CPU)
#elif defined(BIGENDIAN_CPU)
#else
#error "BIGENDIAN_CPU or LITTLEENDIAN_CPU must be defined"
#endif
union GB_ADDR_CONFIG_GFX10
{
struct
{
runtime/hsa-runtime/image/addrlib/src/chip/gfx11/gfx11_gb_reg.h
+76
مشاهده پرونده
@@ -0,0 +1,76 @@
/*
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
#if !defined (__GFX11_GB_REG_H__)
#define __GFX11_GB_REG_H__
/*
* gfx11_gb_reg.h
*
* Register Spec Release: 1.0
*
*/
//
// Make sure the necessary endian defines are there.
//
#if defined(LITTLEENDIAN_CPU)
#elif defined(BIGENDIAN_CPU)
#else
#error "BIGENDIAN_CPU or LITTLEENDIAN_CPU must be defined"
#endif
union GB_ADDR_CONFIG_GFX11
{
struct
{
#if defined(LITTLEENDIAN_CPU)
unsigned int NUM_PIPES : 3;
unsigned int PIPE_INTERLEAVE_SIZE : 3;
unsigned int MAX_COMPRESSED_FRAGS : 2;
unsigned int NUM_PKRS : 3;
unsigned int : 8;
unsigned int NUM_SHADER_ENGINES : 2;
unsigned int : 5;
unsigned int NUM_RB_PER_SE : 2;
unsigned int : 4;
#elif defined(BIGENDIAN_CPU)
unsigned int : 4;
unsigned int NUM_RB_PER_SE : 2;
unsigned int : 5;
unsigned int NUM_SHADER_ENGINES : 2;
unsigned int : 8;
unsigned int NUM_PKRS : 3;
unsigned int MAX_COMPRESSED_FRAGS : 2;
unsigned int PIPE_INTERLEAVE_SIZE : 3;
unsigned int NUM_PIPES : 3;
#endif
} bitfields, bits;
unsigned int u32All;
int i32All;
float f32All;
};
#endif
runtime/hsa-runtime/image/addrlib/src/chip/gfx9/gfx9_gb_reg.h
+33 -25
مشاهده پرونده
@@ -1,28 +1,27 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
#if !defined (__GFX9_GB_REG_H__)
#define __GFX9_GB_REG_H__
@@ -34,7 +33,16 @@
*
*/
union GB_ADDR_CONFIG_gfx9 {
//
// Make sure the necessary endian defines are there.
//
#if defined(LITTLEENDIAN_CPU)
#elif defined(BIGENDIAN_CPU)
#else
#error "BIGENDIAN_CPU or LITTLEENDIAN_CPU must be defined"
#endif
union GB_ADDR_CONFIG_GFX9 {
struct {
#if defined(LITTLEENDIAN_CPU)
unsigned int NUM_PIPES : 3;
runtime/hsa-runtime/image/addrlib/src/chip/r800/si_gb_reg.h
+42 -28
مشاهده پرونده
@@ -1,28 +1,27 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
#if !defined (__SI_GB_REG_H__)
#define __SI_GB_REG_H__
@@ -35,6 +34,15 @@
*
*****************************************************************************************************************/
//
// Make sure the necessary endian defines are there.
//
#if defined(LITTLEENDIAN_CPU)
#elif defined(BIGENDIAN_CPU)
#else
#error "BIGENDIAN_CPU or LITTLEENDIAN_CPU must be defined"
#endif
/*
* GB_ADDR_CONFIG struct
*/
@@ -103,7 +111,7 @@ typedef union {
unsigned int num_banks : 2;
unsigned int micro_tile_mode_new : 3;
unsigned int sample_split : 2;
unsigned int : 5;
unsigned int alt_pipe_config : 5;
} GB_TILE_MODE_T;
typedef struct _GB_MACROTILE_MODE_T {
@@ -111,13 +119,16 @@ typedef union {
unsigned int bank_height : 2;
unsigned int macro_tile_aspect : 2;
unsigned int num_banks : 2;
unsigned int : 24;
unsigned int alt_bank_height : 2;
unsigned int alt_macro_tile_aspect : 2;
unsigned int alt_num_banks : 2;
unsigned int : 18;
} GB_MACROTILE_MODE_T;
#elif defined(BIGENDIAN_CPU)
typedef struct _GB_TILE_MODE_T {
unsigned int : 5;
unsigned int alt_pipe_config : 5;
unsigned int sample_split : 2;
unsigned int micro_tile_mode_new : 3;
unsigned int num_banks : 2;
@@ -131,7 +142,10 @@ typedef union {
} GB_TILE_MODE_T;
typedef struct _GB_MACROTILE_MODE_T {
unsigned int : 24;
unsigned int : 18;
unsigned int alt_num_banks : 2;
unsigned int alt_macro_tile_aspect : 2;
unsigned int alt_bank_height : 2;
unsigned int num_banks : 2;
unsigned int macro_tile_aspect : 2;
unsigned int bank_height : 2;
runtime/hsa-runtime/image/addrlib/src/core/addrcommon.h
+133 -73
مشاهده پرونده
@@ -1,28 +1,27 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
/**
****************************************************************************************************
@@ -36,39 +35,38 @@
#include "addrinterface.h"
#if !defined(DEBUG)
#ifdef NDEBUG
#define DEBUG 0
#else
#define DEBUG 1
#endif
#endif
// ADDR_LNX_KERNEL_BUILD is for internal build
// Moved from addrinterface.h so __KERNEL__ is not needed any more
#if ADDR_LNX_KERNEL_BUILD // || (defined(__GNUC__) && defined(__KERNEL__))
#include <string.h>
#elif !defined(__APPLE__) || defined(HAVE_TSERVER)
#if !defined(__APPLE__) || defined(HAVE_TSERVER)
#include <stdlib.h>
#include <string.h>
#endif
#include <assert.h>
#include "util/macros.h"
#if defined(__GNUC__)
#include <assert.h>
#endif
////////////////////////////////////////////////////////////////////////////////////////////////////
// Platform specific debug break defines
////////////////////////////////////////////////////////////////////////////////////////////////////
#if !defined(DEBUG)
#ifdef NDEBUG
#define DEBUG 0
#else
#define DEBUG 1
#endif
#endif
#if DEBUG
#if defined(__GNUC__)
#define ADDR_DBG_BREAK() assert(false)
#define ADDR_DBG_BREAK() { assert(false); }
#elif defined(__APPLE__)
#define ADDR_DBG_BREAK() { IOPanic("");}
#else
#define ADDR_DBG_BREAK() { __debugbreak(); }
#endif
#else
#define ADDR_DBG_BREAK() do {} while(0)
#define ADDR_DBG_BREAK()
#endif
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -81,10 +79,29 @@
#define ADDR_ANALYSIS_ASSUME(expr) do { (void)(expr); } while (0)
#endif
#define ADDR_ASSERT(__e) assert(__e)
#define ADDR_ASSERT_ALWAYS() ADDR_DBG_BREAK()
#define ADDR_UNHANDLED_CASE() ADDR_ASSERT(!"Unhandled case")
#define ADDR_NOT_IMPLEMENTED() ADDR_ASSERT(!"Not implemented");
#if DEBUG
#if defined( _WIN32 )
#define ADDR_ASSERT(__e) \
{ \
ADDR_ANALYSIS_ASSUME(__e); \
if ( !((__e) ? TRUE : FALSE)) { ADDR_DBG_BREAK(); } \
}
#else
#define ADDR_ASSERT(__e) if ( !((__e) ? TRUE : FALSE)) { ADDR_DBG_BREAK(); }
#endif
#define ADDR_ASSERT_ALWAYS() ADDR_DBG_BREAK()
#define ADDR_UNHANDLED_CASE() ADDR_ASSERT(!"Unhandled case")
#define ADDR_NOT_IMPLEMENTED() ADDR_ASSERT(!"Not implemented");
#else //DEBUG
#if defined( _WIN32 )
#define ADDR_ASSERT(__e) { ADDR_ANALYSIS_ASSUME(__e); }
#else
#define ADDR_ASSERT(__e)
#endif
#define ADDR_ASSERT_ALWAYS()
#define ADDR_UNHANDLED_CASE()
#define ADDR_NOT_IMPLEMENTED()
#endif //DEBUG
////////////////////////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -107,6 +124,7 @@
#define ADDR_INFO(cond, a) \
{ if (!(cond)) { ADDR_PRNT(a); } }
/// @brief Macro for reporting error warning messages
/// @ingroup util
///
@@ -125,6 +143,7 @@
ADDR_PRNT((" WARNING in file %s, line %d\n", __FILE__, __LINE__)); \
} }
/// @brief Macro for reporting fatal error conditions
/// @ingroup util
///
@@ -147,27 +166,35 @@
#define ADDRDPF 1 ? (void)0 : (void)
#define ADDR_PRNT(a) do {} while(0)
#define ADDR_PRNT(a)
#define ADDR_DBG_BREAK() do {} while(0)
#define ADDR_DBG_BREAK()
#define ADDR_INFO(cond, a) do {} while(0)
#define ADDR_INFO(cond, a)
#define ADDR_WARN(cond, a) do {} while(0)
#define ADDR_WARN(cond, a)
#define ADDR_EXIT(cond, a) do {} while(0)
#define ADDR_EXIT(cond, a)
#endif // DEBUG
////////////////////////////////////////////////////////////////////////////////////////////////////
#define ADDR_C_ASSERT(__e) STATIC_ASSERT(__e)
#if defined(static_assert)
#define ADDR_C_ASSERT(__e) static_assert(__e, "")
#else
/* This version of STATIC_ASSERT() relies on VLAs. If COND is
* false/zero, the array size will be -1 and we'll get a compile
* error
*/
# define ADDR_C_ASSERT(__e) do { \
(void) sizeof(char [1 - 2*!(__e)]); \
} while (0)
#endif
namespace rocr {
namespace Addr
{
namespace Addr {
namespace V1 {
namespace V1
{
////////////////////////////////////////////////////////////////////////////////////////////////////
// Common constants
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -207,21 +234,6 @@ static const UINT_32 MaxSurfaceHeight = 16384;
/// Helper macros to select a single bit from an int (undefined later in section)
#define _BIT(v,b) (((v) >> (b) ) & 1)
/**
****************************************************************************************************
* @brief Enums to identify AddrLib type
****************************************************************************************************
*/
enum LibClass
{
BASE_ADDRLIB = 0x0,
R600_ADDRLIB = 0x6,
R800_ADDRLIB = 0x8,
SI_ADDRLIB = 0xa,
CI_ADDRLIB = 0xb,
AI_ADDRLIB = 0xd,
};
/**
****************************************************************************************************
* ChipFamily
@@ -271,8 +283,9 @@ union ConfigFlags
UINT_32 disableLinearOpt : 1; ///< Disallow tile modes to be optimized to linear
UINT_32 use32bppFor422Fmt : 1; ///< View 422 formats as 32 bits per pixel element
UINT_32 forceDccAndTcCompat : 1; ///< Force enable DCC and TC compatibility
UINT_32 nonPower2MemConfig : 1; ///< Physical video memory size is not power of 2
UINT_32 reserved : 19; ///< Reserved bits for future use
UINT_32 nonPower2MemConfig : 1; ///< Video memory bit width is not power of 2
UINT_32 enableAltTiling : 1; ///< Enable alt tile mode
UINT_32 reserved : 18; ///< Reserved bits for future use
};
UINT_32 value;
@@ -433,6 +446,38 @@ static inline INT_32 Max(
return ((value1 > (value2)) ? (value1) : value2);
}
/**
****************************************************************************************************
* RoundUpQuotient
*
* @brief
* Divides two numbers, rounding up any remainder.
****************************************************************************************************
*/
static inline UINT_32 RoundUpQuotient(
UINT_32 numerator,
UINT_32 denominator)
{
ADDR_ASSERT(denominator > 0);
return ((numerator + (denominator - 1)) / denominator);
}
/**
****************************************************************************************************
* RoundUpQuotient
*
* @brief
* Divides two numbers, rounding up any remainder.
****************************************************************************************************
*/
static inline UINT_64 RoundUpQuotient(
UINT_64 numerator,
UINT_64 denominator)
{
ADDR_ASSERT(denominator > 0);
return ((numerator + (denominator - 1)) / denominator);
}
/**
****************************************************************************************************
* NextPow2
@@ -856,6 +901,7 @@ static inline VOID InitChannel(
pChanSet->index = index;
}
/**
****************************************************************************************************
* InitChannel
@@ -933,7 +979,7 @@ static inline UINT_32 GetCoordActiveMask(
* ShiftCeil
*
* @brief
* Apply righ-shift with ceiling
* Apply right-shift with ceiling
****************************************************************************************************
*/
static inline UINT_32 ShiftCeil(
@@ -943,9 +989,23 @@ static inline UINT_32 ShiftCeil(
return (a >> b) + (((a & ((1 << b) - 1)) != 0) ? 1 : 0);
}
/**
****************************************************************************************************
* ShiftRight
*
* @brief
* Return right-shift value and minimum is 1
****************************************************************************************************
*/
static inline UINT_32 ShiftRight(
UINT_32 a, ///< [in] value to be right-shifted
UINT_32 b) ///< [in] number of bits to shift
{
return Max(a >> b, 1u);
}
} // Addr
} // rocr
#endif // __ADDR_COMMON_H__
runtime/hsa-runtime/image/addrlib/src/core/addrelemlib.cpp
+26 -27
مشاهده پرونده
@@ -1,28 +1,27 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
/**
****************************************************************************************************
@@ -35,8 +34,7 @@
#include "addrlib.h"
namespace rocr {
namespace Addr
{
namespace Addr {
/**
****************************************************************************************************
@@ -348,6 +346,7 @@ VOID ElemLib::Int32sToPixel(
UINT_32 elemMask=0;
UINT_32 elementXor = 0; // address xor when reading bytes from elements
// @@ NOTE: assert if called on a compressed format!
if (properties.byteAligned) // Components are all byte-sized
@@ -1273,7 +1272,6 @@ VOID ElemLib::RestoreSurfaceInfo(
UINT_32 bpp;
BOOL_32 bBCnFormat = FALSE;
(void)bBCnFormat;
ADDR_ASSERT(pBpp != NULL);
ADDR_ASSERT(pWidth != NULL && pHeight != NULL);
@@ -1746,6 +1744,7 @@ BOOL_32 ElemLib::IsBlockCompressed(
((format >= ADDR_FMT_ASTC_4x4) && (format <= ADDR_FMT_ETC2_128BPP)));
}
/**
****************************************************************************************************
* ElemLib::IsCompressed
runtime/hsa-runtime/image/addrlib/src/core/addrelemlib.h
+25 -26
مشاهده پرونده
@@ -1,28 +1,28 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
/**
****************************************************************************************************
@@ -39,8 +39,7 @@
#include "addrcommon.h"
namespace rocr {
namespace Addr
{
namespace Addr {
class Lib;
runtime/hsa-runtime/image/addrlib/src/core/addrlib.cpp
+42 -30
مشاهده پرونده
@@ -1,28 +1,27 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
/**
****************************************************************************************************
@@ -82,8 +81,7 @@ UINT_32 __umoddi3(UINT_64 n, UINT_32 base)
#endif // __APPLE__
namespace rocr {
namespace Addr
{
namespace Addr {
////////////////////////////////////////////////////////////////////////////////////////////////////
// Constructor/Destructor
@@ -99,7 +97,6 @@ namespace Addr
****************************************************************************************************
*/
Lib::Lib() :
m_class(BASE_ADDRLIB),
m_chipFamily(ADDR_CHIP_FAMILY_IVLD),
m_chipRevision(0),
m_version(ADDRLIB_VERSION),
@@ -109,6 +106,8 @@ Lib::Lib() :
m_rowSize(0),
m_minPitchAlignPixels(1),
m_maxSamples(8),
m_maxBaseAlign(0),
m_maxMetaBaseAlign(0),
m_pElemLib(NULL)
{
m_configFlags.value = 0;
@@ -125,7 +124,6 @@ Lib::Lib() :
*/
Lib::Lib(const Client* pClient) :
Object(pClient),
m_class(BASE_ADDRLIB),
m_chipFamily(ADDR_CHIP_FAMILY_IVLD),
m_chipRevision(0),
m_version(ADDRLIB_VERSION),
@@ -135,6 +133,8 @@ Lib::Lib(const Client* pClient) :
m_rowSize(0),
m_minPitchAlignPixels(1),
m_maxSamples(8),
m_maxBaseAlign(0),
m_maxMetaBaseAlign(0),
m_pElemLib(NULL)
{
m_configFlags.value = 0;
@@ -158,6 +158,7 @@ Lib::~Lib()
}
}
////////////////////////////////////////////////////////////////////////////////////////////////////
// Initialization/Helper
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -207,7 +208,7 @@ ADDR_E_RETURNCODE Lib::Create(
pLib = SiHwlInit(&client);
break;
case FAMILY_VI:
case FAMILY_CZ:
case FAMILY_CZ: // VI based fusion
case FAMILY_CI:
case FAMILY_KV: // CI based fusion
pLib = CiHwlInit(&client);
@@ -225,8 +226,16 @@ ADDR_E_RETURNCODE Lib::Create(
pLib = Gfx9HwlInit(&client);
break;
case FAMILY_NV:
case FAMILY_VGH:
case FAMILY_RMB:
case FAMILY_GC_10_3_6:
case FAMILY_GC_10_3_7:
pLib = Gfx10HwlInit(&client);
break;
case FAMILY_GFX1100:
case FAMILY_GFX1103:
pLib = Gfx11HwlInit(&client);
break;
default:
ADDR_ASSERT_ALWAYS();
break;
@@ -252,6 +261,7 @@ ADDR_E_RETURNCODE Lib::Create(
pLib->m_configFlags.allowLargeThickTile = pCreateIn->createFlags.allowLargeThickTile;
pLib->m_configFlags.forceDccAndTcCompat = pCreateIn->createFlags.forceDccAndTcCompat;
pLib->m_configFlags.nonPower2MemConfig = pCreateIn->createFlags.nonPower2MemConfig;
pLib->m_configFlags.enableAltTiling = pCreateIn->createFlags.enableAltTiling;
pLib->m_configFlags.disableLinearOpt = FALSE;
pLib->SetChipFamily(pCreateIn->chipFamily, pCreateIn->chipRevision);
@@ -491,10 +501,12 @@ UINT_32 Lib::Bits2Number(
return number;
}
////////////////////////////////////////////////////////////////////////////////////////////////////
// Element lib
////////////////////////////////////////////////////////////////////////////////////////////////////
/**
****************************************************************************************************
* Lib::Flt32ToColorPixel
@@ -610,6 +622,7 @@ ADDR_E_RETURNCODE Lib::Flt32ToColorPixel(
return returnCode;
}
/**
****************************************************************************************************
* Lib::GetExportNorm
@@ -660,4 +673,3 @@ UINT_32 Lib::GetBpe(AddrFormat format) const
} // Addr
} // rocr
runtime/hsa-runtime/image/addrlib/src/core/addrlib.h
+25 -29
مشاهده پرونده
@@ -1,28 +1,27 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
/**
****************************************************************************************************
@@ -57,8 +56,7 @@
#endif
namespace rocr {
namespace Addr
{
namespace Addr {
/**
****************************************************************************************************
@@ -371,8 +369,6 @@ private:
VOID SetMaxAlignments();
protected:
LibClass m_class; ///< Store class type (HWL type)
ChipFamily m_chipFamily; ///< Chip family translated from the one in atiid.h
UINT_32 m_chipRevision; ///< Revision id from xxx_id.h
@@ -411,8 +407,8 @@ Lib* SiHwlInit (const Client* pClient);
Lib* CiHwlInit (const Client* pClient);
Lib* Gfx9HwlInit (const Client* pClient);
Lib* Gfx10HwlInit(const Client* pClient);
Lib* Gfx11HwlInit(const Client* pClient);
} // Addr
} // rocr
#endif
runtime/hsa-runtime/image/addrlib/src/core/addrlib1.cpp
+41 -32
مشاهده پرونده
@@ -1,28 +1,27 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
/**
****************************************************************************************************
@@ -36,10 +35,8 @@
#include "addrcommon.h"
namespace rocr {
namespace Addr
{
namespace V1
{
namespace Addr {
namespace V1 {
////////////////////////////////////////////////////////////////////////////////////////////////////
// Static Const Member
@@ -148,10 +145,12 @@ Lib* Lib::GetLib(
return static_cast<Lib*>(hLib);
}
////////////////////////////////////////////////////////////////////////////////////////////////////
// Surface Methods
////////////////////////////////////////////////////////////////////////////////////////////////////
/**
****************************************************************************************************
* Lib::ComputeSurfaceInfo
@@ -1229,6 +1228,8 @@ UINT_32 Lib::Thickness(
return ModeFlags[tileMode].thickness;
}
////////////////////////////////////////////////////////////////////////////////////////////////////
// CMASK/HTILE
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -2009,6 +2010,7 @@ ADDR_E_RETURNCODE Lib::ComputeCmaskInfo(
*pPitchOut = (pitchIn + macroWidth - 1) & ~(macroWidth - 1);
*pHeightOut = (heightIn + macroHeight - 1) & ~(macroHeight - 1);
sliceBytes = ComputeCmaskBytes(*pPitchOut,
*pHeightOut,
1);
@@ -2187,7 +2189,6 @@ VOID Lib::HwlComputeXmaskCoordFromAddr(
UINT_32 pipe;
UINT_32 numPipes;
UINT_32 numGroupBits;
(void)numGroupBits;
UINT_32 numPipeBits;
UINT_32 macroTilePitch;
UINT_32 macroTileHeight;
@@ -2236,6 +2237,7 @@ VOID Lib::HwlComputeXmaskCoordFromAddr(
UINT_32 groupBits = 8 * m_pipeInterleaveBytes;
UINT_32 pipes = numPipes;
//
// Compute the micro tile size, in bits. And macro tile pitch and height.
//
@@ -2288,17 +2290,20 @@ VOID Lib::HwlComputeXmaskCoordFromAddr(
pitch = pitchAligned;
height = heightAligned;
//
// Convert byte address to bit address.
//
bitAddr = BYTES_TO_BITS(addr) + bitPosition;
//
// Remove pipe bits from address.
//
bitAddr = (bitAddr % groupBits) + ((bitAddr/groupBits/pipes)*groupBits);
elemOffset = bitAddr / elemBits;
tilesPerMacro = (macroTilePitch/factor) * macroTileHeight / MicroTilePixels >> numPipeBits;
@@ -2316,6 +2321,7 @@ VOID Lib::HwlComputeXmaskCoordFromAddr(
macroY = static_cast<UINT_32>((macroNumber % macrosPerSlice) / macrosPerPitch);
macroZ = static_cast<UINT_32>((macroNumber / macrosPerSlice));
microX = microNumber % (macroTilePitch / factor / MicroTileWidth);
microY = (microNumber / (macroTilePitch / factor / MicroTileHeight));
@@ -2326,6 +2332,7 @@ VOID Lib::HwlComputeXmaskCoordFromAddr(
microTileCoordY = ComputeXmaskCoordYFromPipe(pipe,
*pX/MicroTileWidth);
//
// Assemble final coordinates.
//
@@ -2385,6 +2392,7 @@ UINT_64 Lib::HwlComputeXmaskAddrFromCoord(
UINT_64 offsetHi;
UINT_64 groupMask;
UINT_32 elemBits = 0;
UINT_32 numPipes = m_pipes; // This function is accessed prior to si only
@@ -3347,6 +3355,7 @@ VOID Lib::PadDimensions(
heightAlign);
}
/**
****************************************************************************************************
* Lib::HwlPreHandleBaseLvl3xPitch
@@ -3408,6 +3417,7 @@ UINT_32 Lib::HwlPostHandleBaseLvl3xPitch(
return expPitch;
}
/**
****************************************************************************************************
* Lib::IsMacroTiled
@@ -3524,7 +3534,6 @@ VOID Lib::ComputeMipLevel(
{
// Check if HWL has handled
BOOL_32 hwlHandled = FALSE;
(void)hwlHandled;
if (ElemLib::IsBlockCompressed(pIn->format))
{
@@ -3928,6 +3937,7 @@ VOID Lib::ComputeQbStereoInfo(
// 1D surface on SI may break this rule, but we can force it to meet by checking .qbStereo.
}
/**
****************************************************************************************************
* Lib::ComputePrtInfo
@@ -4060,5 +4070,4 @@ ADDR_E_RETURNCODE Lib::ComputePrtInfo(
} // V1
} // Addr
} // rocr
} // namespace rocr
runtime/hsa-runtime/image/addrlib/src/core/addrlib1.h
+28 -30
مشاهده پرونده
@@ -1,28 +1,28 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
/**
****************************************************************************************************
@@ -37,10 +37,8 @@
#include "addrlib.h"
namespace rocr {
namespace Addr
{
namespace V1
{
namespace Addr {
namespace V1 {
/**
****************************************************************************************************
@@ -355,6 +353,7 @@ protected:
const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
UINT_32* pPitchAlign, UINT_32* pHeightAlign, UINT_32* pSizeAlign) const = 0;
virtual VOID HwlOverrideTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const
{
// not supported in hwl layer
@@ -540,8 +539,7 @@ private:
} // V1
} // Addr
} // rocr
} // namespace rocr
#endif
runtime/hsa-runtime/image/addrlib/src/core/addrlib2.cpp
+245 -33
مشاهده پرونده
@@ -1,28 +1,28 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
/**
************************************************************************************************************************
@@ -36,10 +36,8 @@
#include "addrcommon.h"
namespace rocr {
namespace Addr
{
namespace V2
{
namespace Addr {
namespace V2 {
////////////////////////////////////////////////////////////////////////////////////////////////////
// Static Const Member
@@ -143,10 +141,12 @@ Lib* Lib::GetLib(
return static_cast<Lib*>(hLib);
}
////////////////////////////////////////////////////////////////////////////////////////////////////
// Surface Methods
////////////////////////////////////////////////////////////////////////////////////////////////////
/**
************************************************************************************************************************
* Lib::ComputeSurfaceInfo
@@ -309,11 +309,16 @@ ADDR_E_RETURNCODE Lib::ComputeSurfaceInfo(
if (pOut->pStereoInfo != NULL)
{
ComputeQbStereoInfo(pOut);
#if DEBUG
ValidateStereoInfo(pIn, pOut);
#endif
}
}
}
}
ADDR_ASSERT(pOut->surfSize != 0);
ValidBaseAlignments(pOut->baseAlign);
return returnCode;
@@ -436,6 +441,7 @@ ADDR_E_RETURNCODE Lib::ComputeSurfaceCoordFromAddr(
return returnCode;
}
////////////////////////////////////////////////////////////////////////////////////////////////////
// CMASK/HTILE
////////////////////////////////////////////////////////////////////////////////////////////////////
@@ -822,7 +828,12 @@ ADDR_E_RETURNCODE Lib::ComputeDccAddrFromCoord(
}
else
{
returnCode = HwlComputeDccAddrFromCoord(pIn, pOut);
returnCode = HwlSupportComputeDccAddrFromCoord(pIn);
if (returnCode == ADDR_OK)
{
HwlComputeDccAddrFromCoord(pIn, pOut);
}
}
return returnCode;
@@ -888,6 +899,15 @@ ADDR_E_RETURNCODE Lib::ComputeSlicePipeBankXor(
{
returnCode = ADDR_NOTSUPPORTED;
}
else if ((pIn->bpe != 0) &&
(pIn->bpe != 8) &&
(pIn->bpe != 16) &&
(pIn->bpe != 32) &&
(pIn->bpe != 64) &&
(pIn->bpe != 128))
{
returnCode = ADDR_INVALIDPARAMS;
}
else
{
returnCode = HwlComputeSlicePipeBankXor(pIn, pOut);
@@ -927,6 +947,37 @@ ADDR_E_RETURNCODE Lib::ComputeSubResourceOffsetForSwizzlePattern(
return returnCode;
}
/**
************************************************************************************************************************
* Lib::ComputeNonBlockCompressedView
*
* @brief
* Interface function stub of Addr2ComputeNonBlockCompressedView.
*
* @return
* ADDR_E_RETURNCODE
************************************************************************************************************************
*/
ADDR_E_RETURNCODE Lib::ComputeNonBlockCompressedView(
const ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT* pIn,
ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT* pOut)
{
ADDR_E_RETURNCODE returnCode;
if ((GetFillSizeFieldsFlags() == TRUE) &&
((pIn->size != sizeof(ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT)) ||
(pOut->size != sizeof(ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT))))
{
returnCode = ADDR_INVALIDPARAMS;
}
else
{
returnCode = HwlComputeNonBlockCompressedView(pIn, pOut);
}
return returnCode;
}
/**
************************************************************************************************************************
* Lib::ExtractPipeBankXor
@@ -1539,11 +1590,11 @@ Dim3d Lib::GetMipTailDim(
{
ADDR_ASSERT(IsThin(resourceType, swizzleMode));
#if DEBUG
// GFX9/GFX10 use different dimension shrinking logic for mipmap tail: say for 128KB block + 2BPE, the maximum
// dimension of mipmap tail level will be [256W * 128H] on GFX9 ASICs and [128W * 256H] on GFX10 ASICs. Since
// GFX10 is newer HWL so we make its implementation into base class, in order to save future change on new HWLs.
// And assert log2BlkSize will always be an even value on GFX9, so we never need the logic wrapped by DEBUG...
#if DEBUG
if ((log2BlkSize & 1) && (m_chipFamily == ADDR_CHIP_FAMILY_AI))
{
// Should never go here...
@@ -1958,7 +2009,7 @@ VOID Lib::FilterInvalidEqSwizzleMode(
const UINT_32 rsrcTypeIdx = static_cast<UINT_32>(resourceType) - 1;
UINT_32 validSwModeSet = allowedSwModeSetVal;
for (UINT_32 swModeIdx = 0; validSwModeSet != 0; swModeIdx++)
for (UINT_32 swModeIdx = 1; validSwModeSet != 0; swModeIdx++)
{
if (validSwModeSet & 1)
{
@@ -1979,8 +2030,169 @@ VOID Lib::FilterInvalidEqSwizzleMode(
}
}
/**
************************************************************************************************************************
* Lib::IsBlockTypeAvaiable
*
* @brief
* Determine whether a block type is allowed in a given blockSet
*
* @return
* N/A
************************************************************************************************************************
*/
BOOL_32 Lib::IsBlockTypeAvaiable(
ADDR2_BLOCK_SET blockSet,
AddrBlockType blockType)
{
BOOL_32 avail;
if (blockType == AddrBlockLinear)
{
avail = blockSet.linear ? TRUE : FALSE;
}
else
{
avail = blockSet.value & (1 << (static_cast<UINT_32>(blockType) - 1)) ? TRUE : FALSE;
}
return avail;
}
/**
************************************************************************************************************************
* Lib::BlockTypeWithinMemoryBudget
*
* @brief
* Determine whether a new block type is acceptible based on memory waste ratio
*
* @return
* N/A
************************************************************************************************************************
*/
BOOL_32 Lib::BlockTypeWithinMemoryBudget(
UINT_64 minSize,
UINT_64 newBlockTypeSize,
UINT_32 ratioLow,
UINT_32 ratioHi,
DOUBLE memoryBudget,
BOOL_32 newBlockTypeBigger)
{
BOOL_32 accept = FALSE;
if (memoryBudget >= 1.0)
{
if (newBlockTypeBigger)
{
if ((static_cast<DOUBLE>(newBlockTypeSize) / minSize) <= memoryBudget)
{
accept = TRUE;
}
}
else
{
if ((static_cast<DOUBLE>(minSize) / newBlockTypeSize) > memoryBudget)
{
accept = TRUE;
}
}
}
else
{
if (newBlockTypeBigger)
{
if ((newBlockTypeSize * ratioHi) <= (minSize * ratioLow))
{
accept = TRUE;
}
}
else
{
if ((newBlockTypeSize * ratioLow) < (minSize * ratioHi))
{
accept = TRUE;
}
}
}
return accept;
}
#if DEBUG
/**
************************************************************************************************************************
* Lib::ValidateStereoInfo
*
* @brief
* Validate stereo info by checking a few typical cases
*
* @return
* N/A
************************************************************************************************************************
*/
VOID Lib::ValidateStereoInfo(
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn, ///< [in] input structure
const ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut ///< [in] output structure
) const
{
ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT addrIn = {};
addrIn.size = sizeof(addrIn);
addrIn.swizzleMode = pIn->swizzleMode;
addrIn.flags = pIn->flags;
addrIn.flags.qbStereo = 0;
addrIn.resourceType = pIn->resourceType;
addrIn.bpp = pIn->bpp;
addrIn.unalignedWidth = pIn->width;
addrIn.numSlices = pIn->numSlices;
addrIn.numMipLevels = pIn->numMipLevels;
addrIn.numSamples = pIn->numSamples;
addrIn.numFrags = pIn->numFrags;
// Call Addr2ComputePipeBankXor() and validate different pbXor value if necessary...
const UINT_32 pbXor = 0;
ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT addrOut = {};
addrOut.size = sizeof(addrOut);
// Make the array to be {0, 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096} for full test
const UINT_32 TestCoord[] = {0};
for (UINT_32 xIdx = 0; xIdx < sizeof(TestCoord) / sizeof(TestCoord[0]); xIdx++)
{
if (TestCoord[xIdx] < pIn->width)
{
addrIn.x = TestCoord[xIdx];
for (UINT_32 yIdx = 0; yIdx < sizeof(TestCoord) / sizeof(TestCoord[0]); yIdx++)
{
if (TestCoord[yIdx] < pIn->height)
{
addrIn.y = TestCoord[yIdx] + pOut->pStereoInfo->eyeHeight;
addrIn.pipeBankXor = pbXor ^ pOut->pStereoInfo->rightSwizzle;
addrIn.unalignedHeight = pIn->height + pOut->pStereoInfo->eyeHeight;
ADDR_E_RETURNCODE ret = ComputeSurfaceAddrFromCoord(&addrIn, &addrOut);
ADDR_ASSERT(ret == ADDR_OK);
const UINT_64 rightEyeOffsetFromBase = addrOut.addr;
addrIn.y = TestCoord[yIdx];
addrIn.pipeBankXor = pbXor;
addrIn.unalignedHeight = pIn->height;
ret = ComputeSurfaceAddrFromCoord(&addrIn, &addrOut);
ADDR_ASSERT(ret == ADDR_OK);
const UINT_64 rightEyeOffsetRelative = addrOut.addr;
ADDR_ASSERT(rightEyeOffsetFromBase == rightEyeOffsetRelative + pOut->pStereoInfo->rightOffset);
}
}
}
}
}
#endif
} // V2
} // Addr
} // rocr
runtime/hsa-runtime/image/addrlib/src/core/addrlib2.h
+178 -61
مشاهده پرونده
@@ -1,28 +1,28 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
/**
************************************************************************************************************************
@@ -37,40 +37,44 @@
#include "addrlib.h"
namespace rocr {
namespace Addr
{
namespace V2
{
namespace Addr {
namespace V2 {
/**
************************************************************************************************************************
* @brief Flags for SwizzleModeTable
************************************************************************************************************************
*/
struct SwizzleModeFlags
union SwizzleModeFlags
{
// Swizzle mode
UINT_32 isLinear : 1; // Linear
struct
{
// Swizzle mode
UINT_32 isLinear : 1; // Linear
// Block size
UINT_32 is256b : 1; // Block size is 256B
UINT_32 is4kb : 1; // Block size is 4KB
UINT_32 is64kb : 1; // Block size is 64KB
UINT_32 isVar : 1; // Block size is variable
// Block size
UINT_32 is256b : 1; // Block size is 256B
UINT_32 is4kb : 1; // Block size is 4KB
UINT_32 is64kb : 1; // Block size is 64KB
UINT_32 isVar : 1; // Block size is variable
UINT_32 isZ : 1; // Z order swizzle mode
UINT_32 isStd : 1; // Standard swizzle mode
UINT_32 isDisp : 1; // Display swizzle mode
UINT_32 isRot : 1; // Rotate swizzle mode
UINT_32 isZ : 1; // Z order swizzle mode
UINT_32 isStd : 1; // Standard swizzle mode
UINT_32 isDisp : 1; // Display swizzle mode
UINT_32 isRot : 1; // Rotate swizzle mode
// XOR mode
UINT_32 isXor : 1; // XOR after swizzle if set
// XOR mode
UINT_32 isXor : 1; // XOR after swizzle if set
UINT_32 isT : 1; // T mode
UINT_32 isT : 1; // T mode
UINT_32 isRtOpt : 1; // mode opt for render target
// GFX10
UINT_32 isRtOpt : 1; // mode opt for render target
UINT_32 reserved : 20; // Reserved bits
UINT_32 reserved : 20; // Reserved bits
};
UINT_32 u32All;
};
struct Dim2d
@@ -89,15 +93,18 @@ struct Dim3d
// Macro define resource block type
enum AddrBlockType
{
AddrBlockMicro = 0, // Resource uses 256B block
AddrBlockThin4KB = 1, // Resource uses thin 4KB block
AddrBlockThick4KB = 2, // Resource uses thick 4KB block
AddrBlockThin64KB = 3, // Resource uses thin 64KB block
AddrBlockThick64KB = 4, // Resource uses thick 64KB block
AddrBlockVar = 5, // Resource uses var block, only valid for GFX9
AddrBlockLinear = 6, // Resource uses linear swizzle mode
AddrBlockLinear = 0, // Resource uses linear swizzle mode
AddrBlockMicro = 1, // Resource uses 256B block
AddrBlockThin4KB = 2, // Resource uses thin 4KB block
AddrBlockThick4KB = 3, // Resource uses thick 4KB block
AddrBlockThin64KB = 4, // Resource uses thin 64KB block
AddrBlockThick64KB = 5, // Resource uses thick 64KB block
AddrBlockThinVar = 6, // Resource uses thin var block
AddrBlockThickVar = 7, // Resource uses thick var block
AddrBlockMaxTiledType,
AddrBlockMaxTiledType = AddrBlockVar + 1,
AddrBlockThin256KB = AddrBlockThinVar,
AddrBlockThick256KB = AddrBlockThickVar,
};
enum AddrSwSet
@@ -118,6 +125,87 @@ const UINT_32 Log2Size256 = 8u;
const UINT_32 Log2Size4K = 12u;
const UINT_32 Log2Size64K = 16u;
/**
************************************************************************************************************************
* @brief Bit setting for swizzle pattern
************************************************************************************************************************
*/
union ADDR_BIT_SETTING
{
struct
{
UINT_16 x;
UINT_16 y;
UINT_16 z;
UINT_16 s;
};
UINT_64 value;
};
/**
************************************************************************************************************************
* @brief Swizzle pattern information
************************************************************************************************************************
*/
struct ADDR_SW_PATINFO
{
UINT_8 maxItemCount;
UINT_8 nibble01Idx;
UINT_16 nibble2Idx;
UINT_16 nibble3Idx;
UINT_8 nibble4Idx;
};
/**
************************************************************************************************************************
* InitBit
*
* @brief
* Initialize bit setting value via a return value
************************************************************************************************************************
*/
#define InitBit(c, index) (1ull << ((c << 4) + index))
const UINT_64 X0 = InitBit(0, 0);
const UINT_64 X1 = InitBit(0, 1);
const UINT_64 X2 = InitBit(0, 2);
const UINT_64 X3 = InitBit(0, 3);
const UINT_64 X4 = InitBit(0, 4);
const UINT_64 X5 = InitBit(0, 5);
const UINT_64 X6 = InitBit(0, 6);
const UINT_64 X7 = InitBit(0, 7);
const UINT_64 X8 = InitBit(0, 8);
const UINT_64 X9 = InitBit(0, 9);
const UINT_64 X10 = InitBit(0, 10);
const UINT_64 X11 = InitBit(0, 11);
const UINT_64 Y0 = InitBit(1, 0);
const UINT_64 Y1 = InitBit(1, 1);
const UINT_64 Y2 = InitBit(1, 2);
const UINT_64 Y3 = InitBit(1, 3);
const UINT_64 Y4 = InitBit(1, 4);
const UINT_64 Y5 = InitBit(1, 5);
const UINT_64 Y6 = InitBit(1, 6);
const UINT_64 Y7 = InitBit(1, 7);
const UINT_64 Y8 = InitBit(1, 8);
const UINT_64 Y9 = InitBit(1, 9);
const UINT_64 Y10 = InitBit(1, 10);
const UINT_64 Y11 = InitBit(1, 11);
const UINT_64 Z0 = InitBit(2, 0);
const UINT_64 Z1 = InitBit(2, 1);
const UINT_64 Z2 = InitBit(2, 2);
const UINT_64 Z3 = InitBit(2, 3);
const UINT_64 Z4 = InitBit(2, 4);
const UINT_64 Z5 = InitBit(2, 5);
const UINT_64 Z6 = InitBit(2, 6);
const UINT_64 Z7 = InitBit(2, 7);
const UINT_64 Z8 = InitBit(2, 8);
const UINT_64 S0 = InitBit(3, 0);
const UINT_64 S1 = InitBit(3, 1);
const UINT_64 S2 = InitBit(3, 2);
/**
************************************************************************************************************************
* @brief This class contains asic independent address lib functionalities
@@ -209,6 +297,10 @@ public:
const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn,
ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT* pOut);
ADDR_E_RETURNCODE ComputeNonBlockCompressedView(
const ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT* pIn,
ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT* pOut);
ADDR_E_RETURNCODE Addr2GetPreferredSurfaceSetting(
const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn,
ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut) const;
@@ -237,11 +329,7 @@ protected:
BOOL_32 IsValidSwMode(AddrSwizzleMode swizzleMode) const
{
// Don't dereference a reinterpret_cast pointer so as not to break
// strict-aliasing rules.
UINT_32 mode;
memcpy(&mode, &m_swizzleModeTable[swizzleMode], sizeof(UINT_32));
return mode != 0;
return (m_swizzleModeTable[swizzleMode].u32All != 0);
}
// Checking block size
@@ -458,12 +546,18 @@ protected:
return ADDR_NOTSUPPORTED;
}
virtual ADDR_E_RETURNCODE HwlComputeDccAddrFromCoord(
virtual ADDR_E_RETURNCODE HwlSupportComputeDccAddrFromCoord(
const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn)
{
ADDR_NOT_IMPLEMENTED();
return ADDR_NOTSUPPORTED;
}
virtual VOID HwlComputeDccAddrFromCoord(
const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn,
ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut)
{
ADDR_NOT_IMPLEMENTED();
return ADDR_NOTSUPPORTED;
}
virtual ADDR_E_RETURNCODE HwlComputeCmaskAddrFromCoord(
@@ -559,6 +653,14 @@ protected:
return ADDR_NOTSUPPORTED;
}
virtual ADDR_E_RETURNCODE HwlComputeNonBlockCompressedView(
const ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT* pIn,
ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT* pOut) const
{
ADDR_NOT_IMPLEMENTED();
return ADDR_NOTSUPPORTED;
}
virtual ADDR_E_RETURNCODE HwlGetPreferredSurfaceSetting(
const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn,
ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut) const
@@ -822,6 +924,22 @@ protected:
AddrResourceType resourceType,
UINT_32 elemLog2) const;
static BOOL_32 IsBlockTypeAvaiable(ADDR2_BLOCK_SET blockSet, AddrBlockType blockType);
static BOOL_32 BlockTypeWithinMemoryBudget(
UINT_64 minSize,
UINT_64 newBlockTypeSize,
UINT_32 ratioLow,
UINT_32 ratioHi,
DOUBLE memoryBudget = 0.0f,
BOOL_32 newBlockTypeBigger = TRUE);
#if DEBUG
VOID ValidateStereoInfo(
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
const ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
#endif
UINT_32 m_se; ///< Number of shader engine
UINT_32 m_rbPerSe; ///< Number of render backend per shader engine
UINT_32 m_maxCompFrag; ///< Number of max compressed fragment
@@ -866,6 +984,5 @@ private:
} // Addr
} // rocr
#endif
runtime/hsa-runtime/image/addrlib/src/core/addrobject.cpp
+28 -28
مشاهده پرونده
@@ -1,28 +1,28 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
/**
****************************************************************************************************
@@ -35,8 +35,7 @@
#include "addrobject.h"
namespace rocr {
namespace Addr
{
namespace Addr {
/**
****************************************************************************************************
@@ -178,7 +177,8 @@ VOID Object::Free(
*/
VOID* Object::operator new(
size_t objSize, ///< [in] Size to allocate
VOID* pMem) ///< [in] Pre-allocated pointer
VOID* pMem ///< [in] Pre-allocated pointer
) noexcept
{
return pMem;
}
@@ -231,10 +231,10 @@ VOID Object::DebugPrint(
m_client.callbacks.debugPrint(&debugPrintInput);
va_end(ap);
va_end(debugPrintInput.ap);
}
#endif
}
} // Addr
} // rocr
runtime/hsa-runtime/image/addrlib/src/core/addrobject.h
+26 -28
مشاهده پرونده
@@ -1,28 +1,28 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
/**
****************************************************************************************************
@@ -38,8 +38,7 @@
#include "addrcommon.h"
namespace rocr {
namespace Addr
{
namespace Addr {
/**
****************************************************************************************************
@@ -63,7 +62,7 @@ public:
Object(const Client* pClient);
virtual ~Object();
VOID* operator new(size_t size, VOID* pMem);
VOID* operator new(size_t size, VOID* pMem) noexcept;
VOID operator delete(VOID* pObj);
/// Microsoft compiler requires a matching delete implementation, which seems to be called when
/// bad_alloc is thrown. But currently C++ exception isn't allowed so a dummy implementation is
@@ -95,4 +94,3 @@ private:
} // rocr
#endif
runtime/hsa-runtime/image/addrlib/src/core/coord.cpp
+25 -29
مشاهده پرونده
@@ -1,39 +1,36 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
// Coordinate class implementation
#include "addrcommon.h"
#include "coord.h"
namespace rocr {
namespace Addr
{
namespace V2
{
namespace Addr {
namespace V2 {
Coordinate::Coordinate()
{
@@ -604,4 +601,3 @@ BOOL_32 CoordEq::operator!=(const CoordEq& b)
} // V2
} // Addr
} // rocr
runtime/hsa-runtime/image/addrlib/src/core/coord.h
+40 -29
مشاهده پرونده
@@ -1,28 +1,27 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
// Class used to define a coordinate bit
@@ -30,12 +29,25 @@
#define __COORD_H
namespace rocr {
namespace Addr
{
namespace V2
{
namespace Addr {
namespace V2 {
#if defined(__cplusplus)
#if defined(_MSC_VER)
#if _MSC_VER >= 1900
#define ADDR_CPP11_COMPILER TRUE
#endif
#else
#if __cplusplus >= 201103L
#define ADDR_CPP11_COMPILER TRUE
#endif
#endif
#endif
#if defined(ADDR_CPP11_COMPILER)
enum Dim : INT_8
#else
enum Dim
#endif
{
DIM_X,
DIM_Y,
@@ -130,6 +142,5 @@ private:
} // Addr
} // rocr
#endif
runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10SwizzlePattern.h
+95 -180
مشاهده پرونده
@@ -1,28 +1,27 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
/**
************************************************************************************************************************
@@ -35,92 +34,10 @@
#define __GFX10_SWIZZLE_PATTERN_H__
namespace rocr {
namespace Addr
{
namespace V2
{
/**
************************************************************************************************************************
* @brief Bit setting for swizzle pattern
************************************************************************************************************************
*/
union ADDR_BIT_SETTING
{
struct
{
UINT_16 x;
UINT_16 y;
UINT_16 z;
UINT_16 s;
};
UINT_64 value;
};
namespace Addr {
namespace V2 {
/**
************************************************************************************************************************
* @brief Swizzle pattern information
************************************************************************************************************************
*/
struct ADDR_SW_PATINFO
{
UINT_8 maxItemCount;
UINT_8 nibble01Idx;
UINT_16 nibble2Idx;
UINT_16 nibble3Idx;
UINT_8 nibble4Idx;
};
/**
************************************************************************************************************************
* InitBit
*
* @brief
* Initialize bit setting value via a return value
************************************************************************************************************************
*/
#define InitBit(c, index) (1ull << ((c << 4) + index))
const UINT_64 X0 = InitBit(0, 0);
const UINT_64 X1 = InitBit(0, 1);
const UINT_64 X2 = InitBit(0, 2);
const UINT_64 X3 = InitBit(0, 3);
const UINT_64 X4 = InitBit(0, 4);
const UINT_64 X5 = InitBit(0, 5);
const UINT_64 X6 = InitBit(0, 6);
const UINT_64 X7 = InitBit(0, 7);
const UINT_64 X8 = InitBit(0, 8);
const UINT_64 X9 = InitBit(0, 9);
const UINT_64 X10 = InitBit(0, 10);
const UINT_64 X11 = InitBit(0, 11);
const UINT_64 Y0 = InitBit(1, 0);
const UINT_64 Y1 = InitBit(1, 1);
const UINT_64 Y2 = InitBit(1, 2);
const UINT_64 Y3 = InitBit(1, 3);
const UINT_64 Y4 = InitBit(1, 4);
const UINT_64 Y5 = InitBit(1, 5);
const UINT_64 Y6 = InitBit(1, 6);
const UINT_64 Y7 = InitBit(1, 7);
const UINT_64 Y8 = InitBit(1, 8);
const UINT_64 Y9 = InitBit(1, 9);
const UINT_64 Y10 = InitBit(1, 10);
const UINT_64 Y11 = InitBit(1, 11);
const UINT_64 Z0 = InitBit(2, 0);
const UINT_64 Z1 = InitBit(2, 1);
const UINT_64 Z2 = InitBit(2, 2);
const UINT_64 Z3 = InitBit(2, 3);
const UINT_64 Z4 = InitBit(2, 4);
const UINT_64 Z5 = InitBit(2, 5);
const UINT_64 Z6 = InitBit(2, 6);
const UINT_64 Z7 = InitBit(2, 7);
const UINT_64 Z8 = InitBit(2, 8);
const UINT_64 S0 = InitBit(3, 0);
const UINT_64 S1 = InitBit(3, 1);
const UINT_64 S2 = InitBit(3, 2);
const ADDR_SW_PATINFO SW_256_S_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_256_S_PATINFO[] =
{
{ 1, 0, 0, 0, 0, } , // 1 pipes 1 bpe @ SW_256_S @ Navi1x
{ 1, 1, 0, 0, 0, } , // 1 pipes 2 bpe @ SW_256_S @ Navi1x
@@ -159,7 +76,7 @@ const ADDR_SW_PATINFO SW_256_S_PATINFO[] =
{ 1, 4, 0, 0, 0, } , // 64 pipes 16 bpe @ SW_256_S @ Navi1x
};
const ADDR_SW_PATINFO SW_256_D_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_256_D_PATINFO[] =
{
{ 1, 5, 0, 0, 0, } , // 1 pipes 1 bpe @ SW_256_D @ Navi1x
{ 1, 1, 0, 0, 0, } , // 1 pipes 2 bpe @ SW_256_D @ Navi1x
@@ -198,7 +115,7 @@ const ADDR_SW_PATINFO SW_256_D_PATINFO[] =
{ 1, 7, 0, 0, 0, } , // 64 pipes 16 bpe @ SW_256_D @ Navi1x
};
const ADDR_SW_PATINFO SW_4K_S_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_4K_S_PATINFO[] =
{
{ 1, 0, 1, 0, 0, } , // 1 pipes 1 bpe @ SW_4K_S @ Navi1x
{ 1, 1, 2, 0, 0, } , // 1 pipes 2 bpe @ SW_4K_S @ Navi1x
@@ -237,7 +154,7 @@ const ADDR_SW_PATINFO SW_4K_S_PATINFO[] =
{ 1, 4, 5, 0, 0, } , // 64 pipes 16 bpe @ SW_4K_S @ Navi1x
};
const ADDR_SW_PATINFO SW_4K_D_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_4K_D_PATINFO[] =
{
{ 1, 5, 1, 0, 0, } , // 1 pipes 1 bpe @ SW_4K_D @ Navi1x
{ 1, 1, 2, 0, 0, } , // 1 pipes 2 bpe @ SW_4K_D @ Navi1x
@@ -276,7 +193,7 @@ const ADDR_SW_PATINFO SW_4K_D_PATINFO[] =
{ 1, 7, 5, 0, 0, } , // 64 pipes 16 bpe @ SW_4K_D @ Navi1x
};
const ADDR_SW_PATINFO SW_4K_S_X_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_4K_S_X_PATINFO[] =
{
{ 1, 0, 1, 0, 0, } , // 1 pipes 1 bpe @ SW_4K_S_X @ Navi1x
{ 1, 1, 2, 0, 0, } , // 1 pipes 2 bpe @ SW_4K_S_X @ Navi1x
@@ -315,7 +232,7 @@ const ADDR_SW_PATINFO SW_4K_S_X_PATINFO[] =
{ 3, 4, 25, 0, 0, } , // 64 pipes 16 bpe @ SW_4K_S_X @ Navi1x
};
const ADDR_SW_PATINFO SW_4K_D_X_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_4K_D_X_PATINFO[] =
{
{ 1, 5, 1, 0, 0, } , // 1 pipes 1 bpe @ SW_4K_D_X @ Navi1x
{ 1, 1, 2, 0, 0, } , // 1 pipes 2 bpe @ SW_4K_D_X @ Navi1x
@@ -354,7 +271,7 @@ const ADDR_SW_PATINFO SW_4K_D_X_PATINFO[] =
{ 3, 7, 25, 0, 0, } , // 64 pipes 16 bpe @ SW_4K_D_X @ Navi1x
};
const ADDR_SW_PATINFO SW_4K_S3_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_4K_S3_PATINFO[] =
{
{ 1, 29, 131, 0, 0, } , // 1 pipes 1 bpe @ SW_4K_S3 @ Navi1x
{ 1, 30, 132, 0, 0, } , // 1 pipes 2 bpe @ SW_4K_S3 @ Navi1x
@@ -393,7 +310,7 @@ const ADDR_SW_PATINFO SW_4K_S3_PATINFO[] =
{ 1, 33, 135, 0, 0, } , // 64 pipes 16 bpe @ SW_4K_S3 @ Navi1x
};
const ADDR_SW_PATINFO SW_4K_S3_X_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_4K_S3_X_PATINFO[] =
{
{ 1, 29, 131, 0, 0, } , // 1 pipes 1 bpe @ SW_4K_S3_X @ Navi1x
{ 1, 30, 132, 0, 0, } , // 1 pipes 2 bpe @ SW_4K_S3_X @ Navi1x
@@ -432,7 +349,7 @@ const ADDR_SW_PATINFO SW_4K_S3_X_PATINFO[] =
{ 3, 33, 155, 0, 0, } , // 64 pipes 16 bpe @ SW_4K_S3_X @ Navi1x
};
const ADDR_SW_PATINFO SW_64K_S_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_S_PATINFO[] =
{
{ 1, 0, 1, 1, 0, } , // 1 pipes 1 bpe @ SW_64K_S @ Navi1x
{ 1, 1, 2, 2, 0, } , // 1 pipes 2 bpe @ SW_64K_S @ Navi1x
@@ -471,7 +388,7 @@ const ADDR_SW_PATINFO SW_64K_S_PATINFO[] =
{ 1, 4, 5, 5, 0, } , // 64 pipes 16 bpe @ SW_64K_S @ Navi1x
};
const ADDR_SW_PATINFO SW_64K_D_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_D_PATINFO[] =
{
{ 1, 5, 1, 1, 0, } , // 1 pipes 1 bpe @ SW_64K_D @ Navi1x
{ 1, 1, 2, 2, 0, } , // 1 pipes 2 bpe @ SW_64K_D @ Navi1x
@@ -510,7 +427,7 @@ const ADDR_SW_PATINFO SW_64K_D_PATINFO[] =
{ 1, 7, 5, 5, 0, } , // 64 pipes 16 bpe @ SW_64K_D @ Navi1x
};
const ADDR_SW_PATINFO SW_64K_S_T_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_S_T_PATINFO[] =
{
{ 1, 0, 1, 1, 0, } , // 1 pipes 1 bpe @ SW_64K_S_T @ Navi1x
{ 1, 1, 2, 2, 0, } , // 1 pipes 2 bpe @ SW_64K_S_T @ Navi1x
@@ -549,7 +466,7 @@ const ADDR_SW_PATINFO SW_64K_S_T_PATINFO[] =
{ 2, 4, 5, 25, 0, } , // 64 pipes 16 bpe @ SW_64K_S_T @ Navi1x
};
const ADDR_SW_PATINFO SW_64K_D_T_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_D_T_PATINFO[] =
{
{ 1, 5, 1, 1, 0, } , // 1 pipes 1 bpe @ SW_64K_D_T @ Navi1x
{ 1, 1, 2, 2, 0, } , // 1 pipes 2 bpe @ SW_64K_D_T @ Navi1x
@@ -588,7 +505,7 @@ const ADDR_SW_PATINFO SW_64K_D_T_PATINFO[] =
{ 2, 7, 5, 25, 0, } , // 64 pipes 16 bpe @ SW_64K_D_T @ Navi1x
};
const ADDR_SW_PATINFO SW_64K_S_X_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_S_X_PATINFO[] =
{
{ 1, 0, 1, 1, 0, } , // 1 pipes 1 bpe @ SW_64K_S_X @ Navi1x
{ 1, 1, 2, 2, 0, } , // 1 pipes 2 bpe @ SW_64K_S_X @ Navi1x
@@ -627,7 +544,7 @@ const ADDR_SW_PATINFO SW_64K_S_X_PATINFO[] =
{ 3, 4, 35, 15, 0, } , // 64 pipes 16 bpe @ SW_64K_S_X @ Navi1x
};
const ADDR_SW_PATINFO SW_64K_D_X_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_D_X_PATINFO[] =
{
{ 1, 5, 1, 1, 0, } , // 1 pipes 1 bpe @ SW_64K_D_X @ Navi1x
{ 1, 1, 2, 2, 0, } , // 1 pipes 2 bpe @ SW_64K_D_X @ Navi1x
@@ -666,7 +583,7 @@ const ADDR_SW_PATINFO SW_64K_D_X_PATINFO[] =
{ 3, 7, 35, 15, 0, } , // 64 pipes 16 bpe @ SW_64K_D_X @ Navi1x
};
const ADDR_SW_PATINFO SW_64K_R_X_1xaa_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_R_X_1xaa_PATINFO[] =
{
{ 1, 5, 1, 1, 0, } , // 1 pipes 1 bpe @ SW_64K_R_X 1xaa @ Navi1x
{ 1, 1, 2, 2, 0, } , // 1 pipes 2 bpe @ SW_64K_R_X 1xaa @ Navi1x
@@ -705,7 +622,7 @@ const ADDR_SW_PATINFO SW_64K_R_X_1xaa_PATINFO[] =
{ 3, 7, 79, 41, 0, } , // 64 pipes 16 bpe @ SW_64K_R_X 1xaa @ Navi1x
};
const ADDR_SW_PATINFO SW_64K_R_X_2xaa_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_R_X_2xaa_PATINFO[] =
{
{ 2, 5, 1, 99, 0, } , // 1 pipes 1 bpe @ SW_64K_R_X 2xaa @ Navi1x
{ 2, 1, 2, 100, 0, } , // 1 pipes 2 bpe @ SW_64K_R_X 2xaa @ Navi1x
@@ -744,7 +661,7 @@ const ADDR_SW_PATINFO SW_64K_R_X_2xaa_PATINFO[] =
{ 3, 7, 115, 41, 0, } , // 64 pipes 16 bpe @ SW_64K_R_X 2xaa @ Navi1x
};
const ADDR_SW_PATINFO SW_64K_R_X_4xaa_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_R_X_4xaa_PATINFO[] =
{
{ 2, 5, 1, 118, 0, } , // 1 pipes 1 bpe @ SW_64K_R_X 4xaa @ Navi1x
{ 2, 1, 2, 119, 0, } , // 1 pipes 2 bpe @ SW_64K_R_X 4xaa @ Navi1x
@@ -783,7 +700,7 @@ const ADDR_SW_PATINFO SW_64K_R_X_4xaa_PATINFO[] =
{ 3, 7, 122, 41, 0, } , // 64 pipes 16 bpe @ SW_64K_R_X 4xaa @ Navi1x
};
const ADDR_SW_PATINFO SW_64K_R_X_8xaa_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_R_X_8xaa_PATINFO[] =
{
{ 2, 5, 1, 134, 0, } , // 1 pipes 1 bpe @ SW_64K_R_X 8xaa @ Navi1x
{ 2, 1, 2, 135, 0, } , // 1 pipes 2 bpe @ SW_64K_R_X 8xaa @ Navi1x
@@ -822,7 +739,7 @@ const ADDR_SW_PATINFO SW_64K_R_X_8xaa_PATINFO[] =
{ 3, 7, 130, 147, 0, } , // 64 pipes 16 bpe @ SW_64K_R_X 8xaa @ Navi1x
};
const ADDR_SW_PATINFO SW_64K_Z_X_1xaa_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_Z_X_1xaa_PATINFO[] =
{
{ 1, 8, 1, 1, 0, } , // 1 pipes 1 bpe @ SW_64K_Z_X 1xaa @ Navi1x
{ 1, 9, 2, 2, 0, } , // 1 pipes 2 bpe @ SW_64K_Z_X 1xaa @ Navi1x
@@ -861,7 +778,7 @@ const ADDR_SW_PATINFO SW_64K_Z_X_1xaa_PATINFO[] =
{ 3, 7, 79, 41, 0, } , // 64 pipes 16 bpe @ SW_64K_Z_X 1xaa @ Navi1x
};
const ADDR_SW_PATINFO SW_64K_Z_X_2xaa_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_Z_X_2xaa_PATINFO[] =
{
{ 1, 13, 80, 42, 0, } , // 1 pipes 1 bpe @ SW_64K_Z_X 2xaa @ Navi1x
{ 1, 14, 3, 3, 0, } , // 1 pipes 2 bpe @ SW_64K_Z_X 2xaa @ Navi1x
@@ -900,7 +817,7 @@ const ADDR_SW_PATINFO SW_64K_Z_X_2xaa_PATINFO[] =
{ 3, 17, 89, 61, 0, } , // 64 pipes 16 bpe @ SW_64K_Z_X 2xaa @ Navi1x
};
const ADDR_SW_PATINFO SW_64K_Z_X_4xaa_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_Z_X_4xaa_PATINFO[] =
{
{ 1, 18, 3, 3, 0, } , // 1 pipes 1 bpe @ SW_64K_Z_X 4xaa @ Navi1x
{ 2, 19, 90, 62, 0, } , // 1 pipes 2 bpe @ SW_64K_Z_X 4xaa @ Navi1x
@@ -939,7 +856,7 @@ const ADDR_SW_PATINFO SW_64K_Z_X_4xaa_PATINFO[] =
{ 3, 22, 100, 82, 0, } , // 64 pipes 16 bpe @ SW_64K_Z_X 4xaa @ Navi1x
};
const ADDR_SW_PATINFO SW_64K_Z_X_8xaa_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_Z_X_8xaa_PATINFO[] =
{
{ 2, 23, 3, 43, 0, } , // 1 pipes 1 bpe @ SW_64K_Z_X 8xaa @ Navi1x
{ 2, 24, 3, 63, 0, } , // 1 pipes 2 bpe @ SW_64K_Z_X 8xaa @ Navi1x
@@ -978,7 +895,7 @@ const ADDR_SW_PATINFO SW_64K_Z_X_8xaa_PATINFO[] =
{ 3, 27, 112, 98, 0, } , // 64 pipes 16 bpe @ SW_64K_Z_X 8xaa @ Navi1x
};
const ADDR_SW_PATINFO SW_64K_S3_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_S3_PATINFO[] =
{
{ 1, 29, 131, 148, 0, } , // 1 pipes 1 bpe @ SW_64K_S3 @ Navi1x
{ 1, 30, 132, 149, 0, } , // 1 pipes 2 bpe @ SW_64K_S3 @ Navi1x
@@ -1017,7 +934,7 @@ const ADDR_SW_PATINFO SW_64K_S3_PATINFO[] =
{ 1, 33, 135, 152, 0, } , // 64 pipes 16 bpe @ SW_64K_S3 @ Navi1x
};
const ADDR_SW_PATINFO SW_64K_S3_X_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_S3_X_PATINFO[] =
{
{ 1, 29, 131, 148, 0, } , // 1 pipes 1 bpe @ SW_64K_S3_X @ Navi1x
{ 1, 30, 132, 149, 0, } , // 1 pipes 2 bpe @ SW_64K_S3_X @ Navi1x
@@ -1056,7 +973,7 @@ const ADDR_SW_PATINFO SW_64K_S3_X_PATINFO[] =
{ 3, 33, 165, 162, 0, } , // 64 pipes 16 bpe @ SW_64K_S3_X @ Navi1x
};
const ADDR_SW_PATINFO SW_64K_S3_T_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_S3_T_PATINFO[] =
{
{ 1, 29, 131, 148, 0, } , // 1 pipes 1 bpe @ SW_64K_S3_T @ Navi1x
{ 1, 30, 132, 149, 0, } , // 1 pipes 2 bpe @ SW_64K_S3_T @ Navi1x
@@ -1095,7 +1012,7 @@ const ADDR_SW_PATINFO SW_64K_S3_T_PATINFO[] =
{ 3, 33, 135, 167, 0, } , // 64 pipes 16 bpe @ SW_64K_S3_T @ Navi1x
};
const ADDR_SW_PATINFO SW_64K_D3_X_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_D3_X_PATINFO[] =
{
{ 1, 34, 131, 148, 0, } , // 1 pipes 1 bpe @ SW_64K_D3_X @ Navi1x
{ 1, 35, 132, 149, 0, } , // 1 pipes 2 bpe @ SW_64K_D3_X @ Navi1x
@@ -1134,7 +1051,7 @@ const ADDR_SW_PATINFO SW_64K_D3_X_PATINFO[] =
{ 3, 38, 209, 182, 0, } , // 64 pipes 16 bpe @ SW_64K_D3_X @ Navi1x
};
const ADDR_SW_PATINFO SW_256_S_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_256_S_RBPLUS_PATINFO[] =
{
{ 1, 0, 0, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256_S @ RbPlus
{ 1, 1, 0, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256_S @ RbPlus
@@ -1213,7 +1130,7 @@ const ADDR_SW_PATINFO SW_256_S_RBPLUS_PATINFO[] =
{ 1, 4, 0, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256_S @ RbPlus
};
const ADDR_SW_PATINFO SW_256_D_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_256_D_RBPLUS_PATINFO[] =
{
{ 1, 5, 0, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_256_D @ RbPlus
{ 1, 1, 0, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_256_D @ RbPlus
@@ -1292,7 +1209,7 @@ const ADDR_SW_PATINFO SW_256_D_RBPLUS_PATINFO[] =
{ 1, 7, 0, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_256_D @ RbPlus
};
const ADDR_SW_PATINFO SW_4K_S_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_4K_S_RBPLUS_PATINFO[] =
{
{ 1, 0, 1, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_S @ RbPlus
{ 1, 1, 2, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_S @ RbPlus
@@ -1371,7 +1288,7 @@ const ADDR_SW_PATINFO SW_4K_S_RBPLUS_PATINFO[] =
{ 1, 4, 5, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_S @ RbPlus
};
const ADDR_SW_PATINFO SW_4K_D_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_4K_D_RBPLUS_PATINFO[] =
{
{ 1, 5, 1, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_D @ RbPlus
{ 1, 1, 2, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_D @ RbPlus
@@ -1450,7 +1367,7 @@ const ADDR_SW_PATINFO SW_4K_D_RBPLUS_PATINFO[] =
{ 1, 7, 5, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_D @ RbPlus
};
const ADDR_SW_PATINFO SW_4K_S_X_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_4K_S_X_RBPLUS_PATINFO[] =
{
{ 1, 0, 1, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_S_X @ RbPlus
{ 1, 1, 2, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_S_X @ RbPlus
@@ -1529,7 +1446,7 @@ const ADDR_SW_PATINFO SW_4K_S_X_RBPLUS_PATINFO[] =
{ 3, 4, 244, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_S_X @ RbPlus
};
const ADDR_SW_PATINFO SW_4K_D_X_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_4K_D_X_RBPLUS_PATINFO[] =
{
{ 1, 5, 1, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_D_X @ RbPlus
{ 1, 1, 2, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_D_X @ RbPlus
@@ -1608,7 +1525,7 @@ const ADDR_SW_PATINFO SW_4K_D_X_RBPLUS_PATINFO[] =
{ 3, 7, 244, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_D_X @ RbPlus
};
const ADDR_SW_PATINFO SW_4K_S3_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_4K_S3_RBPLUS_PATINFO[] =
{
{ 1, 29, 131, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_S3 @ RbPlus
{ 1, 30, 132, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_S3 @ RbPlus
@@ -1687,7 +1604,7 @@ const ADDR_SW_PATINFO SW_4K_S3_RBPLUS_PATINFO[] =
{ 1, 33, 135, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_S3 @ RbPlus
};
const ADDR_SW_PATINFO SW_4K_S3_X_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_4K_S3_X_RBPLUS_PATINFO[] =
{
{ 1, 29, 131, 0, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_4K_S3_X @ RbPlus
{ 1, 30, 132, 0, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_4K_S3_X @ RbPlus
@@ -1766,7 +1683,7 @@ const ADDR_SW_PATINFO SW_4K_S3_X_RBPLUS_PATINFO[] =
{ 3, 33, 155, 0, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_4K_S3_X @ RbPlus
};
const ADDR_SW_PATINFO SW_64K_S_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_S_RBPLUS_PATINFO[] =
{
{ 1, 0, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S @ RbPlus
{ 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S @ RbPlus
@@ -1845,7 +1762,7 @@ const ADDR_SW_PATINFO SW_64K_S_RBPLUS_PATINFO[] =
{ 1, 4, 5, 5, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S @ RbPlus
};
const ADDR_SW_PATINFO SW_64K_D_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_D_RBPLUS_PATINFO[] =
{
{ 1, 5, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_D @ RbPlus
{ 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_D @ RbPlus
@@ -1924,7 +1841,7 @@ const ADDR_SW_PATINFO SW_64K_D_RBPLUS_PATINFO[] =
{ 1, 7, 5, 5, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_D @ RbPlus
};
const ADDR_SW_PATINFO SW_64K_S_T_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_S_T_RBPLUS_PATINFO[] =
{
{ 1, 0, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S_T @ RbPlus
{ 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S_T @ RbPlus
@@ -2003,7 +1920,7 @@ const ADDR_SW_PATINFO SW_64K_S_T_RBPLUS_PATINFO[] =
{ 2, 4, 5, 25, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S_T @ RbPlus
};
const ADDR_SW_PATINFO SW_64K_D_T_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_D_T_RBPLUS_PATINFO[] =
{
{ 1, 5, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_D_T @ RbPlus
{ 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_D_T @ RbPlus
@@ -2082,7 +1999,7 @@ const ADDR_SW_PATINFO SW_64K_D_T_RBPLUS_PATINFO[] =
{ 2, 7, 5, 25, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_D_T @ RbPlus
};
const ADDR_SW_PATINFO SW_64K_S_X_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_S_X_RBPLUS_PATINFO[] =
{
{ 1, 0, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S_X @ RbPlus
{ 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S_X @ RbPlus
@@ -2161,7 +2078,7 @@ const ADDR_SW_PATINFO SW_64K_S_X_RBPLUS_PATINFO[] =
{ 3, 4, 269, 15, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S_X @ RbPlus
};
const ADDR_SW_PATINFO SW_64K_D_X_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_D_X_RBPLUS_PATINFO[] =
{
{ 1, 5, 1, 1, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_D_X @ RbPlus
{ 1, 1, 2, 2, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_D_X @ RbPlus
@@ -2240,7 +2157,7 @@ const ADDR_SW_PATINFO SW_64K_D_X_RBPLUS_PATINFO[] =
{ 3, 7, 269, 15, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_D_X @ RbPlus
};
const ADDR_SW_PATINFO SW_64K_R_X_1xaa_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_R_X_1xaa_RBPLUS_PATINFO[] =
{
{ 2, 0, 347, 193, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_R_X 1xaa @ RbPlus
{ 2, 1, 348, 366, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_R_X 1xaa @ RbPlus
@@ -2319,7 +2236,7 @@ const ADDR_SW_PATINFO SW_64K_R_X_1xaa_RBPLUS_PATINFO[] =
{ 3, 7, 324, 414, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_R_X 1xaa @ RbPlus
};
const ADDR_SW_PATINFO SW_64K_R_X_2xaa_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_R_X_2xaa_RBPLUS_PATINFO[] =
{
{ 3, 0, 424, 526, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_R_X 2xaa @ RbPlus
{ 3, 1, 348, 527, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_R_X 2xaa @ RbPlus
@@ -2398,7 +2315,7 @@ const ADDR_SW_PATINFO SW_64K_R_X_2xaa_RBPLUS_PATINFO[] =
{ 3, 7, 429, 414, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_R_X 2xaa @ RbPlus
};
const ADDR_SW_PATINFO SW_64K_R_X_4xaa_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_R_X_4xaa_RBPLUS_PATINFO[] =
{
{ 3, 0, 347, 566, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_R_X 4xaa @ RbPlus
{ 3, 1, 348, 733, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_R_X 4xaa @ RbPlus
@@ -2477,7 +2394,7 @@ const ADDR_SW_PATINFO SW_64K_R_X_4xaa_RBPLUS_PATINFO[] =
{ 3, 7, 441, 414, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_R_X 4xaa @ RbPlus
};
const ADDR_SW_PATINFO SW_64K_R_X_8xaa_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_R_X_8xaa_RBPLUS_PATINFO[] =
{
{ 3, 0, 424, 619, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_R_X 8xaa @ RbPlus
{ 3, 1, 348, 620, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_R_X 8xaa @ RbPlus
@@ -2556,7 +2473,7 @@ const ADDR_SW_PATINFO SW_64K_R_X_8xaa_RBPLUS_PATINFO[] =
{ 3, 7, 458, 414, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_R_X 8xaa @ RbPlus
};
const ADDR_SW_PATINFO SW_64K_Z_X_1xaa_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_Z_X_1xaa_RBPLUS_PATINFO[] =
{
{ 2, 8, 347, 193, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_Z_X 1xaa @ RbPlus
{ 2, 9, 348, 366, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_Z_X 1xaa @ RbPlus
@@ -2635,7 +2552,7 @@ const ADDR_SW_PATINFO SW_64K_Z_X_1xaa_RBPLUS_PATINFO[] =
{ 3, 7, 324, 414, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_Z_X 1xaa @ RbPlus
};
const ADDR_SW_PATINFO SW_64K_Z_X_2xaa_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_Z_X_2xaa_RBPLUS_PATINFO[] =
{
{ 2, 13, 357, 415, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_Z_X 2xaa @ RbPlus
{ 2, 14, 349, 195, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_Z_X 2xaa @ RbPlus
@@ -2714,7 +2631,7 @@ const ADDR_SW_PATINFO SW_64K_Z_X_2xaa_RBPLUS_PATINFO[] =
{ 3, 17, 367, 414, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_Z_X 2xaa @ RbPlus
};
const ADDR_SW_PATINFO SW_64K_Z_X_4xaa_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_Z_X_4xaa_RBPLUS_PATINFO[] =
{
{ 2, 18, 349, 195, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_Z_X 4xaa @ RbPlus
{ 3, 19, 349, 447, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_Z_X 4xaa @ RbPlus
@@ -2793,7 +2710,7 @@ const ADDR_SW_PATINFO SW_64K_Z_X_4xaa_RBPLUS_PATINFO[] =
{ 3, 22, 377, 414, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_Z_X 4xaa @ RbPlus
};
const ADDR_SW_PATINFO SW_64K_Z_X_8xaa_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_Z_X_8xaa_RBPLUS_PATINFO[] =
{
{ 3, 23, 358, 263, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_Z_X 8xaa @ RbPlus
{ 3, 24, 349, 448, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_Z_X 8xaa @ RbPlus
@@ -2872,7 +2789,7 @@ const ADDR_SW_PATINFO SW_64K_Z_X_8xaa_RBPLUS_PATINFO[] =
{ 3, 27, 393, 414, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_Z_X 8xaa @ RbPlus
};
const ADDR_SW_PATINFO SW_64K_S3_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_S3_RBPLUS_PATINFO[] =
{
{ 1, 29, 131, 148, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S3 @ RbPlus
{ 1, 30, 132, 149, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S3 @ RbPlus
@@ -2951,7 +2868,7 @@ const ADDR_SW_PATINFO SW_64K_S3_RBPLUS_PATINFO[] =
{ 1, 33, 135, 152, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S3 @ RbPlus
};
const ADDR_SW_PATINFO SW_64K_S3_X_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_S3_X_RBPLUS_PATINFO[] =
{
{ 1, 29, 131, 148, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S3_X @ RbPlus
{ 1, 30, 132, 149, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S3_X @ RbPlus
@@ -3030,7 +2947,7 @@ const ADDR_SW_PATINFO SW_64K_S3_X_RBPLUS_PATINFO[] =
{ 3, 33, 165, 162, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S3_X @ RbPlus
};
const ADDR_SW_PATINFO SW_64K_S3_T_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_S3_T_RBPLUS_PATINFO[] =
{
{ 1, 29, 131, 148, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_S3_T @ RbPlus
{ 1, 30, 132, 149, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_S3_T @ RbPlus
@@ -3109,7 +3026,7 @@ const ADDR_SW_PATINFO SW_64K_S3_T_RBPLUS_PATINFO[] =
{ 3, 33, 135, 167, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_S3_T @ RbPlus
};
const ADDR_SW_PATINFO SW_64K_D3_X_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_64K_D3_X_RBPLUS_PATINFO[] =
{
{ 1, 34, 131, 148, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_64K_D3_X @ RbPlus
{ 1, 35, 132, 149, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_64K_D3_X @ RbPlus
@@ -3188,7 +3105,7 @@ const ADDR_SW_PATINFO SW_64K_D3_X_RBPLUS_PATINFO[] =
{ 4, 38, 509, 841, 0, } , // 64 pipes (32 PKRs) 16 bpe @ SW_64K_D3_X @ RbPlus
};
const ADDR_SW_PATINFO SW_VAR_R_X_1xaa_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_VAR_R_X_1xaa_RBPLUS_PATINFO[] =
{
{ 2, 0, 270, 183, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_VAR_R_X 1xaa @ RbPlus
{ 2, 1, 271, 184, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_VAR_R_X 1xaa @ RbPlus
@@ -3267,7 +3184,7 @@ const ADDR_SW_PATINFO SW_VAR_R_X_1xaa_RBPLUS_PATINFO[] =
{ 3, 7, 311, 254, 44, } , // 64 pipes (32 PKRs) 16 bpe @ SW_VAR_R_X 1xaa @ RbPlus
};
const ADDR_SW_PATINFO SW_VAR_R_X_2xaa_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_VAR_R_X_2xaa_RBPLUS_PATINFO[] =
{
{ 3, 0, 403, 516, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_VAR_R_X 2xaa @ RbPlus
{ 3, 1, 271, 517, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_VAR_R_X 2xaa @ RbPlus
@@ -3346,7 +3263,7 @@ const ADDR_SW_PATINFO SW_VAR_R_X_2xaa_RBPLUS_PATINFO[] =
{ 3, 7, 318, 290, 158, } , // 64 pipes (32 PKRs) 16 bpe @ SW_VAR_R_X 2xaa @ RbPlus
};
const ADDR_SW_PATINFO SW_VAR_R_X_4xaa_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_VAR_R_X_4xaa_RBPLUS_PATINFO[] =
{
{ 3, 0, 270, 556, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_VAR_R_X 4xaa @ RbPlus
{ 3, 1, 271, 557, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_VAR_R_X 4xaa @ RbPlus
@@ -3425,7 +3342,7 @@ const ADDR_SW_PATINFO SW_VAR_R_X_4xaa_RBPLUS_PATINFO[] =
{ 3, 7, 324, 328, 204, } , // 64 pipes (32 PKRs) 16 bpe @ SW_VAR_R_X 4xaa @ RbPlus
};
const ADDR_SW_PATINFO SW_VAR_R_X_8xaa_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_VAR_R_X_8xaa_RBPLUS_PATINFO[] =
{
{ 3, 0, 407, 610, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_VAR_R_X 8xaa @ RbPlus
{ 3, 1, 408, 611, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_VAR_R_X 8xaa @ RbPlus
@@ -3504,7 +3421,7 @@ const ADDR_SW_PATINFO SW_VAR_R_X_8xaa_RBPLUS_PATINFO[] =
{ 3, 7, 344, 668, 204, } , // 64 pipes (32 PKRs) 16 bpe @ SW_VAR_R_X 8xaa @ RbPlus
};
const ADDR_SW_PATINFO SW_VAR_Z_X_1xaa_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_VAR_Z_X_1xaa_RBPLUS_PATINFO[] =
{
{ 2, 8, 270, 183, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_VAR_Z_X 1xaa @ RbPlus
{ 2, 9, 271, 184, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_VAR_Z_X 1xaa @ RbPlus
@@ -3583,7 +3500,7 @@ const ADDR_SW_PATINFO SW_VAR_Z_X_1xaa_RBPLUS_PATINFO[] =
{ 3, 7, 311, 254, 44, } , // 64 pipes (32 PKRs) 16 bpe @ SW_VAR_Z_X 1xaa @ RbPlus
};
const ADDR_SW_PATINFO SW_VAR_Z_X_2xaa_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_VAR_Z_X_2xaa_RBPLUS_PATINFO[] =
{
{ 2, 13, 312, 255, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_VAR_Z_X 2xaa @ RbPlus
{ 2, 14, 272, 185, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_VAR_Z_X 2xaa @ RbPlus
@@ -3662,7 +3579,7 @@ const ADDR_SW_PATINFO SW_VAR_Z_X_2xaa_RBPLUS_PATINFO[] =
{ 3, 17, 318, 290, 65, } , // 64 pipes (32 PKRs) 16 bpe @ SW_VAR_Z_X 2xaa @ RbPlus
};
const ADDR_SW_PATINFO SW_VAR_Z_X_4xaa_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_VAR_Z_X_4xaa_RBPLUS_PATINFO[] =
{
{ 2, 18, 272, 185, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_VAR_Z_X 4xaa @ RbPlus
{ 3, 19, 272, 291, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_VAR_Z_X 4xaa @ RbPlus
@@ -3741,7 +3658,7 @@ const ADDR_SW_PATINFO SW_VAR_Z_X_4xaa_RBPLUS_PATINFO[] =
{ 3, 22, 324, 328, 100, } , // 64 pipes (32 PKRs) 16 bpe @ SW_VAR_Z_X 4xaa @ RbPlus
};
const ADDR_SW_PATINFO SW_VAR_Z_X_8xaa_RBPLUS_PATINFO[] =
const ADDR_SW_PATINFO GFX10_SW_VAR_Z_X_8xaa_RBPLUS_PATINFO[] =
{
{ 3, 23, 313, 256, 0, } , // 1 pipes (1 PKRs) 1 bpe @ SW_VAR_Z_X 8xaa @ RbPlus
{ 3, 24, 272, 292, 0, } , // 1 pipes (1 PKRs) 2 bpe @ SW_VAR_Z_X 8xaa @ RbPlus
@@ -5467,7 +5384,7 @@ const UINT_64 GFX10_SW_PATTERN_NIBBLE4[][4] =
{X3^Y8, S0^X7^Y7, S1^X6^Y7, 0, }, // 238
};
const UINT_8 DCC_64K_R_X_PATIDX[] =
const UINT_8 GFX10_DCC_64K_R_X_PATIDX[] =
{
0, // 1 pipes 1 bpe ua @ SW_64K_R_X 1xaa @ Navi1x
1, // 1 pipes 2 bpe ua @ SW_64K_R_X 1xaa @ Navi1x
@@ -5521,7 +5438,7 @@ const UINT_8 DCC_64K_R_X_PATIDX[] =
37, // 64 pipes 16 bpe pa @ SW_64K_R_X 1xaa @ Navi1x
};
const UINT_8 HTILE_PATIDX[] =
const UINT_8 GFX10_HTILE_PATIDX[] =
{
0, // 1xaa ua @ HTILE_64K @ Navi1x
0, // 2xaa ua @ HTILE_64K @ Navi1x
@@ -5557,7 +5474,7 @@ const UINT_8 HTILE_PATIDX[] =
12, // 64 pipes 8xaa pa @ HTILE_64K @ Navi1x
};
const UINT_8 CMASK_64K_PATIDX[] =
const UINT_8 GFX10_CMASK_64K_PATIDX[] =
{
0, // 1 bpe ua @ CMASK_64K @ Navi1x
0, // 2 bpe ua @ CMASK_64K @ Navi1x
@@ -5593,7 +5510,7 @@ const UINT_8 CMASK_64K_PATIDX[] =
7, // 64 pipes 8 bpe pa @ CMASK_64K @ Navi1x
};
const UINT_8 DCC_64K_R_X_RBPLUS_PATIDX[] =
const UINT_8 GFX10_DCC_64K_R_X_RBPLUS_PATIDX[] =
{
0, // 1 bpe ua @ SW_64K_R_X 1xaa @ RbPlus
1, // 2 bpe ua @ SW_64K_R_X 1xaa @ RbPlus
@@ -5677,7 +5594,7 @@ const UINT_8 DCC_64K_R_X_RBPLUS_PATIDX[] =
107, // 64 pipes (32 PKRs) 16 bpe pa @ SW_64K_R_X 1xaa @ RbPlus
};
const UINT_8 HTILE_RBPLUS_PATIDX[] =
const UINT_8 GFX10_HTILE_RBPLUS_PATIDX[] =
{
0, // 1xaa ua @ HTILE_64K @ RbPlus
0, // 2xaa ua @ HTILE_64K @ RbPlus
@@ -5761,7 +5678,7 @@ const UINT_8 HTILE_RBPLUS_PATIDX[] =
29, // 64 pipes (32 PKRs) 8xaa pa @ HTILE_64K @ RbPlus
};
const UINT_8 CMASK_64K_RBPLUS_PATIDX[] =
const UINT_8 GFX10_CMASK_64K_RBPLUS_PATIDX[] =
{
0, // 1 bpe ua @ CMASK_64K @ RbPlus
0, // 2 bpe ua @ CMASK_64K @ RbPlus
@@ -5845,7 +5762,7 @@ const UINT_8 CMASK_64K_RBPLUS_PATIDX[] =
34, // 64 pipes (32 PKRs) 8 bpe pa @ CMASK_64K @ RbPlus
};
const UINT_8 CMASK_VAR_RBPLUS_PATIDX[] =
const UINT_8 GFX10_CMASK_VAR_RBPLUS_PATIDX[] =
{
0, // 1 bpe ua @ CMASK_VAR @ RbPlus
0, // 2 bpe ua @ CMASK_VAR @ RbPlus
@@ -5929,7 +5846,7 @@ const UINT_8 CMASK_VAR_RBPLUS_PATIDX[] =
31, // 64 pipes (32 PKRs) 8 bpe pa @ CMASK_VAR @ RbPlus
};
const UINT_64 DCC_64K_R_X_SW_PATTERN[][17] =
const UINT_64 GFX10_DCC_64K_R_X_SW_PATTERN[][17] =
{
{0, X4, Y4, X5, Y5, X6, Y6, X7, Y7, X8, Y8, X9, Y9, 0, 0, 0, 0, }, //0
{0, Y3, X4, Y4, X5, Y5, X6, Y6, X7, Y7, X8, Y8, X9, 0, 0, 0, 0, }, //1
@@ -6041,7 +5958,7 @@ const UINT_64 DCC_64K_R_X_SW_PATTERN[][17] =
{0, X3, Y3, X7, Y7, X8, Y8, X2, Y2, Y4^X9^Y9, Z2^X4^Y4, Z1^Y5^X8, Z0^X5^Y8, Y2^Y6^X7, X2^X6^Y7, 0, 0, }, //107
};
const UINT_64 HTILE_SW_PATTERN[][18] =
const UINT_64 GFX10_HTILE_SW_PATTERN[][18] =
{
{0, 0, 0, X3, Y3, X4, Y4, X5, Y5, X6, Y6, X7, Y7, 0, 0, 0, 0, 0, }, //0
{0, 0, 0, X3, Y4, X4, X5, Y5, X6, Z0^X3^Y3, Y6, X7, Y7, 0, 0, 0, 0, 0, }, //1
@@ -6075,7 +5992,7 @@ const UINT_64 HTILE_SW_PATTERN[][18] =
{0, 0, 0, X3, Y3, X7, Y7, X8, Y8, Y4^X9^Y9, Z1^X4^Y4, Z0^Y5^X8, X5^Y8, Y6^X7, X6^Y7, X9, Y9, X10, }, //29
};
const UINT_64 CMASK_SW_PATTERN[][17] =
const UINT_64 GFX10_CMASK_SW_PATTERN[][17] =
{
{X3, Y3, X4, Y4, X5, Y5, X6, Y6, X7, Y7, X8, Y8, X9, 0, 0, 0, 0, }, //0
{X3, Y4, X4, X5, Y5, X6, Y6, X7, Y7, Z0^X3^Y3, X8, Y8, X9, 0, 0, 0, 0, }, //1
@@ -6117,6 +6034,4 @@ const UINT_64 CMASK_SW_PATTERN[][17] =
} // V2
} // Addr
} // rocr
#endif
runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10addrlib.cpp
+1115 -616
مشاهده پرونده
تفاوت فایلی نمایش داده نمی شود زیرا این فایل بسیار بزرگ است Diff را بارگزاری کن
runtime/hsa-runtime/image/addrlib/src/gfx10/gfx10addrlib.h
+64 -69
مشاهده پرونده
@@ -1,28 +1,27 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
/**
************************************************************************************************************************
@@ -39,10 +38,8 @@
#include "gfx10SwizzlePattern.h"
namespace rocr {
namespace Addr
{
namespace V2
{
namespace Addr {
namespace V2 {
/**
************************************************************************************************************************
@@ -56,11 +53,12 @@ struct Gfx10ChipSettings
UINT_32 reserved1 : 32;
// Misc configuration bits
UINT_32 isDcn2 : 1;
UINT_32 isDcn20 : 1; // If using DCN2.0
UINT_32 supportRbPlus : 1;
UINT_32 dsMipmapHtileFix : 1;
UINT_32 dccUnsup3DSwDis : 1;
UINT_32 reserved2 : 28;
UINT_32 : 2;
UINT_32 reserved2 : 26;
};
};
@@ -171,20 +169,32 @@ const UINT_32 Gfx10Rsrc3dThick64KBSwModeMask = Gfx10Rsrc3dThickSwModeMask & Gfx1
const UINT_32 Gfx10MsaaSwModeMask = Gfx10ZSwModeMask |
Gfx10RenderSwModeMask;
const UINT_32 Dcn2NonBpp64SwModeMask = (1u << ADDR_SW_LINEAR) |
(1u << ADDR_SW_4KB_S) |
(1u << ADDR_SW_64KB_S) |
(1u << ADDR_SW_64KB_S_T) |
(1u << ADDR_SW_4KB_S_X) |
(1u << ADDR_SW_64KB_S_X) |
(1u << ADDR_SW_64KB_R_X);
const UINT_32 Dcn20NonBpp64SwModeMask = (1u << ADDR_SW_LINEAR) |
(1u << ADDR_SW_4KB_S) |
(1u << ADDR_SW_64KB_S) |
(1u << ADDR_SW_64KB_S_T) |
(1u << ADDR_SW_4KB_S_X) |
(1u << ADDR_SW_64KB_S_X) |
(1u << ADDR_SW_64KB_R_X);
const UINT_32 Dcn20Bpp64SwModeMask = (1u << ADDR_SW_4KB_D) |
(1u << ADDR_SW_64KB_D) |
(1u << ADDR_SW_64KB_D_T) |
(1u << ADDR_SW_4KB_D_X) |
(1u << ADDR_SW_64KB_D_X) |
Dcn20NonBpp64SwModeMask;
const UINT_32 Dcn21NonBpp64SwModeMask = (1u << ADDR_SW_LINEAR) |
(1u << ADDR_SW_64KB_S) |
(1u << ADDR_SW_64KB_S_T) |
(1u << ADDR_SW_64KB_S_X) |
(1u << ADDR_SW_64KB_R_X);
const UINT_32 Dcn21Bpp64SwModeMask = (1u << ADDR_SW_64KB_D) |
(1u << ADDR_SW_64KB_D_T) |
(1u << ADDR_SW_64KB_D_X) |
Dcn21NonBpp64SwModeMask;
const UINT_32 Dcn2Bpp64SwModeMask = (1u << ADDR_SW_4KB_D) |
(1u << ADDR_SW_64KB_D) |
(1u << ADDR_SW_64KB_D_T) |
(1u << ADDR_SW_4KB_D_X) |
(1u << ADDR_SW_64KB_D_X) |
Dcn2NonBpp64SwModeMask;
/**
************************************************************************************************************************
* @brief This class is the GFX10 specific address library
@@ -262,7 +272,10 @@ protected:
const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn,
ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut);
virtual ADDR_E_RETURNCODE HwlComputeDccAddrFromCoord(
virtual ADDR_E_RETURNCODE HwlSupportComputeDccAddrFromCoord(
const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn);
virtual VOID HwlComputeDccAddrFromCoord(
const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn,
ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut);
@@ -289,6 +302,10 @@ protected:
const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn,
ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT* pOut) const;
virtual ADDR_E_RETURNCODE HwlComputeNonBlockCompressedView(
const ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT* pIn,
ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT* pOut) const;
virtual ADDR_E_RETURNCODE HwlGetPreferredSurfaceSetting(
const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn,
ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut) const;
@@ -316,6 +333,7 @@ protected:
virtual ChipFamily HwlConvertChipFamily(UINT_32 uChipFamily, UINT_32 uChipRevision);
private:
// Initialize equation table
VOID InitEquationTable();
@@ -335,7 +353,6 @@ protected:
const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const;
private:
UINT_32 ComputeOffsetFromSwizzlePattern(
const UINT_64* pPattern,
UINT_32 numBits,
@@ -352,32 +369,9 @@ private:
ADDR_E_RETURNCODE ComputeStereoInfo(
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
UINT_32 blkHeight,
UINT_32* pAlignY,
UINT_32* pRightXor) const;
Dim3d GetDccCompressBlk(
AddrResourceType resourceType,
AddrSwizzleMode swizzleMode,
UINT_32 bpp) const
{
UINT_32 index = Log2(bpp >> 3);
Dim3d compressBlkDim;
if (IsThin(resourceType, swizzleMode))
{
compressBlkDim.w = Block256_2d[index].w;
compressBlkDim.h = Block256_2d[index].h;
compressBlkDim.d = 1;
}
else
{
compressBlkDim = Block256_3d[index];
}
return compressBlkDim;
}
static void GetMipSize(
UINT_32 mip0Width,
UINT_32 mip0Height,
@@ -493,6 +487,8 @@ private:
}
UINT_32 GetValidDisplaySwizzleModes(UINT_32 bpp) const;
BOOL_32 IsValidDisplaySwizzleMode(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const;
UINT_32 GetMaxNumMipsInTail(UINT_32 blockSizeLog2, BOOL_32 isThin) const;
@@ -581,6 +577,5 @@ private:
} // Addr
} // rocr
#endif
runtime/hsa-runtime/image/addrlib/src/gfx11/gfx11SwizzlePattern.h
+3056
مشاهده پرونده
تفاوت فایلی نمایش داده نمی شود زیرا این فایل بسیار بزرگ است Diff را بارگزاری کن
runtime/hsa-runtime/image/addrlib/src/gfx11/gfx11addrlib.cpp
+4251
مشاهده پرونده
تفاوت فایلی نمایش داده نمی شود زیرا این فایل بسیار بزرگ است Diff را بارگزاری کن
runtime/hsa-runtime/image/addrlib/src/gfx11/gfx11addrlib.h
+559
مشاهده پرونده
@@ -0,0 +1,559 @@
/*
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
/**
************************************************************************************************************************
* @file gfx11addrlib.h
* @brief Contains the Gfx11Lib class definition.
************************************************************************************************************************
*/
#ifndef __GFX11_ADDR_LIB_H__
#define __GFX11_ADDR_LIB_H__
#include "addrlib2.h"
#include "coord.h"
#include "gfx11SwizzlePattern.h"
namespace rocr {
namespace Addr {
namespace V2 {
/**
************************************************************************************************************************
* @brief GFX11 specific settings structure.
************************************************************************************************************************
*/
struct Gfx11ChipSettings
{
struct
{
UINT_32 reserved1 : 32;
// Misc configuration bits
UINT_32 reserved2 : 32;
};
};
/**
************************************************************************************************************************
* @brief GFX11 data surface type.
************************************************************************************************************************
*/
enum Gfx11DataType
{
Gfx11DataColor,
Gfx11DataDepthStencil,
};
const UINT_32 Gfx11LinearSwModeMask = (1u << ADDR_SW_LINEAR);
const UINT_32 Gfx11Blk256BSwModeMask = (1u << ADDR_SW_256B_D);
const UINT_32 Gfx11Blk4KBSwModeMask = (1u << ADDR_SW_4KB_S) |
(1u << ADDR_SW_4KB_D) |
(1u << ADDR_SW_4KB_S_X) |
(1u << ADDR_SW_4KB_D_X);
const UINT_32 Gfx11Blk64KBSwModeMask = (1u << ADDR_SW_64KB_S) |
(1u << ADDR_SW_64KB_D) |
(1u << ADDR_SW_64KB_S_T) |
(1u << ADDR_SW_64KB_D_T) |
(1u << ADDR_SW_64KB_Z_X) |
(1u << ADDR_SW_64KB_S_X) |
(1u << ADDR_SW_64KB_D_X) |
(1u << ADDR_SW_64KB_R_X);
const UINT_32 Gfx11Blk256KBSwModeMask = (1u << ADDR_SW_256KB_Z_X) |
(1u << ADDR_SW_256KB_S_X) |
(1u << ADDR_SW_256KB_D_X) |
(1u << ADDR_SW_256KB_R_X);
const UINT_32 Gfx11ZSwModeMask = (1u << ADDR_SW_64KB_Z_X) |
(1u << ADDR_SW_256KB_Z_X);
const UINT_32 Gfx11StandardSwModeMask = (1u << ADDR_SW_4KB_S) |
(1u << ADDR_SW_64KB_S) |
(1u << ADDR_SW_64KB_S_T) |
(1u << ADDR_SW_4KB_S_X) |
(1u << ADDR_SW_64KB_S_X) |
(1u << ADDR_SW_256KB_S_X);
const UINT_32 Gfx11DisplaySwModeMask = (1u << ADDR_SW_256B_D) |
(1u << ADDR_SW_4KB_D) |
(1u << ADDR_SW_64KB_D) |
(1u << ADDR_SW_64KB_D_T) |
(1u << ADDR_SW_4KB_D_X) |
(1u << ADDR_SW_64KB_D_X) |
(1u << ADDR_SW_256KB_D_X);
const UINT_32 Gfx11RenderSwModeMask = (1u << ADDR_SW_64KB_R_X) |
(1u << ADDR_SW_256KB_R_X);
const UINT_32 Gfx11XSwModeMask = (1u << ADDR_SW_4KB_S_X) |
(1u << ADDR_SW_4KB_D_X) |
(1u << ADDR_SW_64KB_Z_X) |
(1u << ADDR_SW_64KB_S_X) |
(1u << ADDR_SW_64KB_D_X) |
(1u << ADDR_SW_64KB_R_X) |
Gfx11Blk256KBSwModeMask;
const UINT_32 Gfx11TSwModeMask = (1u << ADDR_SW_64KB_S_T) |
(1u << ADDR_SW_64KB_D_T);
const UINT_32 Gfx11XorSwModeMask = Gfx11XSwModeMask |
Gfx11TSwModeMask;
const UINT_32 Gfx11Rsrc1dSwModeMask = (1u << ADDR_SW_LINEAR) |
(1u << ADDR_SW_64KB_R_X) |
(1u << ADDR_SW_64KB_Z_X) ;
const UINT_32 Gfx11Rsrc2dSwModeMask = Gfx11LinearSwModeMask |
Gfx11DisplaySwModeMask |
Gfx11ZSwModeMask |
Gfx11RenderSwModeMask;
const UINT_32 Gfx11Rsrc3dSwModeMask = Gfx11LinearSwModeMask |
Gfx11StandardSwModeMask |
Gfx11ZSwModeMask |
Gfx11RenderSwModeMask |
(1u << ADDR_SW_64KB_D_X) |
(1u << ADDR_SW_256KB_D_X);
const UINT_32 Gfx11Rsrc2dPrtSwModeMask =
(Gfx11Blk4KBSwModeMask | Gfx11Blk64KBSwModeMask) & ~Gfx11XSwModeMask & Gfx11Rsrc2dSwModeMask;
const UINT_32 Gfx11Rsrc3dPrtSwModeMask =
(Gfx11Blk4KBSwModeMask | Gfx11Blk64KBSwModeMask) & ~Gfx11XSwModeMask & Gfx11Rsrc3dSwModeMask;
const UINT_32 Gfx11Rsrc3dThin64KBSwModeMask = (1u << ADDR_SW_64KB_Z_X) |
(1u << ADDR_SW_64KB_R_X);
const UINT_32 Gfx11Rsrc3dThin256KBSwModeMask = (1u << ADDR_SW_256KB_Z_X) |
(1u << ADDR_SW_256KB_R_X);
const UINT_32 Gfx11Rsrc3dThinSwModeMask = Gfx11Rsrc3dThin64KBSwModeMask | Gfx11Rsrc3dThin256KBSwModeMask;
const UINT_32 Gfx11Rsrc3dThickSwModeMask = Gfx11Rsrc3dSwModeMask & ~(Gfx11Rsrc3dThinSwModeMask | Gfx11LinearSwModeMask);
const UINT_32 Gfx11Rsrc3dThick4KBSwModeMask = Gfx11Rsrc3dThickSwModeMask & Gfx11Blk4KBSwModeMask;
const UINT_32 Gfx11Rsrc3dThick64KBSwModeMask = Gfx11Rsrc3dThickSwModeMask & Gfx11Blk64KBSwModeMask;
const UINT_32 Gfx11Rsrc3dThick256KBSwModeMask = Gfx11Rsrc3dThickSwModeMask & Gfx11Blk256KBSwModeMask;
const UINT_32 Gfx11MsaaSwModeMask = Gfx11ZSwModeMask |
Gfx11RenderSwModeMask;
const UINT_32 Dcn32SwModeMask = (1u << ADDR_SW_LINEAR) |
(1u << ADDR_SW_64KB_D) |
(1u << ADDR_SW_64KB_D_T) |
(1u << ADDR_SW_64KB_D_X) |
(1u << ADDR_SW_64KB_R_X) |
(1u << ADDR_SW_256KB_D_X) |
(1u << ADDR_SW_256KB_R_X);
const UINT_32 Size256K = 262144u;
const UINT_32 Log2Size256K = 18u;
/**
************************************************************************************************************************
* @brief This class is the GFX11 specific address library
* function set.
************************************************************************************************************************
*/
class Gfx11Lib : public Lib
{
public:
/// Creates Gfx11Lib object
static Addr::Lib* CreateObj(const Client* pClient)
{
VOID* pMem = Object::ClientAlloc(sizeof(Gfx11Lib), pClient);
return (pMem != NULL) ? new (pMem) Gfx11Lib(pClient) : NULL;
}
protected:
Gfx11Lib(const Client* pClient);
virtual ~Gfx11Lib();
virtual BOOL_32 HwlIsStandardSwizzle(
AddrResourceType resourceType,
AddrSwizzleMode swizzleMode) const
{
return m_swizzleModeTable[swizzleMode].isStd;
}
virtual BOOL_32 HwlIsDisplaySwizzle(
AddrResourceType resourceType,
AddrSwizzleMode swizzleMode) const
{
return m_swizzleModeTable[swizzleMode].isDisp;
}
virtual BOOL_32 HwlIsThin(
AddrResourceType resourceType,
AddrSwizzleMode swizzleMode) const
{
return ((IsTex1d(resourceType) == TRUE) ||
(IsTex2d(resourceType) == TRUE) ||
((IsTex3d(resourceType) == TRUE) &&
(m_swizzleModeTable[swizzleMode].isStd == FALSE) &&
(m_swizzleModeTable[swizzleMode].isDisp == FALSE)));
}
virtual BOOL_32 HwlIsThick(
AddrResourceType resourceType,
AddrSwizzleMode swizzleMode) const
{
return ((IsTex3d(resourceType) == TRUE) &&
(m_swizzleModeTable[swizzleMode].isStd || m_swizzleModeTable[swizzleMode].isDisp));
}
virtual ADDR_E_RETURNCODE HwlComputeHtileInfo(
const ADDR2_COMPUTE_HTILE_INFO_INPUT* pIn,
ADDR2_COMPUTE_HTILE_INFO_OUTPUT* pOut) const;
virtual ADDR_E_RETURNCODE HwlComputeDccInfo(
const ADDR2_COMPUTE_DCCINFO_INPUT* pIn,
ADDR2_COMPUTE_DCCINFO_OUTPUT* pOut) const;
virtual ADDR_E_RETURNCODE HwlComputeHtileAddrFromCoord(
const ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_INPUT* pIn,
ADDR2_COMPUTE_HTILE_ADDRFROMCOORD_OUTPUT* pOut);
virtual ADDR_E_RETURNCODE HwlComputeHtileCoordFromAddr(
const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn,
ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut);
virtual ADDR_E_RETURNCODE HwlSupportComputeDccAddrFromCoord(
const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn);
virtual VOID HwlComputeDccAddrFromCoord(
const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn,
ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut);
virtual UINT_32 HwlGetEquationIndex(
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
virtual UINT_32 HwlGetEquationTableInfo(const ADDR_EQUATION** ppEquationTable) const
{
*ppEquationTable = m_equationTable;
return m_numEquations;
}
virtual ADDR_E_RETURNCODE HwlComputePipeBankXor(
const ADDR2_COMPUTE_PIPEBANKXOR_INPUT* pIn,
ADDR2_COMPUTE_PIPEBANKXOR_OUTPUT* pOut) const;
virtual ADDR_E_RETURNCODE HwlComputeSlicePipeBankXor(
const ADDR2_COMPUTE_SLICE_PIPEBANKXOR_INPUT* pIn,
ADDR2_COMPUTE_SLICE_PIPEBANKXOR_OUTPUT* pOut) const;
virtual ADDR_E_RETURNCODE HwlComputeSubResourceOffsetForSwizzlePattern(
const ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_INPUT* pIn,
ADDR2_COMPUTE_SUBRESOURCE_OFFSET_FORSWIZZLEPATTERN_OUTPUT* pOut) const;
virtual ADDR_E_RETURNCODE HwlComputeNonBlockCompressedView(
const ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_INPUT* pIn,
ADDR2_COMPUTE_NONBLOCKCOMPRESSEDVIEW_OUTPUT* pOut) const;
virtual ADDR_E_RETURNCODE HwlGetPreferredSurfaceSetting(
const ADDR2_GET_PREFERRED_SURF_SETTING_INPUT* pIn,
ADDR2_GET_PREFERRED_SURF_SETTING_OUTPUT* pOut) const;
virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoSanityCheck(
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const;
virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoTiled(
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfoLinear(
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
virtual ADDR_E_RETURNCODE HwlComputeSurfaceAddrFromCoordTiled(
const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const;
virtual UINT_32 HwlComputeMaxBaseAlignments() const;
virtual UINT_32 HwlComputeMaxMetaBaseAlignments() const;
virtual BOOL_32 HwlInitGlobalParams(const ADDR_CREATE_INPUT* pCreateIn);
virtual ChipFamily HwlConvertChipFamily(UINT_32 uChipFamily, UINT_32 uChipRevision);
private:
// Initialize equation table
VOID InitEquationTable();
ADDR_E_RETURNCODE ComputeSurfaceInfoMacroTiled(
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeSurfaceInfoMicroTiled(
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
ADDR2_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoordMacroTiled(
const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const;
ADDR_E_RETURNCODE ComputeSurfaceAddrFromCoordMicroTiled(
const ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_INPUT* pIn,
ADDR2_COMPUTE_SURFACE_ADDRFROMCOORD_OUTPUT* pOut) const;
UINT_32 ComputeOffsetFromSwizzlePattern(
const UINT_64* pPattern,
UINT_32 numBits,
UINT_32 x,
UINT_32 y,
UINT_32 z,
UINT_32 s) const;
UINT_32 ComputeOffsetFromEquation(
const ADDR_EQUATION* pEq,
UINT_32 x,
UINT_32 y,
UINT_32 z) const;
ADDR_E_RETURNCODE ComputeStereoInfo(
const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn,
UINT_32* pAlignY,
UINT_32* pRightXor) const;
static void GetMipSize(
UINT_32 mip0Width,
UINT_32 mip0Height,
UINT_32 mip0Depth,
UINT_32 mipId,
UINT_32* pMipWidth,
UINT_32* pMipHeight,
UINT_32* pMipDepth = NULL)
{
*pMipWidth = ShiftCeil(Max(mip0Width, 1u), mipId);
*pMipHeight = ShiftCeil(Max(mip0Height, 1u), mipId);
if (pMipDepth != NULL)
{
*pMipDepth = ShiftCeil(Max(mip0Depth, 1u), mipId);
}
}
const ADDR_SW_PATINFO* GetSwizzlePatternInfo(
AddrSwizzleMode swizzleMode,
AddrResourceType resourceType,
UINT_32 log2Elem,
UINT_32 numFrag) const;
VOID GetSwizzlePatternFromPatternInfo(
const ADDR_SW_PATINFO* pPatInfo,
ADDR_BIT_SETTING (&pSwizzle)[20]) const
{
memcpy(pSwizzle,
GFX11_SW_PATTERN_NIBBLE01[pPatInfo->nibble01Idx],
sizeof(GFX11_SW_PATTERN_NIBBLE01[pPatInfo->nibble01Idx]));
memcpy(&pSwizzle[8],
GFX11_SW_PATTERN_NIBBLE2[pPatInfo->nibble2Idx],
sizeof(GFX11_SW_PATTERN_NIBBLE2[pPatInfo->nibble2Idx]));
memcpy(&pSwizzle[12],
GFX11_SW_PATTERN_NIBBLE3[pPatInfo->nibble3Idx],
sizeof(GFX11_SW_PATTERN_NIBBLE3[pPatInfo->nibble3Idx]));
memcpy(&pSwizzle[16],
GFX11_SW_PATTERN_NIBBLE4[pPatInfo->nibble4Idx],
sizeof(GFX11_SW_PATTERN_NIBBLE4[pPatInfo->nibble4Idx]));
}
VOID ConvertSwizzlePatternToEquation(
UINT_32 elemLog2,
AddrResourceType rsrcType,
AddrSwizzleMode swMode,
const ADDR_SW_PATINFO* pPatInfo,
ADDR_EQUATION* pEquation) const;
static INT_32 GetMetaElementSizeLog2(Gfx11DataType dataType);
static INT_32 GetMetaCacheSizeLog2(Gfx11DataType dataType);
void GetBlk256SizeLog2(
AddrResourceType resourceType,
AddrSwizzleMode swizzleMode,
UINT_32 elemLog2,
UINT_32 numSamplesLog2,
Dim3d* pBlock) const;
void GetCompressedBlockSizeLog2(
Gfx11DataType dataType,
AddrResourceType resourceType,
AddrSwizzleMode swizzleMode,
UINT_32 elemLog2,
UINT_32 numSamplesLog2,
Dim3d* pBlock) const;
INT_32 GetMetaOverlapLog2(
Gfx11DataType dataType,
AddrResourceType resourceType,
AddrSwizzleMode swizzleMode,
UINT_32 elemLog2,
UINT_32 numSamplesLog2) const;
INT_32 Get3DMetaOverlapLog2(
AddrResourceType resourceType,
AddrSwizzleMode swizzleMode,
UINT_32 elemLog2) const;
UINT_32 GetMetaBlkSize(
Gfx11DataType dataType,
AddrResourceType resourceType,
AddrSwizzleMode swizzleMode,
UINT_32 elemLog2,
UINT_32 numSamplesLog2,
BOOL_32 pipeAlign,
Dim3d* pBlock) const;
INT_32 GetPipeRotateAmount(
AddrResourceType resourceType,
AddrSwizzleMode swizzleMode) const;
INT_32 GetEffectiveNumPipes() const
{
return ((m_numSaLog2 + 1) >= m_pipesLog2) ? m_pipesLog2 : m_numSaLog2 + 1;
}
BOOL_32 IsRbAligned(
AddrResourceType resourceType,
AddrSwizzleMode swizzleMode) const
{
const BOOL_32 isRtopt = IsRtOptSwizzle(swizzleMode);
const BOOL_32 isZ = IsZOrderSwizzle(swizzleMode);
const BOOL_32 isDisplay = IsDisplaySwizzle(swizzleMode);
return (IsTex2d(resourceType) && (isRtopt || isZ)) ||
(IsTex3d(resourceType) && isDisplay);
}
UINT_32 GetValidDisplaySwizzleModes(UINT_32 bpp) const;
BOOL_32 IsValidDisplaySwizzleMode(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const;
UINT_32 GetMaxNumMipsInTail(UINT_32 blockSizeLog2, BOOL_32 isThin) const;
static ADDR2_BLOCK_SET GetAllowedBlockSet(ADDR2_SWMODE_SET allowedSwModeSet, AddrResourceType rsrcType)
{
ADDR2_BLOCK_SET allowedBlockSet = {};
allowedBlockSet.micro = (allowedSwModeSet.value & Gfx11Blk256BSwModeMask) ? TRUE : FALSE;
allowedBlockSet.linear = (allowedSwModeSet.value & Gfx11LinearSwModeMask) ? TRUE : FALSE;
if (rsrcType == ADDR_RSRC_TEX_3D)
{
allowedBlockSet.macroThick4KB = (allowedSwModeSet.value & Gfx11Rsrc3dThick4KBSwModeMask) ? TRUE : FALSE;
allowedBlockSet.macroThin64KB = (allowedSwModeSet.value & Gfx11Rsrc3dThin64KBSwModeMask) ? TRUE : FALSE;
allowedBlockSet.macroThick64KB = (allowedSwModeSet.value & Gfx11Rsrc3dThick64KBSwModeMask) ? TRUE : FALSE;
allowedBlockSet.gfx11.thin256KB = (allowedSwModeSet.value & Gfx11Rsrc3dThin256KBSwModeMask) ? TRUE : FALSE;
allowedBlockSet.gfx11.thick256KB = (allowedSwModeSet.value & Gfx11Rsrc3dThick256KBSwModeMask) ? TRUE : FALSE;
}
else
{
allowedBlockSet.macroThin4KB = (allowedSwModeSet.value & Gfx11Blk4KBSwModeMask) ? TRUE : FALSE;
allowedBlockSet.macroThin64KB = (allowedSwModeSet.value & Gfx11Blk64KBSwModeMask) ? TRUE : FALSE;
allowedBlockSet.gfx11.thin256KB = (allowedSwModeSet.value & Gfx11Blk256KBSwModeMask) ? TRUE : FALSE;
}
return allowedBlockSet;
}
static ADDR2_SWTYPE_SET GetAllowedSwSet(ADDR2_SWMODE_SET allowedSwModeSet)
{
ADDR2_SWTYPE_SET allowedSwSet = {};
allowedSwSet.sw_Z = (allowedSwModeSet.value & Gfx11ZSwModeMask) ? TRUE : FALSE;
allowedSwSet.sw_S = (allowedSwModeSet.value & Gfx11StandardSwModeMask) ? TRUE : FALSE;
allowedSwSet.sw_D = (allowedSwModeSet.value & Gfx11DisplaySwModeMask) ? TRUE : FALSE;
allowedSwSet.sw_R = (allowedSwModeSet.value & Gfx11RenderSwModeMask) ? TRUE : FALSE;
return allowedSwSet;
}
BOOL_32 IsInMipTail(
Dim3d mipTailDim,
UINT_32 maxNumMipsInTail,
UINT_32 mipWidth,
UINT_32 mipHeight,
UINT_32 numMipsToTheEnd) const
{
BOOL_32 inTail = ((mipWidth <= mipTailDim.w) &&
(mipHeight <= mipTailDim.h) &&
(numMipsToTheEnd <= maxNumMipsInTail));
return inTail;
}
UINT_32 GetBankXorBits(UINT_32 blockBits) const
{
return (blockBits > m_pipeInterleaveLog2 + m_pipesLog2 + ColumnBits) ?
Min(blockBits - m_pipeInterleaveLog2 - m_pipesLog2 - ColumnBits, BankBits) : 0;
}
BOOL_32 ValidateNonSwModeParams(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const;
BOOL_32 ValidateSwModeParams(const ADDR2_COMPUTE_SURFACE_INFO_INPUT* pIn) const;
BOOL_32 IsBlock256kb(AddrSwizzleMode swizzleMode) const { return IsBlockVariable(swizzleMode); }
// TODO: figure out if there is any Column bits on GFX11...
static const UINT_32 ColumnBits = 2;
static const UINT_32 BankBits = 4;
static const UINT_32 UnalignedDccType = 3;
static const Dim3d Block256_3d[MaxNumOfBpp];
static const Dim3d Block256K_Log2_3d[MaxNumOfBpp];
static const Dim3d Block64K_Log2_3d[MaxNumOfBpp];
static const Dim3d Block4K_Log2_3d[MaxNumOfBpp];
static const SwizzleModeFlags SwizzleModeTable[ADDR_SW_MAX_TYPE];
// Number of packers log2
UINT_32 m_numPkrLog2;
// Number of shader array log2
UINT_32 m_numSaLog2;
Gfx11ChipSettings m_settings;
UINT_32 m_colorBaseIndex;
UINT_32 m_htileBaseIndex;
UINT_32 m_dccBaseIndex;
};
} // V2
} // Addr
} // rocr
#endif
runtime/hsa-runtime/image/addrlib/src/gfx9/gfx9addrlib.cpp
+389 -216
مشاهده پرونده
@@ -1,28 +1,27 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
/**
************************************************************************************************************************
@@ -37,13 +36,11 @@
#include "amdgpu_asic_addr.h"
#include "util/macros.h"
////////////////////////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////////////////////////
namespace rocr {
namespace Addr
{
namespace Addr {
/**
************************************************************************************************************************
@@ -70,46 +67,46 @@ namespace V2
const SwizzleModeFlags Gfx9Lib::SwizzleModeTable[ADDR_SW_MAX_TYPE] =
{//Linear 256B 4KB 64KB Var Z Std Disp Rot XOR T RtOpt Reserved
{1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // ADDR_SW_LINEAR
{0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0}, // ADDR_SW_256B_S
{0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0}, // ADDR_SW_256B_D
{0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0}, // ADDR_SW_256B_R
{{1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // ADDR_SW_LINEAR
{{0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0}}, // ADDR_SW_256B_S
{{0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0}}, // ADDR_SW_256B_D
{{0, 1, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0}}, // ADDR_SW_256B_R
{0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0}, // ADDR_SW_4KB_Z
{0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0}, // ADDR_SW_4KB_S
{0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0}, // ADDR_SW_4KB_D
{0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0}, // ADDR_SW_4KB_R
{{0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0}}, // ADDR_SW_4KB_Z
{{0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0}}, // ADDR_SW_4KB_S
{{0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0}}, // ADDR_SW_4KB_D
{{0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0}}, // ADDR_SW_4KB_R
{0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0}, // ADDR_SW_64KB_Z
{0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0}, // ADDR_SW_64KB_S
{0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0}, // ADDR_SW_64KB_D
{0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0}, // ADDR_SW_64KB_R
{{0, 0, 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0}}, // ADDR_SW_64KB_Z
{{0, 0, 0, 1, 0, 0, 1, 0, 0, 0, 0, 0, 0}}, // ADDR_SW_64KB_S
{{0, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0}}, // ADDR_SW_64KB_D
{{0, 0, 0, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0}}, // ADDR_SW_64KB_R
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved
{{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved
{{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved
{{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved
{{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved
{0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 1, 0, 0}, // ADDR_SW_64KB_Z_T
{0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 1, 0, 0}, // ADDR_SW_64KB_S_T
{0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 0, 0}, // ADDR_SW_64KB_D_T
{0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 1, 0, 0}, // ADDR_SW_64KB_R_T
{{0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 1, 0, 0}}, // ADDR_SW_64KB_Z_T
{{0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 1, 0, 0}}, // ADDR_SW_64KB_S_T
{{0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 1, 0, 0}}, // ADDR_SW_64KB_D_T
{{0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 1, 0, 0}}, // ADDR_SW_64KB_R_T
{0, 0, 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0}, // ADDR_SW_4KB_Z_x
{0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0}, // ADDR_SW_4KB_S_x
{0, 0, 1, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0}, // ADDR_SW_4KB_D_x
{0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0}, // ADDR_SW_4KB_R_x
{{0, 0, 1, 0, 0, 1, 0, 0, 0, 1, 0, 0, 0}}, // ADDR_SW_4KB_Z_x
{{0, 0, 1, 0, 0, 0, 1, 0, 0, 1, 0, 0, 0}}, // ADDR_SW_4KB_S_x
{{0, 0, 1, 0, 0, 0, 0, 1, 0, 1, 0, 0, 0}}, // ADDR_SW_4KB_D_x
{{0, 0, 1, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0}}, // ADDR_SW_4KB_R_x
{0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0}, // ADDR_SW_64KB_Z_X
{0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0}, // ADDR_SW_64KB_S_X
{0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 0, 0, 0}, // ADDR_SW_64KB_D_X
{0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 0, 0, 0}, // ADDR_SW_64KB_R_X
{{0, 0, 0, 1, 0, 1, 0, 0, 0, 1, 0, 0, 0}}, // ADDR_SW_64KB_Z_X
{{0, 0, 0, 1, 0, 0, 1, 0, 0, 1, 0, 0, 0}}, // ADDR_SW_64KB_S_X
{{0, 0, 0, 1, 0, 0, 0, 1, 0, 1, 0, 0, 0}}, // ADDR_SW_64KB_D_X
{{0, 0, 0, 1, 0, 0, 0, 0, 1, 1, 0, 0, 0}}, // ADDR_SW_64KB_R_X
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // Reserved
{1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}, // ADDR_SW_LINEAR_GENERAL
{{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved
{{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved
{{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved
{{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // Reserved
{{1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, // ADDR_SW_LINEAR_GENERAL
};
const UINT_32 Gfx9Lib::MipTailOffset256B[] = {2048, 1024, 512, 256, 128, 64, 32, 16, 8, 6, 5, 4, 3, 2, 1, 0};
@@ -131,7 +128,6 @@ Gfx9Lib::Gfx9Lib(const Client* pClient)
:
Lib(pClient)
{
m_class = AI_ADDRLIB;
memset(&m_settings, 0, sizeof(m_settings));
memcpy(m_swizzleModeTable, SwizzleModeTable, sizeof(SwizzleModeTable));
memset(m_cachedMetaEqKey, 0, sizeof(m_cachedMetaEqKey));
@@ -353,6 +349,50 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeCmaskInfo(
pOut->metaBlkNumPerSlice = numMetaBlkX * numMetaBlkY;
// Get the CMASK address equation (copied from CmaskAddrFromCoord)
UINT_32 fmaskBpp = GetFmaskBpp(1, 1);
UINT_32 fmaskElementBytesLog2 = Log2(fmaskBpp >> 3);
UINT_32 metaBlkWidthLog2 = Log2(pOut->metaBlkWidth);
UINT_32 metaBlkHeightLog2 = Log2(pOut->metaBlkHeight);
MetaEqParams metaEqParams = {0, fmaskElementBytesLog2, 0, pIn->cMaskFlags,
Gfx9DataFmask, pIn->swizzleMode, pIn->resourceType,
metaBlkWidthLog2, metaBlkHeightLog2, 0, 3, 3, 0};
CoordEq *eq = (CoordEq *)((Gfx9Lib *)this)->GetMetaEquation(metaEqParams);
// Generate the CMASK address equation.
pOut->equation.gfx9.num_bits = Min(32u, eq->getsize());
bool checked = false;
for (unsigned b = 0; b < pOut->equation.gfx9.num_bits; b++) {
CoordTerm &bit = (*eq)[b];
unsigned c;
for (c = 0; c < bit.getsize(); c++) {
Coordinate &coord = bit[c];
pOut->equation.gfx9.bit[b].coord[c].dim = coord.getdim();
pOut->equation.gfx9.bit[b].coord[c].ord = coord.getord();
}
for (; c < 5; c++)
pOut->equation.gfx9.bit[b].coord[c].dim = 5; /* meaning invalid */
}
// Reduce num_bits because DIM_M fills the rest of the bits monotonically.
for (int b = pOut->equation.gfx9.num_bits - 1; b >= 1; b--) {
CoordTerm &prev = (*eq)[b - 1];
CoordTerm &cur = (*eq)[b];
if (cur.getsize() == 1 && cur[0].getdim() == DIM_M &&
prev.getsize() == 1 && prev[0].getdim() == DIM_M &&
prev[0].getord() + 1 == cur[0].getord())
pOut->equation.gfx9.num_bits = b;
else
break;
}
pOut->equation.gfx9.numPipeBits = GetPipeLog2ForMetaAddressing(pIn->cMaskFlags.pipeAligned,
pIn->swizzleMode);
return ADDR_OK;
}
@@ -663,10 +703,60 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeDccInfo(
pOut->metaBlkWidth = metaBlkDim.w;
pOut->metaBlkHeight = metaBlkDim.h;
pOut->metaBlkDepth = metaBlkDim.d;
pOut->metaBlkSize = numCompressBlkPerMetaBlk * numFrags;
pOut->metaBlkNumPerSlice = numMetaBlkX * numMetaBlkY;
pOut->fastClearSizePerSlice =
pOut->metaBlkNumPerSlice * numCompressBlkPerMetaBlk * Min(numFrags, m_maxCompFrag);
// Get the DCC address equation (copied from DccAddrFromCoord)
UINT_32 elementBytesLog2 = Log2(pIn->bpp >> 3);
UINT_32 numSamplesLog2 = Log2(pIn->numFrags);
UINT_32 metaBlkWidthLog2 = Log2(pOut->metaBlkWidth);
UINT_32 metaBlkHeightLog2 = Log2(pOut->metaBlkHeight);
UINT_32 metaBlkDepthLog2 = Log2(pOut->metaBlkDepth);
UINT_32 compBlkWidthLog2 = Log2(pOut->compressBlkWidth);
UINT_32 compBlkHeightLog2 = Log2(pOut->compressBlkHeight);
UINT_32 compBlkDepthLog2 = Log2(pOut->compressBlkDepth);
MetaEqParams metaEqParams = {0, elementBytesLog2, numSamplesLog2, pIn->dccKeyFlags,
Gfx9DataColor, pIn->swizzleMode, pIn->resourceType,
metaBlkWidthLog2, metaBlkHeightLog2, metaBlkDepthLog2,
compBlkWidthLog2, compBlkHeightLog2, compBlkDepthLog2};
CoordEq *eq = (CoordEq *)((Gfx9Lib *)this)->GetMetaEquation(metaEqParams);
// Generate the DCC address equation.
pOut->equation.gfx9.num_bits = Min(32u, eq->getsize());
bool checked = false;
for (unsigned b = 0; b < pOut->equation.gfx9.num_bits; b++) {
CoordTerm &bit = (*eq)[b];
unsigned c;
for (c = 0; c < bit.getsize(); c++) {
Coordinate &coord = bit[c];
pOut->equation.gfx9.bit[b].coord[c].dim = coord.getdim();
pOut->equation.gfx9.bit[b].coord[c].ord = coord.getord();
}
for (; c < 5; c++)
pOut->equation.gfx9.bit[b].coord[c].dim = 5; /* meaning invalid */
}
// Reduce num_bits because DIM_M fills the rest of the bits monotonically.
for (int b = pOut->equation.gfx9.num_bits - 1; b >= 1; b--) {
CoordTerm &prev = (*eq)[b - 1];
CoordTerm &cur = (*eq)[b];
if (cur.getsize() == 1 && cur[0].getdim() == DIM_M &&
prev.getsize() == 1 && prev[0].getdim() == DIM_M &&
prev[0].getord() + 1 == cur[0].getord())
pOut->equation.gfx9.num_bits = b;
else
break;
}
pOut->equation.gfx9.numPipeBits = GetPipeLog2ForMetaAddressing(pIn->dccKeyFlags.pipeAligned,
pIn->swizzleMode);
}
return ADDR_OK;
@@ -799,12 +889,13 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeCmaskAddrFromCoord(
UINT_32 sliceSizeInBlock = (output.height / output.metaBlkHeight) * pitchInBlock;
UINT_32 blockIndex = zb * sliceSizeInBlock + yb * pitchInBlock + xb;
UINT_32 coords[] = { pIn->x, pIn->y, pIn->slice, 0, blockIndex };
UINT_64 address = pMetaEq->solve(coords);
UINT_32 coords[] = {pIn->x, pIn->y, pIn->slice, 0, blockIndex};
UINT_64 address = pMetaEq->solve(coords);
pOut->addr = address >> 1;
pOut->bitPosition = static_cast<UINT_32>((address & 1) << 2);
UINT_32 numPipeBits = GetPipeLog2ForMetaAddressing(pIn->cMaskFlags.pipeAligned,
pIn->swizzleMode);
@@ -875,8 +966,8 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeHtileAddrFromCoord(
UINT_32 sliceSizeInBlock = (output.height / output.metaBlkHeight) * pitchInBlock;
UINT_32 blockIndex = zb * sliceSizeInBlock + yb * pitchInBlock + xb;
UINT_32 coords[] = { pIn->x, pIn->y, pIn->slice, 0, blockIndex };
UINT_64 address = pMetaEq->solve(coords);
UINT_32 coords[] = {pIn->x, pIn->y, pIn->slice, 0, blockIndex};
UINT_64 address = pMetaEq->solve(coords);
pOut->addr = address >> 1;
@@ -964,6 +1055,42 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeHtileCoordFromAddr(
return returnCode;
}
/**
************************************************************************************************************************
* Gfx9Lib::HwlSupportComputeDccAddrFromCoord
*
* @brief
* Check whether HwlComputeDccAddrFromCoord() can be done for the input parameter
*
* @return
* ADDR_E_RETURNCODE
************************************************************************************************************************
*/
ADDR_E_RETURNCODE Gfx9Lib::HwlSupportComputeDccAddrFromCoord(
const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn)
{
ADDR_E_RETURNCODE returnCode = ADDR_OK;
if ((pIn->numMipLevels > 1) || (pIn->mipId > 1) || pIn->dccKeyFlags.linear)
{
returnCode = ADDR_NOTSUPPORTED;
}
else if ((pIn->pitch == 0) ||
(pIn->height == 0) ||
(pIn->compressBlkWidth == 0) ||
(pIn->compressBlkHeight == 0) ||
(pIn->compressBlkDepth == 0) ||
(pIn->metaBlkWidth == 0) ||
(pIn->metaBlkHeight == 0) ||
(pIn->metaBlkDepth == 0) ||
(pIn->slice > 0 && pIn->dccRamSliceSize == 0))
{
returnCode = ADDR_NOTSUPPORTED;
}
return returnCode;
}
/**
************************************************************************************************************************
* Gfx9Lib::HwlComputeDccAddrFromCoord
@@ -972,59 +1099,48 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeHtileCoordFromAddr(
* Interface function stub of AddrComputeDccAddrFromCoord
*
* @return
* ADDR_E_RETURNCODE
* N/A
************************************************************************************************************************
*/
ADDR_E_RETURNCODE Gfx9Lib::HwlComputeDccAddrFromCoord(
VOID Gfx9Lib::HwlComputeDccAddrFromCoord(
const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn,
ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut)
{
ADDR_E_RETURNCODE returnCode = ADDR_OK;
UINT_32 elementBytesLog2 = Log2(pIn->bpp >> 3);
UINT_32 numSamplesLog2 = Log2(pIn->numFrags);
UINT_32 metaBlkWidthLog2 = Log2(pIn->metaBlkWidth);
UINT_32 metaBlkHeightLog2 = Log2(pIn->metaBlkHeight);
UINT_32 metaBlkDepthLog2 = Log2(pIn->metaBlkDepth);
UINT_32 compBlkWidthLog2 = Log2(pIn->compressBlkWidth);
UINT_32 compBlkHeightLog2 = Log2(pIn->compressBlkHeight);
UINT_32 compBlkDepthLog2 = Log2(pIn->compressBlkDepth);
if ((pIn->numMipLevels > 1) || (pIn->mipId > 1) || pIn->dccKeyFlags.linear)
{
returnCode = ADDR_NOTIMPLEMENTED;
}
else
{
UINT_32 elementBytesLog2 = Log2(pIn->bpp >> 3);
UINT_32 numSamplesLog2 = Log2(pIn->numFrags);
UINT_32 metaBlkWidthLog2 = Log2(pIn->metaBlkWidth);
UINT_32 metaBlkHeightLog2 = Log2(pIn->metaBlkHeight);
UINT_32 metaBlkDepthLog2 = Log2(pIn->metaBlkDepth);
UINT_32 compBlkWidthLog2 = Log2(pIn->compressBlkWidth);
UINT_32 compBlkHeightLog2 = Log2(pIn->compressBlkHeight);
UINT_32 compBlkDepthLog2 = Log2(pIn->compressBlkDepth);
MetaEqParams metaEqParams = {pIn->mipId, elementBytesLog2, numSamplesLog2, pIn->dccKeyFlags,
Gfx9DataColor, pIn->swizzleMode, pIn->resourceType,
metaBlkWidthLog2, metaBlkHeightLog2, metaBlkDepthLog2,
compBlkWidthLog2, compBlkHeightLog2, compBlkDepthLog2};
MetaEqParams metaEqParams = {pIn->mipId, elementBytesLog2, numSamplesLog2, pIn->dccKeyFlags,
Gfx9DataColor, pIn->swizzleMode, pIn->resourceType,
metaBlkWidthLog2, metaBlkHeightLog2, metaBlkDepthLog2,
compBlkWidthLog2, compBlkHeightLog2, compBlkDepthLog2};
const CoordEq* pMetaEq = GetMetaEquation(metaEqParams);
const CoordEq* pMetaEq = GetMetaEquation(metaEqParams);
UINT_32 xb = pIn->x / pIn->metaBlkWidth;
UINT_32 yb = pIn->y / pIn->metaBlkHeight;
UINT_32 zb = pIn->slice / pIn->metaBlkDepth;
UINT_32 xb = pIn->x / pIn->metaBlkWidth;
UINT_32 yb = pIn->y / pIn->metaBlkHeight;
UINT_32 zb = pIn->slice / pIn->metaBlkDepth;
UINT_32 pitchInBlock = pIn->pitch / pIn->metaBlkWidth;
UINT_32 sliceSizeInBlock = (pIn->height / pIn->metaBlkHeight) * pitchInBlock;
UINT_32 blockIndex = zb * sliceSizeInBlock + yb * pitchInBlock + xb;
UINT_32 pitchInBlock = pIn->pitch / pIn->metaBlkWidth;
UINT_32 sliceSizeInBlock = (pIn->height / pIn->metaBlkHeight) * pitchInBlock;
UINT_32 blockIndex = zb * sliceSizeInBlock + yb * pitchInBlock + xb;
UINT_32 coords[] = {pIn->x, pIn->y, pIn->slice, pIn->sample, blockIndex};
UINT_64 address = pMetaEq->solve(coords);
UINT_32 coords[] = { pIn->x, pIn->y, pIn->slice, pIn->sample, blockIndex };
UINT_64 address = pMetaEq->solve(coords);
pOut->addr = address >> 1;
pOut->addr = address >> 1;
UINT_32 numPipeBits = GetPipeLog2ForMetaAddressing(pIn->dccKeyFlags.pipeAligned,
pIn->swizzleMode);
UINT_32 numPipeBits = GetPipeLog2ForMetaAddressing(pIn->dccKeyFlags.pipeAligned,
pIn->swizzleMode);
UINT_64 pipeXor = static_cast<UINT_64>(pIn->pipeXor & ((1 << numPipeBits) - 1));
UINT_64 pipeXor = static_cast<UINT_64>(pIn->pipeXor & ((1 << numPipeBits) - 1));
pOut->addr ^= (pipeXor << m_pipeInterleaveLog2);
}
return returnCode;
pOut->addr ^= (pipeXor << m_pipeInterleaveLog2);
}
/**
@@ -1046,7 +1162,7 @@ BOOL_32 Gfx9Lib::HwlInitGlobalParams(
if (m_settings.isArcticIsland)
{
GB_ADDR_CONFIG_gfx9 gbAddrConfig;
GB_ADDR_CONFIG_GFX9 gbAddrConfig;
gbAddrConfig.u32All = pCreateIn->regValue.gbAddrConfig;
@@ -1206,6 +1322,7 @@ BOOL_32 Gfx9Lib::HwlInitGlobalParams(
((m_pipesLog2 == 2) && ((m_seLog2 == 1) || (m_seLog2 == 2)))))
{
ADDR_ASSERT(m_settings.isVega10 == FALSE);
ADDR_ASSERT(m_settings.isRaven == FALSE);
ADDR_ASSERT(m_settings.isVega20 == FALSE);
@@ -1289,18 +1406,19 @@ ChipFamily Gfx9Lib::HwlConvertChipFamily(
m_settings.applyAliasFix = 1;
}
m_settings.isDcn1 = m_settings.isRaven;
if (ASICREV_IS_RENOIR(uChipRevision))
{
m_settings.isRaven = 1;
m_settings.isDcn2 = 1;
}
m_settings.isDcn1 = m_settings.isRaven;
m_settings.metaBaseAlignFix = 1;
break;
default:
ADDR_ASSERT(!"This should be a Fusion");
ADDR_ASSERT(!"No Chip found");
break;
}
@@ -2466,7 +2584,7 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlComputeBlock256Equation(
// Post validation
if (ret == ADDR_OK)
{
ASSERTED Dim2d microBlockDim = Block256_2d[elementBytesLog2];
Dim2d microBlockDim = Block256_2d[elementBytesLog2];
ADDR_ASSERT((2u << GetMaxValidChannelIndex(pEquation->addr, 8, 0)) ==
(microBlockDim.w * (1 << elementBytesLog2)));
ADDR_ASSERT((2u << GetMaxValidChannelIndex(pEquation->addr, 8, 1)) == microBlockDim.h);
@@ -2918,54 +3036,39 @@ BOOL_32 Gfx9Lib::IsValidDisplaySwizzleMode(
{
BOOL_32 support = FALSE;
const UINT_32 swizzleMask = 1 << pIn->swizzleMode;
if (m_settings.isDce12)
{
switch (pIn->swizzleMode)
if (pIn->bpp == 32)
{
case ADDR_SW_256B_D:
case ADDR_SW_256B_R:
support = (pIn->bpp == 32);
break;
case ADDR_SW_LINEAR:
case ADDR_SW_4KB_D:
case ADDR_SW_4KB_R:
case ADDR_SW_64KB_D:
case ADDR_SW_64KB_R:
case ADDR_SW_4KB_D_X:
case ADDR_SW_4KB_R_X:
case ADDR_SW_64KB_D_X:
case ADDR_SW_64KB_R_X:
support = (pIn->bpp <= 64);
break;
default:
break;
support = (Dce12Bpp32SwModeMask & swizzleMask) ? TRUE : FALSE;
}
else if (pIn->bpp <= 64)
{
support = (Dce12NonBpp32SwModeMask & swizzleMask) ? TRUE : FALSE;
}
}
else if (m_settings.isDcn1)
{
switch (pIn->swizzleMode)
if (pIn->bpp < 64)
{
case ADDR_SW_4KB_D:
case ADDR_SW_64KB_D:
case ADDR_SW_64KB_D_T:
case ADDR_SW_4KB_D_X:
case ADDR_SW_64KB_D_X:
support = (pIn->bpp == 64);
break;
case ADDR_SW_LINEAR:
case ADDR_SW_4KB_S:
case ADDR_SW_64KB_S:
case ADDR_SW_64KB_S_T:
case ADDR_SW_4KB_S_X:
case ADDR_SW_64KB_S_X:
support = (pIn->bpp <= 64);
break;
default:
break;
support = (Dcn1NonBpp64SwModeMask & swizzleMask) ? TRUE : FALSE;
}
else if (pIn->bpp == 64)
{
support = (Dcn1Bpp64SwModeMask & swizzleMask) ? TRUE : FALSE;
}
}
else if (m_settings.isDcn2)
{
if (pIn->bpp < 64)
{
support = (Dcn2NonBpp64SwModeMask & swizzleMask) ? TRUE : FALSE;
}
else if (pIn->bpp == 64)
{
support = (Dcn2Bpp64SwModeMask & swizzleMask) ? TRUE : FALSE;
}
}
else
@@ -3578,6 +3681,10 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlGetPreferredSurfaceSetting(
{
allowedSwModeSet.value &= (bpp == 64) ? Dcn1Bpp64SwModeMask : Dcn1NonBpp64SwModeMask;
}
else if (m_settings.isDcn2)
{
allowedSwModeSet.value &= (bpp == 64) ? Dcn2Bpp64SwModeMask : Dcn2NonBpp64SwModeMask;
}
else
{
ADDR_NOT_IMPLEMENTED();
@@ -3626,16 +3733,24 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlGetPreferredSurfaceSetting(
}
else
{
// Always ignore linear swizzle mode if there is other choice.
allowedSwModeSet.swLinear = 0;
const BOOL_32 computeMinSize = (pIn->flags.minimizeAlign == 1) || (pIn->memoryBudget >= 1.0);
if ((height > 1) && (computeMinSize == FALSE))
{
// Always ignore linear swizzle mode if:
// 1. This is a (2D/3D) resource with height > 1
// 2. Client doesn't require computing minimize size
allowedSwModeSet.swLinear = 0;
}
ADDR2_BLOCK_SET allowedBlockSet = GetAllowedBlockSet(allowedSwModeSet, pOut->resourceType);
// Determine block size if there is 2 or more block type candidates
// Determine block size if there are 2 or more block type candidates
if (IsPow2(allowedBlockSet.value) == FALSE)
{
AddrSwizzleMode swMode[AddrBlockMaxTiledType] = { ADDR_SW_LINEAR };
AddrSwizzleMode swMode[AddrBlockMaxTiledType] = {};
swMode[AddrBlockLinear] = ADDR_SW_LINEAR;
swMode[AddrBlockMicro] = ADDR_SW_256B_D;
swMode[AddrBlockThin4KB] = ADDR_SW_4KB_D;
swMode[AddrBlockThin64KB] = ADDR_SW_64KB_D;
@@ -3646,78 +3761,137 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlGetPreferredSurfaceSetting(
swMode[AddrBlockThick64KB] = ADDR_SW_64KB_S;
}
Dim3d blkDim[AddrBlockMaxTiledType] = {{0}, {0}, {0}, {0}, {0}, {0}};
Dim3d padDim[AddrBlockMaxTiledType] = {{0}, {0}, {0}, {0}, {0}, {0}};
UINT_64 padSize[AddrBlockMaxTiledType] = {0};
UINT_64 padSize[AddrBlockMaxTiledType] = {};
const UINT_32 ratioLow = pIn->flags.minimizeAlign ? 1 : (pIn->flags.opt4space ? 3 : 2);
const UINT_32 ratioHi = pIn->flags.minimizeAlign ? 1 : (pIn->flags.opt4space ? 2 : 1);
const UINT_32 ratioLow = computeMinSize ? 1 : (pIn->flags.opt4space ? 3 : 2);
const UINT_32 ratioHi = computeMinSize ? 1 : (pIn->flags.opt4space ? 2 : 1);
const UINT_64 sizeAlignInElement = Max(NextPow2(pIn->minSizeAlign) / (bpp >> 3), 1u);
UINT_32 minSizeBlk = AddrBlockMicro;
UINT_64 minSize = 0;
for (UINT_32 i = AddrBlockMicro; i < AddrBlockMaxTiledType; i++)
{
if (allowedBlockSet.value & (1 << i))
{
ComputeBlockDimensionForSurf(&blkDim[i].w,
&blkDim[i].h,
&blkDim[i].d,
bpp,
numFrags,
pOut->resourceType,
swMode[i]);
ADDR2_COMPUTE_SURFACE_INFO_OUTPUT localOut = {};
if (displayRsrc)
for (UINT_32 i = AddrBlockLinear; i < AddrBlockMaxTiledType; i++)
{
if (IsBlockTypeAvaiable(allowedBlockSet, static_cast<AddrBlockType>(i)))
{
localIn.swizzleMode = swMode[i];
if (localIn.swizzleMode == ADDR_SW_LINEAR)
{
blkDim[i].w = PowTwoAlign(blkDim[i].w, 32);
returnCode = HwlComputeSurfaceInfoLinear(&localIn, &localOut);
}
else
{
returnCode = HwlComputeSurfaceInfoTiled(&localIn, &localOut);
}
padSize[i] = ComputePadSize(&blkDim[i], width, height, numSlices, &padDim[i]);
padSize[i] = PowTwoAlign(padSize[i] * numFrags, sizeAlignInElement);
if ((minSize == 0) ||
((padSize[i] * ratioHi) <= (minSize * ratioLow)))
if (returnCode == ADDR_OK)
{
minSize = padSize[i];
minSizeBlk = i;
padSize[i] = localOut.surfSize;
if ((minSize == 0) ||
BlockTypeWithinMemoryBudget(minSize, padSize[i], ratioLow, ratioHi))
{
minSize = padSize[i];
minSizeBlk = i;
}
}
else
{
ADDR_ASSERT_ALWAYS();
break;
}
}
}
if ((allowedBlockSet.micro == TRUE) &&
(width <= blkDim[AddrBlockMicro].w) &&
(height <= blkDim[AddrBlockMicro].h) &&
(NextPow2(pIn->minSizeAlign) <= Size256))
if (pIn->memoryBudget > 1.0)
{
minSizeBlk = AddrBlockMicro;
// If minimum size is given by swizzle mode with bigger-block type, then don't ever check
// smaller-block type again in coming loop
switch (minSizeBlk)
{
case AddrBlockThick64KB:
allowedBlockSet.macroThin64KB = 0;
case AddrBlockThin64KB:
allowedBlockSet.macroThick4KB = 0;
case AddrBlockThick4KB:
allowedBlockSet.macroThin4KB = 0;
case AddrBlockThin4KB:
allowedBlockSet.micro = 0;
case AddrBlockMicro:
allowedBlockSet.linear = 0;
case AddrBlockLinear:
break;
default:
ADDR_ASSERT_ALWAYS();
break;
}
for (UINT_32 i = AddrBlockMicro; i < AddrBlockMaxTiledType; i++)
{
if ((i != minSizeBlk) &&
IsBlockTypeAvaiable(allowedBlockSet, static_cast<AddrBlockType>(i)))
{
if (BlockTypeWithinMemoryBudget(minSize, padSize[i], 0, 0, pIn->memoryBudget) == FALSE)
{
// Clear the block type if the memory waste is unacceptable
allowedBlockSet.value &= ~(1u << (i - 1));
}
}
}
// Remove linear block type if 2 or more block types are allowed
if (IsPow2(allowedBlockSet.value) == FALSE)
{
allowedBlockSet.linear = 0;
}
// Select the biggest allowed block type
minSizeBlk = Log2NonPow2(allowedBlockSet.value) + 1;
if (minSizeBlk == static_cast<UINT_32>(AddrBlockMaxTiledType))
{
minSizeBlk = AddrBlockLinear;
}
}
if (minSizeBlk == AddrBlockMicro)
switch (minSizeBlk)
{
ADDR_ASSERT(pOut->resourceType != ADDR_RSRC_TEX_3D);
allowedSwModeSet.value &= Gfx9Blk256BSwModeMask;
}
else if (minSizeBlk == AddrBlockThick4KB)
{
ADDR_ASSERT(pOut->resourceType == ADDR_RSRC_TEX_3D);
allowedSwModeSet.value &= Gfx9Rsrc3dThick4KBSwModeMask;
}
else if (minSizeBlk == AddrBlockThin4KB)
{
allowedSwModeSet.value &= (pOut->resourceType == ADDR_RSRC_TEX_3D) ?
Gfx9Rsrc3dThin4KBSwModeMask : Gfx9Blk4KBSwModeMask;
}
else if (minSizeBlk == AddrBlockThick64KB)
{
ADDR_ASSERT(pOut->resourceType == ADDR_RSRC_TEX_3D);
allowedSwModeSet.value &= Gfx9Rsrc3dThick64KBSwModeMask;
}
else
{
ADDR_ASSERT(minSizeBlk == AddrBlockThin64KB);
allowedSwModeSet.value &= (pOut->resourceType == ADDR_RSRC_TEX_3D) ?
Gfx9Rsrc3dThin64KBSwModeMask : Gfx9Blk64KBSwModeMask;
case AddrBlockLinear:
allowedSwModeSet.value &= Gfx9LinearSwModeMask;
break;
case AddrBlockMicro:
ADDR_ASSERT(pOut->resourceType != ADDR_RSRC_TEX_3D);
allowedSwModeSet.value &= Gfx9Blk256BSwModeMask;
break;
case AddrBlockThin4KB:
allowedSwModeSet.value &= (pOut->resourceType == ADDR_RSRC_TEX_3D) ?
Gfx9Rsrc3dThin4KBSwModeMask : Gfx9Blk4KBSwModeMask;
break;
case AddrBlockThick4KB:
ADDR_ASSERT(pOut->resourceType == ADDR_RSRC_TEX_3D);
allowedSwModeSet.value &= Gfx9Rsrc3dThick4KBSwModeMask;
break;
case AddrBlockThin64KB:
allowedSwModeSet.value &= (pOut->resourceType == ADDR_RSRC_TEX_3D) ?
Gfx9Rsrc3dThin64KBSwModeMask : Gfx9Blk64KBSwModeMask;
break;
case AddrBlockThick64KB:
ADDR_ASSERT(pOut->resourceType == ADDR_RSRC_TEX_3D);
allowedSwModeSet.value &= Gfx9Rsrc3dThick64KBSwModeMask;
break;
default:
ADDR_ASSERT_ALWAYS();
allowedSwModeSet.value = 0;
break;
}
}
@@ -3726,8 +3900,8 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlGetPreferredSurfaceSetting(
ADDR2_SWTYPE_SET allowedSwSet = GetAllowedSwSet(allowedSwModeSet);
// Determine swizzle type if there is 2 or more swizzle type candidates
if (IsPow2(allowedSwSet.value) == FALSE)
// Determine swizzle type if there are 2 or more swizzle type candidates
if ((allowedSwSet.value != 0) && (IsPow2(allowedSwSet.value) == FALSE))
{
if (ElemLib::IsBlockCompressed(pIn->format))
{
@@ -3793,10 +3967,10 @@ ADDR_E_RETURNCODE Gfx9Lib::HwlGetPreferredSurfaceSetting(
allowedSwModeSet.value &= Gfx9ZSwModeMask;
}
}
}
// Swizzle type should be determined.
ADDR_ASSERT(IsPow2(GetAllowedSwSet(allowedSwModeSet).value));
// Swizzle type should be determined.
ADDR_ASSERT(IsPow2(GetAllowedSwSet(allowedSwModeSet).value));
}
// Determine swizzle mode now. Always select the "largest" swizzle mode for a given block type + swizzle
// type combination. For example, for AddrBlockThin64KB + ADDR_SW_S, select SW_64KB_S_X(25) if it's
@@ -5056,5 +5230,4 @@ VOID Gfx9Lib::ComputeThinBlockDimension(
} // V2
} // Addr
} // rocr
} // rocr
runtime/hsa-runtime/image/addrlib/src/gfx9/gfx9addrlib.h
+41 -31
مشاهده پرونده
@@ -1,28 +1,27 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
/**
************************************************************************************************************************
@@ -38,10 +37,8 @@
#include "coord.h"
namespace rocr {
namespace Addr
{
namespace V2
{
namespace Addr {
namespace V2 {
/**
************************************************************************************************************************
@@ -63,7 +60,8 @@ struct Gfx9ChipSettings
// Display engine IP version name
UINT_32 isDce12 : 1;
UINT_32 isDcn1 : 1;
UINT_32 reserved1 : 30;
UINT_32 isDcn2 : 1;
UINT_32 reserved1 : 29;
// Misc configuration bits
UINT_32 metaBaseAlignFix : 1;
@@ -216,6 +214,16 @@ const UINT_32 Dcn1Bpp64SwModeMask = (1u << ADDR_SW_4KB_D) |
(1u << ADDR_SW_64KB_D_X) |
Dcn1NonBpp64SwModeMask;
const UINT_32 Dcn2NonBpp64SwModeMask = (1u << ADDR_SW_LINEAR) |
(1u << ADDR_SW_64KB_S) |
(1u << ADDR_SW_64KB_S_T) |
(1u << ADDR_SW_64KB_S_X);
const UINT_32 Dcn2Bpp64SwModeMask = (1u << ADDR_SW_64KB_D) |
(1u << ADDR_SW_64KB_D_T) |
(1u << ADDR_SW_64KB_D_X) |
Dcn2NonBpp64SwModeMask;
/**
************************************************************************************************************************
* @brief GFX9 meta equation parameters
@@ -315,7 +323,10 @@ protected:
const ADDR2_COMPUTE_HTILE_COORDFROMADDR_INPUT* pIn,
ADDR2_COMPUTE_HTILE_COORDFROMADDR_OUTPUT* pOut);
virtual ADDR_E_RETURNCODE HwlComputeDccAddrFromCoord(
virtual ADDR_E_RETURNCODE HwlSupportComputeDccAddrFromCoord(
const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn);
virtual VOID HwlComputeDccAddrFromCoord(
const ADDR2_COMPUTE_DCC_ADDRFROMCOORD_INPUT* pIn,
ADDR2_COMPUTE_DCC_ADDRFROMCOORD_OUTPUT* pOut);
@@ -638,6 +649,5 @@ private:
} // Addr
} // rocr
#endif
runtime/hsa-runtime/image/addrlib/src/r800/ciaddrlib.cpp
+47 -35
مشاهده پرونده
@@ -1,28 +1,27 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
/**
****************************************************************************************************
@@ -39,10 +38,8 @@
////////////////////////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////////////////////////
namespace rocr {
namespace Addr
{
namespace Addr {
/**
****************************************************************************************************
@@ -180,7 +177,6 @@ CiLib::CiLib(const Client* pClient)
m_noOfMacroEntries(0),
m_allowNonDispThickModes(FALSE)
{
m_class = CI_ADDRLIB;
}
/**
@@ -411,7 +407,7 @@ ChipFamily CiLib::HwlConvertChipFamily(
family = ADDR_CHIP_FAMILY_VI;
break;
default:
ADDR_ASSERT(!"This should be a unexpected Fusion");
ADDR_ASSERT(!"No Chip found");
break;
}
@@ -1589,7 +1585,14 @@ VOID CiLib::ReadGbTileMode(
gbTileMode.val = regValue;
pCfg->type = static_cast<AddrTileType>(gbTileMode.f.micro_tile_mode_new);
pCfg->info.pipeConfig = static_cast<AddrPipeCfg>(gbTileMode.f.pipe_config + 1);
if (AltTilingEnabled() == TRUE)
{
pCfg->info.pipeConfig = static_cast<AddrPipeCfg>(gbTileMode.f.alt_pipe_config + 1);
}
else
{
pCfg->info.pipeConfig = static_cast<AddrPipeCfg>(gbTileMode.f.pipe_config + 1);
}
if (pCfg->type == ADDR_DEPTH_SAMPLE_ORDER)
{
@@ -1731,10 +1734,19 @@ VOID CiLib::ReadGbMacroTileCfg(
GB_MACROTILE_MODE gbTileMode;
gbTileMode.val = regValue;
pCfg->bankHeight = 1 << gbTileMode.f.bank_height;
if (AltTilingEnabled() == TRUE)
{
pCfg->bankHeight = 1 << gbTileMode.f.alt_bank_height;
pCfg->banks = 1 << (gbTileMode.f.alt_num_banks + 1);
pCfg->macroAspectRatio = 1 << gbTileMode.f.alt_macro_tile_aspect;
}
else
{
pCfg->bankHeight = 1 << gbTileMode.f.bank_height;
pCfg->banks = 1 << (gbTileMode.f.num_banks + 1);
pCfg->macroAspectRatio = 1 << gbTileMode.f.macro_tile_aspect;
}
pCfg->bankWidth = 1 << gbTileMode.f.bank_width;
pCfg->banks = 1 << (gbTileMode.f.num_banks + 1);
pCfg->macroAspectRatio = 1 << gbTileMode.f.macro_tile_aspect;
}
/**
@@ -2033,6 +2045,7 @@ UINT_64 CiLib::HwlComputeMetadataNibbleAddress(
/// NOTE *2 because we are converting to Nibble address in this step
UINT_64 metaAddressInPipe = blockInBankpipeWithBankBits * 2 * metadataBitSize / 8;
///--------------------------------------------------------------------------------------------
/// Reinsert pipe bits back into the final address
///--------------------------------------------------------------------------------------------
@@ -2338,5 +2351,4 @@ BOOL_32 CiLib::CheckTcCompatibility(
} // V1
} // Addr
} // rocr
} // rocr
runtime/hsa-runtime/image/addrlib/src/r800/ciaddrlib.h
+30 -30
مشاهده پرونده
@@ -1,28 +1,27 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
/**
****************************************************************************************************
@@ -38,10 +37,8 @@
#include "siaddrlib.h"
namespace rocr {
namespace Addr
{
namespace V1
{
namespace Addr {
namespace V1 {
/**
****************************************************************************************************
@@ -189,6 +186,11 @@ private:
return ((m_settings.isVolcanicIslands == TRUE) || (m_configFlags.forceDccAndTcCompat == TRUE));
}
BOOL_32 AltTilingEnabled() const
{
return (m_configFlags.enableAltTiling == TRUE);
}
static const UINT_32 MacroTileTableSize = 16;
static const UINT_32 PrtMacroModeOffset = MacroTileTableSize / 2;
static const INT_32 MinDepth2DThinIndex = 0;
@@ -203,6 +205,4 @@ private:
} // V1
} // Addr
} // rocr
#endif
runtime/hsa-runtime/image/addrlib/src/r800/egbaddrlib.cpp
+38 -35
مشاهده پرونده
@@ -1,28 +1,27 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
/**
****************************************************************************************************
* @file egbaddrlib.cpp
@@ -32,13 +31,9 @@
#include "egbaddrlib.h"
#include "util/macros.h"
namespace rocr {
namespace Addr
{
namespace V1
{
namespace Addr {
namespace V1 {
/**
****************************************************************************************************
@@ -436,6 +431,7 @@ BOOL_32 EgBasedLib::ComputeSurfaceInfoMicroTiled(
&expPitch,
&expHeight);
pOut->pitch = expPitch;
pOut->height = expHeight;
pOut->depth = expNumSlices;
@@ -447,6 +443,7 @@ BOOL_32 EgBasedLib::ComputeSurfaceInfoMicroTiled(
return valid;
}
/**
****************************************************************************************************
* EgBasedLib::ComputeSurfaceInfoMacroTiled
@@ -751,6 +748,7 @@ BOOL_32 EgBasedLib::ComputeSurfaceAlignmentsMicroTiled(
return valid;
}
/**
****************************************************************************************************
* EgBasedLib::HwlReduceBankWidthHeight
@@ -976,7 +974,7 @@ BOOL_32 EgBasedLib::SanityCheckMacroTiled(
) const
{
BOOL_32 valid = TRUE;
ASSERTED UINT_32 numPipes = HwlGetPipes(pTileInfo);
UINT_32 numPipes = HwlGetPipes(pTileInfo);
switch (pTileInfo->banks)
{
@@ -1090,7 +1088,6 @@ AddrTileMode EgBasedLib::ComputeSurfaceMipLevelTileMode(
) const
{
UINT_64 bytesPerSlice;
(void)bytesPerSlice;
UINT_32 bytesPerTile;
AddrTileMode expTileMode = baseTileMode;
@@ -1812,6 +1809,7 @@ UINT_64 EgBasedLib::ComputeSurfaceAddrFromCoordMacroTiled(
tileSplitSlice,
pTileInfo);
//
// Split the offset to put some bits below the pipe+bank bits and some above.
//
@@ -2155,6 +2153,7 @@ VOID EgBasedLib::HwlComputePixelCoordFromOffset(
*pSlice += z;
}
/**
****************************************************************************************************
* EgBasedLib::DispatchComputeSurfaceCoordFromAddrDispatch
@@ -2299,6 +2298,7 @@ VOID EgBasedLib::DispatchComputeSurfaceCoordFromAddr(
}
}
/**
****************************************************************************************************
* EgBasedLib::ComputeSurfaceCoordFromAddrMacroTiled
@@ -2343,6 +2343,7 @@ VOID EgBasedLib::ComputeSurfaceCoordFromAddrMacroTiled(
UINT_32 tileIndex;
UINT_64 totalOffset;
UINT_32 bank;
UINT_32 pipe;
UINT_32 groupBits = m_pipeInterleaveBytes << 3;
@@ -2664,6 +2665,7 @@ ADDR_E_RETURNCODE EgBasedLib::HwlExtractBankPipeSwizzle(
return ADDR_OK;
}
/**
****************************************************************************************************
* EgBasedLib::HwlCombineBankPipeSwizzle
@@ -2725,7 +2727,6 @@ ADDR_E_RETURNCODE EgBasedLib::HwlComputeBaseSwizzle(
};
UINT_32 pipes = HwlGetPipes(pTileInfo);
(void)pipes;
UINT_32 banks = pTileInfo ? pTileInfo->banks : 2;
UINT_32 hwNumBanks;
@@ -3033,6 +3034,7 @@ UINT_32 EgBasedLib::ComputeBankFromCoord(
break;
}
//
// Compute bank rotation for the tile split slice.
//
@@ -3130,6 +3132,7 @@ UINT_32 EgBasedLib::ComputePipeRotation(
return rotation;
}
/**
****************************************************************************************************
* EgBasedLib::ComputeBankRotation
@@ -3172,6 +3175,7 @@ UINT_32 EgBasedLib::ComputeBankRotation(
return rotation;
}
/**
****************************************************************************************************
* EgBasedLib::ComputeHtileBytes
@@ -4096,7 +4100,7 @@ UINT_64 EgBasedLib::HwlGetSizeAdjustmentMicroTiled(
) const
{
UINT_64 logicalSliceSize;
ASSERTED UINT_64 physicalSliceSize;
UINT_64 physicalSliceSize;
UINT_32 pitch = *pPitch;
UINT_32 height = *pHeight;
@@ -4153,4 +4157,3 @@ UINT_32 EgBasedLib::HwlStereoCheckRightOffsetPadding(
} // V1
} // Addr
} // rocr
runtime/hsa-runtime/image/addrlib/src/r800/egbaddrlib.h
+25 -29
مشاهده پرونده
@@ -1,28 +1,27 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
/**
****************************************************************************************************
@@ -37,10 +36,8 @@
#include "addrlib1.h"
namespace rocr {
namespace Addr
{
namespace V1
{
namespace Addr {
namespace V1 {
/// Structures for functions
struct CoordFromBankPipe
{
@@ -428,6 +425,5 @@ protected:
} // Addr
} // rocr
#endif
runtime/hsa-runtime/image/addrlib/src/r800/siaddrlib.cpp
+25 -29
مشاهده پرونده
@@ -1,28 +1,27 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
/**
****************************************************************************************************
@@ -39,8 +38,7 @@
////////////////////////////////////////////////////////////////////////////////////////////////////
////////////////////////////////////////////////////////////////////////////////////////////////////
namespace rocr {
namespace Addr
{
namespace Addr {
/**
****************************************************************************************************
@@ -113,7 +111,6 @@ SiLib::SiLib(const Client* pClient)
m_noOfEntries(0),
m_numEquations(0)
{
m_class = SI_ADDRLIB;
memset(&m_settings, 0, sizeof(m_settings));
}
@@ -1931,7 +1928,7 @@ ChipFamily SiLib::HwlConvertChipFamily(
m_settings.isHainan = ASICREV_IS_HAINAN_V(uChipRevision);
break;
default:
ADDR_ASSERT(!"This should be a Fusion");
ADDR_ASSERT(!"No Chip found");
break;
}
@@ -3873,4 +3870,3 @@ BOOL_32 SiLib::IsEquationSupported(
} // V1
} // Addr
} // rocr
runtime/hsa-runtime/image/addrlib/src/r800/siaddrlib.h
+25 -30
مشاهده پرونده
@@ -1,28 +1,27 @@
/*
* Copyright © 2007-2019 Advanced Micro Devices, Inc.
* All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining
* a copy of this software and associated documentation files (the
* "Software"), to deal in the Software without restriction, including
* without limitation the rights to use, copy, modify, merge, publish,
* distribute, sub license, and/or sell copies of the Software, and to
* permit persons to whom the Software is furnished to do so, subject to
* the following conditions:
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
* AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* The above copyright notice and this permission notice (including the
* next paragraph) shall be included in all copies or substantial portions
* of the Software.
*/
************************************************************************************************************************
*
* Copyright (C) 2007-2022 Advanced Micro Devices, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE
*
***********************************************************************************************************************/
/**
****************************************************************************************************
@@ -38,10 +37,8 @@
#include "egbaddrlib.h"
namespace rocr {
namespace Addr
{
namespace V1
{
namespace Addr {
namespace V1 {
/**
****************************************************************************************************
@@ -343,7 +340,5 @@ private:
} // V1
} // Addr
} // rocr
#endif
runtime/hsa-runtime/image/addrlib/util/macros.h
-328
مشاهده پرونده
@@ -1,328 +0,0 @@
/*
* Copyright © 2014 Intel Corporation
*
* Permission is hereby granted, free of charge, to any person obtaining a
* copy of this software and associated documentation files (the "Software"),
* to deal in the Software without restriction, including without limitation
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
* and/or sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice (including the next
* paragraph) shall be included in all copies or substantial portions of the
* Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*/
#ifndef UTIL_MACROS_H
#define UTIL_MACROS_H
#include <assert.h>
/* Compute the size of an array */
#ifndef ARRAY_SIZE
# define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
#endif
/* For compatibility with Clang's __has_builtin() */
#ifndef __has_builtin
# define __has_builtin(x) 0
#endif
/**
* __builtin_expect macros
*/
#if !defined(HAVE___BUILTIN_EXPECT)
# define __builtin_expect(x, y) (x)
#endif
#ifndef likely
# ifdef HAVE___BUILTIN_EXPECT
# define likely(x) __builtin_expect(!!(x), 1)
# define unlikely(x) __builtin_expect(!!(x), 0)
# else
# define likely(x) (x)
# define unlikely(x) (x)
# endif
#endif
/**
* Static (compile-time) assertion.
*/
#define STATIC_ASSERT(COND) do { \
static_assert(COND, "Addrlib legacy static_assert failure."); \
} while(false)
/**
* Unreachable macro. Useful for suppressing "control reaches end of non-void
* function" warnings.
*/
#if defined(HAVE___BUILTIN_UNREACHABLE) || __has_builtin(__builtin_unreachable)
#define unreachable(str) \
do { \
assert(!str); \
__builtin_unreachable(); \
} while (0)
#elif defined (_MSC_VER)
#define unreachable(str) \
do { \
assert(!str); \
__assume(0); \
} while (0)
#else
#define unreachable(str) assert(!str)
#endif
/**
* Assume macro. Useful for expressing our assumptions to the compiler,
* typically for purposes of silencing warnings.
*/
#if __has_builtin(__builtin_assume)
#define assume(expr) \
do { \
assert(expr); \
__builtin_assume(expr); \
} while (0)
#elif defined HAVE___BUILTIN_UNREACHABLE
#define assume(expr) ((expr) ? ((void) 0) \
: (assert(!"assumption failed"), \
__builtin_unreachable()))
#elif defined (_MSC_VER)
#define assume(expr) __assume(expr)
#else
#define assume(expr) assert(expr)
#endif
/* Attribute const is used for functions that have no effects other than their
* return value, and only rely on the argument values to compute the return
* value. As a result, calls to it can be CSEed. Note that using memory
* pointed to by the arguments is not allowed for const functions.
*/
#ifdef HAVE_FUNC_ATTRIBUTE_CONST
#define ATTRIBUTE_CONST __attribute__((__const__))
#else
#define ATTRIBUTE_CONST
#endif
#ifdef HAVE_FUNC_ATTRIBUTE_FLATTEN
#define FLATTEN __attribute__((__flatten__))
#else
#define FLATTEN
#endif
#ifdef HAVE_FUNC_ATTRIBUTE_FORMAT
#define PRINTFLIKE(f, a) __attribute__ ((format(__printf__, f, a)))
#else
#define PRINTFLIKE(f, a)
#endif
#ifdef HAVE_FUNC_ATTRIBUTE_MALLOC
#define MALLOCLIKE __attribute__((__malloc__))
#else
#define MALLOCLIKE
#endif
/* Forced function inlining */
/* Note: Clang also sets __GNUC__ (see other cases below) */
#ifndef ALWAYS_INLINE
# if defined(__GNUC__)
# define ALWAYS_INLINE inline __attribute__((always_inline))
# elif defined(_MSC_VER)
# define ALWAYS_INLINE __forceinline
# else
# define ALWAYS_INLINE inline
# endif
#endif
/* Used to optionally mark structures with misaligned elements or size as
* packed, to trade off performance for space.
*/
#ifdef HAVE_FUNC_ATTRIBUTE_PACKED
#define PACKED __attribute__((__packed__))
#else
#define PACKED
#endif
/* Attribute pure is used for functions that have no effects other than their
* return value. As a result, calls to it can be dead code eliminated.
*/
#ifdef HAVE_FUNC_ATTRIBUTE_PURE
#define ATTRIBUTE_PURE __attribute__((__pure__))
#else
#define ATTRIBUTE_PURE
#endif
#ifdef HAVE_FUNC_ATTRIBUTE_RETURNS_NONNULL
#define ATTRIBUTE_RETURNS_NONNULL __attribute__((__returns_nonnull__))
#else
#define ATTRIBUTE_RETURNS_NONNULL
#endif
#ifndef NORETURN
# ifdef _MSC_VER
# define NORETURN __declspec(noreturn)
# elif defined HAVE_FUNC_ATTRIBUTE_NORETURN
# define NORETURN __attribute__((__noreturn__))
# else
# define NORETURN
# endif
#endif
#ifdef __cplusplus
/**
* Macro function that evaluates to true if T is a trivially
* destructible type -- that is, if its (non-virtual) destructor
* performs no action and all member variables and base classes are
* trivially destructible themselves.
*/
# if (defined(__clang__) && defined(__has_feature))
# if __has_feature(has_trivial_destructor)
# define HAS_TRIVIAL_DESTRUCTOR(T) __has_trivial_destructor(T)
# endif
# elif defined(__GNUC__)
# if ((__GNUC__ > 4) || ((__GNUC__ == 4) && (__GNUC_MINOR__ >= 3)))
# define HAS_TRIVIAL_DESTRUCTOR(T) __has_trivial_destructor(T)
# endif
# elif defined(_MSC_VER) && !defined(__INTEL_COMPILER)
# define HAS_TRIVIAL_DESTRUCTOR(T) __has_trivial_destructor(T)
# endif
# ifndef HAS_TRIVIAL_DESTRUCTOR
/* It's always safe (if inefficient) to assume that a
* destructor is non-trivial.
*/
# define HAS_TRIVIAL_DESTRUCTOR(T) (false)
# endif
#endif
/**
* PUBLIC/USED macros
*
* If we build the library with gcc's -fvisibility=hidden flag, we'll
* use the PUBLIC macro to mark functions that are to be exported.
*
* We also need to define a USED attribute, so the optimizer doesn't
* inline a static function that we later use in an alias. - ajax
*/
#ifndef PUBLIC
# if defined(__GNUC__)
# define PUBLIC __attribute__((visibility("default")))
# define USED __attribute__((used))
# elif defined(_MSC_VER)
# define PUBLIC __declspec(dllexport)
# define USED
# else
# define PUBLIC
# define USED
# endif
#endif
/**
* UNUSED marks variables (or sometimes functions) that have to be defined,
* but are sometimes (or always) unused beyond that. A common case is for
* a function parameter to be used in some build configurations but not others.
* Another case is fallback vfuncs that don't do anything with their params.
*
* Note that this should not be used for identifiers used in `assert()`;
* see ASSERTED below.
*/
#ifdef HAVE_FUNC_ATTRIBUTE_UNUSED
#define UNUSED __attribute__((unused))
#else
#define UNUSED
#endif
/**
* Use ASSERTED to indicate that an identifier is unused outside of an `assert()`,
* so that assert-free builds don't get "unused variable" warnings.
*/
#ifdef NDEBUG
#define ASSERTED UNUSED
#else
#define ASSERTED
#endif
#ifdef HAVE_FUNC_ATTRIBUTE_WARN_UNUSED_RESULT
#define MUST_CHECK __attribute__((warn_unused_result))
#else
#define MUST_CHECK
#endif
#if defined(__GNUC__)
#define ATTRIBUTE_NOINLINE __attribute__((noinline))
#else
#define ATTRIBUTE_NOINLINE
#endif
/**
* Check that STRUCT::FIELD can hold MAXVAL. We use a lot of bitfields
* in Mesa/gallium. We have to be sure they're of sufficient size to
* hold the largest expected value.
* Note that with MSVC, enums are signed and enum bitfields need one extra
* high bit (always zero) to ensure the max value is handled correctly.
* This macro will detect that with MSVC, but not GCC.
*/
#define ASSERT_BITFIELD_SIZE(STRUCT, FIELD, MAXVAL) \
do { \
ASSERTED STRUCT s; \
s.FIELD = (MAXVAL); \
assert((int) s.FIELD == (MAXVAL) && "Insufficient bitfield size!"); \
} while (0)
/** Compute ceiling of integer quotient of A divided by B. */
#define DIV_ROUND_UP( A, B ) ( ((A) + (B) - 1) / (B) )
/** Clamp X to [MIN,MAX]. Turn NaN into MIN, arbitrarily. */
#define CLAMP( X, MIN, MAX ) ( (X)>(MIN) ? ((X)>(MAX) ? (MAX) : (X)) : (MIN) )
/** Minimum of two values: */
#define MIN2( A, B ) ( (A)<(B) ? (A) : (B) )
/** Maximum of two values: */
#define MAX2( A, B ) ( (A)>(B) ? (A) : (B) )
/** Minimum and maximum of three values: */
#define MIN3( A, B, C ) ((A) < (B) ? MIN2(A, C) : MIN2(B, C))
#define MAX3( A, B, C ) ((A) > (B) ? MAX2(A, C) : MAX2(B, C))
/** Align a value to a power of two */
#define ALIGN_POT(x, pot_align) (((x) + (pot_align) - 1) & ~((pot_align) - 1))
/**
* Macro for declaring an explicit conversion operator. Defaults to an
* implicit conversion if C++11 is not supported.
*/
#if __cplusplus >= 201103L
#define EXPLICIT_CONVERSION explicit
#elif defined(__cplusplus)
#define EXPLICIT_CONVERSION
#endif
/** Set a single bit */
#define BITFIELD_BIT(b) (1u << (b))
/** Set all bits up to excluding bit b */
#define BITFIELD_MASK(b) \
((b) == 32 ? (~0u) : BITFIELD_BIT((b) % 32) - 1)
/** Set count bits starting from bit b */
#define BITFIELD_RANGE(b, count) \
(BITFIELD_MASK((b) + (count)) & ~BITFIELD_MASK(b))
/** Set a single bit */
#define BITFIELD64_BIT(b) (1ull << (b))
/** Set all bits up to excluding bit b */
#define BITFIELD64_MASK(b) \
((b) == 64 ? (~0ull) : BITFIELD64_BIT(b) - 1)
/** Set count bits starting from bit b */
#define BITFIELD64_RANGE(b, count) \
(BITFIELD64_MASK((b) + (count)) & ~BITFIELD64_MASK(b))
#endif /* UTIL_MACROS_H */
runtime/hsa-runtime/image/image_manager_gfx11.h
+1 -1
مشاهده پرونده
@@ -43,7 +43,7 @@
#ifndef EXT_IMAGE_IMAGE_MANAGER_GFX11_H_
#define EXT_IMAGE_IMAGE_MANAGER_GFX11_H_
#include "addrlib/inc/addrinterface.h" //DYSDEBUG TODO: replace with new addrLib
#include "addrlib/inc/addrinterface.h"
#include "image_manager_kv.h"
namespace rocr {
runtime/hsa-runtime/image/resource_gfx11.h
-25
مشاهده پرونده
@@ -700,31 +700,6 @@ TYPE_SRGB = 0x00000009,
TYPE_UNORM_UINT = 0x0000000a,
TYPE_REVERSED_UNORM = 0x0000000b,
TYPE_FLOAT_CLAMP = 0x0000000c,
TYPE_F1 = 0x0000000d,
TYPE_F2 = 0x0000000e,
TYPE_F4 = 0x0000000f,
TYPE_F8 = 0x00000010,
TYPE_4X4 = 0x00000011,
TYPE_5X4 = 0x00000012,
TYPE_5X5 = 0x00000013,
TYPE_6X5 = 0x00000014,
TYPE_6X6 = 0x00000015,
TYPE_8X5 = 0x00000016,
TYPE_8X6 = 0x00000017,
TYPE_8X8 = 0x00000018,
TYPE_10X5 = 0x00000019,
TYPE_10X6 = 0x0000001a,
TYPE_10X8 = 0x0000001b,
TYPE_10X10 = 0x0000001c,
TYPE_12X10 = 0x0000001d,
TYPE_12X12 = 0x0000001e,
TYPE_3X3X3 = 0x0000001f,
TYPE_4X4X3 = 0x00000020,
TYPE_4X4X4 = 0x00000021,
TYPE_5X4X4 = 0x00000022,
TYPE_5X5X4 = 0x00000023,
TYPE_6X5X5 = 0x00000024,
TYPE_6X6X6 = 0x00000025
} type;
enum FORMAT {
runtime/hsa-runtime/image/resource_nv.h
-25
مشاهده پرونده
@@ -717,31 +717,6 @@ TYPE_SRGB = 0x00000009,
TYPE_UNORM_UINT = 0x0000000a,
TYPE_REVERSED_UNORM = 0x0000000b,
TYPE_FLOAT_CLAMP = 0x0000000c,
TYPE_F1 = 0x0000000d,
TYPE_F2 = 0x0000000e,
TYPE_F4 = 0x0000000f,
TYPE_F8 = 0x00000010,
TYPE_4X4 = 0x00000011,
TYPE_5X4 = 0x00000012,
TYPE_5X5 = 0x00000013,
TYPE_6X5 = 0x00000014,
TYPE_6X6 = 0x00000015,
TYPE_8X5 = 0x00000016,
TYPE_8X6 = 0x00000017,
TYPE_8X8 = 0x00000018,
TYPE_10X5 = 0x00000019,
TYPE_10X6 = 0x0000001a,
TYPE_10X8 = 0x0000001b,
TYPE_10X10 = 0x0000001c,
TYPE_12X10 = 0x0000001d,
TYPE_12X12 = 0x0000001e,
TYPE_3X3X3 = 0x0000001f,
TYPE_4X4X3 = 0x00000020,
TYPE_4X4X4 = 0x00000021,
TYPE_5X4X4 = 0x00000022,
TYPE_5X5X4 = 0x00000023,
TYPE_6X5X5 = 0x00000024,
TYPE_6X6X6 = 0x00000025
} type;
enum FORMAT {