SWDEV-333557 - add PAL_HIP_IPC_FLAG for PAL HIP device allocations

Change-Id: I9017f4e3b03d4817bf233c788e30775fb2297589


[ROCm/clr commit: 04b9ab49eb]

projects/clr/rocclr/device/pal/paldevice.cpp

@@ -2266,7 +2266,7 @@ void* Device::svmAlloc(amd::Context& context, size_t size, size_t alignment, cl_
   constexpr bool kForceAllocation = true;
   alignment = std::max(alignment, static_cast<size_t>(info_.memBaseAddrAlign_));
 
-  if (amd::IS_HIP) {
+  if (amd::IS_HIP && PAL_HIP_IPC_FLAG) {
     //set interprocess for IPC memory support
     flags |= ROCCLR_MEM_INTERPROCESS;
   }

projects/clr/rocclr/device/pal/palresource.cpp

@@ -2057,7 +2057,7 @@ bool CoarseMemorySubAllocator::CreateChunk(const Pal::IGpuMemory* reserved_va) {
   createInfo.heaps[0] = Pal::GpuHeapInvisible;
   createInfo.heaps[1] = Pal::GpuHeapLocal;
   createInfo.mallPolicy = static_cast<Pal::GpuMemMallPolicy>(device_->settings().mallPolicy_);
-  if (amd::IS_HIP) {
+  if (amd::IS_HIP && PAL_HIP_IPC_FLAG) {
     //set interprocess for IPC memory support
     createInfo.flags.interprocess = 1;
   }

projects/clr/rocclr/utils/flags.hpp

@@ -253,6 +253,8 @@ release(bool, HIP_MEM_POOL_SUPPORT, false,                                    \
         "Enables memory pool support in HIP")                                 \
 release(bool, HIP_MEM_POOL_USE_VM, IS_WINDOWS,                                \
         "Enables memory pool support in HIP")                                 \
+release(bool, PAL_HIP_IPC_FLAG, false,                                        \
+        "Enable interprocess flag for device allocation in PAL HIP")          \
 release(uint, PAL_FORCE_ASIC_REVISION, 0,                                     \
         "Force a specific asic revision for all devices")                     \
 release(bool, PAL_EMBED_KERNEL_MD, false,                                     \