P4 to Git Change 1084962 by gandryey@gera-dev-w7 on 2014/10/07 14:25:46
ECR #304775 - Remove GPU_PREALLOC_ADDR_SPACE key - Previously the key was used for 64bit ISA testing on boards with <4GB frame buffer Affected files ... ... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpudefs.hpp#114 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpudevice.cpp#467 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpusettings.cpp#289 edit ... //depot/stg/opencl/drivers/opencl/runtime/device/gpu/gpusettings.hpp#88 edit ... //depot/stg/opencl/drivers/opencl/runtime/utils/flags.hpp#215 edit
Цей коміт міститься в:
@@ -57,9 +57,6 @@ const static uint CalOfflineImpl = 0xffffffff;
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//! Alignment restriciton for the pinned memory
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const static size_t PinnedMemoryAlignment = 4 * Ki;
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//! Reserved address space
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const static cl_ulong ReservedAdressSpaceSize = static_cast<cl_ulong>(4) * Gi;
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//! Defines all supported ASIC families
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enum AsicFamilies {
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Family7xx,
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@@ -520,14 +520,6 @@ void Device::fillDeviceInfo(
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info_.globalMemSize_ +=
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(static_cast<cl_ulong>(calAttr.uncachedRemoteRAM) * Mi) / 2;
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}
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// Check if runtime has to reserve address space for testing
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if (settings().use64BitPtr_ && settings().preallocAddrSpace_ &&
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(info_.globalMemSize_ > ReservedAdressSpaceSize)) {
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info_.globalMemSize_ -= ReservedAdressSpaceSize;
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}
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else {
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reinterpret_cast<gpu::Settings*>(settings_)->preallocAddrSpace_ = false;
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}
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// We try to calculate the largest available memory size from
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// the largest available block in either heap. In theory this
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@@ -954,9 +946,6 @@ Device::initializeHeapResources()
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}
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size_t dummySize = amd::Os::pageSize();
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if (heap()->isVirtual() && settings().preallocAddrSpace_) {
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dummySize = static_cast<size_t>(ReservedAdressSpaceSize - Mi);
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}
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// Allocate a dummy page for NULL pointer processing
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dummyPage_ = new(*context_) amd::Buffer(*context_, 0, dummySize);
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@@ -110,9 +110,6 @@ Settings::Settings()
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minWorkloadTime_ = 1; // 0.1 ms
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maxWorkloadTime_ = 5000; // 500 ms
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// Preallocates address space
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preallocAddrSpace_ = GPU_PREALLOC_ADDR_SPACE;
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// Controls tiled images in persistent
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//!@note IOL for Linux doesn't setup tiling aperture in CMM/QS
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linearPersistentImage_ = false;
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@@ -63,7 +63,6 @@ public:
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uint viPlus_: 1; //!< VI and post VI features
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uint rectLinearDMA_: 1; //!< Rectangular linear DRMDMA support
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uint threadTraceEnable_: 1; //!< Thread trace enable
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uint preallocAddrSpace_: 1; //!< Preallocates address space
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uint linearPersistentImage_: 1; //!< Allocates linear images in persistent
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uint useSingleScratch_: 1; //!< Allocates single scratch per device
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uint sdmaProfiling_: 1; //!< Enables SDMA profiling
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@@ -74,7 +73,7 @@ public:
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uint asyncMemCopy_: 1; //!< Use async memory transfers
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uint hsailDirectSRD_: 1; //!< Controls direct SRD for HSAIL
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uint useDeviceQueue_: 1; //!< Submit to separate device queue
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uint reserved_: 1;
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uint reserved_: 2;
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};
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uint value_;
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};
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@@ -102,8 +102,6 @@ release(bool, GPU_FORCE_64BIT_PTR, 0, \
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"Forces 64 bit pointers on GPU") \
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release(bool, GPU_FORCE_OCL20_32BIT, 0, \
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"Forces 32 bit apps to take CLANG\HSAIL path") \
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release(bool, GPU_PREALLOC_ADDR_SPACE, 0, \
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"Preallocates 4GB address space. Valid for boards > 4GB") \
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release(bool, GPU_RAW_TIMESTAMP, 0, \
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"Reports GPU raw timestamps in GPU timeline") \
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release(bool, CPU_IMAGE_SUPPORT, true, \
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