Added gfx940 ISA
Signed-off-by: Mike Li <Tianxinmike.Li@amd.com>
Change-Id: Icb1830fe186abc69fe7ee709b7f12b882cab9e87
[ROCm/ROCR-Runtime commit: bd98a1e5bf]
This commit is contained in:
Mike Li
zatwierdzone przez
David Yat Sin
David Yat Sin
rodzic
bd8c4079da
commit
fe9b01e916
@@ -82,7 +82,7 @@ if ( PROC_RESULT EQUAL "0" AND NOT EVAL_RESULT STREQUAL "" )
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endif()
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set (CPACK_RPM_PACKAGE_REQUIRES "rocm-core")
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set(DEFAULT_TARGETS "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810;gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx1010;gfx1011;gfx1012;gfx1013;gfx1030;gfx1031;gfx1032;gfx1033;gfx1034;gfx1035;gfx1036;gfx1100;gfx1101;gfx1102;gfx1103")
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set(DEFAULT_TARGETS "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810;gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx940;gfx1010;gfx1011;gfx1012;gfx1013;gfx1030;gfx1031;gfx1032;gfx1033;gfx1034;gfx1035;gfx1036;gfx1100;gfx1101;gfx1102;gfx1103")
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#
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# Currently support for Windows platform is not present
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@@ -314,7 +314,8 @@ void GpuAgent::AssembleShader(const char* func_name, AssembleTarget assemble_tar
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asic_shader = &compiled_shader_it->second.compute_8;
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break;
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case 9:
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if((isa_->GetMinorVersion() == 0) && (isa_->GetStepping() == 10))
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if(((isa_->GetMinorVersion() == 0) && (isa_->GetStepping() == 10)) ||
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((isa_->GetMinorVersion() == 4) && (isa_->GetStepping() == 0)))
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asic_shader = &compiled_shader_it->second.compute_90a;
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else
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asic_shader = &compiled_shader_it->second.compute_9;
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@@ -368,8 +369,9 @@ void GpuAgent::AssembleShader(const char* func_name, AssembleTarget assemble_tar
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AMD_HSA_BITS_SET(header->compute_pgm_rsrc2,
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AMD_COMPUTE_PGM_RSRC_TWO_ENABLE_SGPR_WORKGROUP_ID_X, 1);
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if ((isa_->GetMajorVersion() == 9) && (isa_->GetMinorVersion() == 0) &&
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(isa_->GetStepping() == 10)) {
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if ((isa_->GetMajorVersion() == 9) &&
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(((isa_->GetMinorVersion() == 0) && (isa_->GetStepping() == 10)) ||
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((isa_->GetMinorVersion() == 4) && (isa_->GetStepping() == 0)))) {
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// Program COMPUTE_PGM_RSRC3.ACCUM_OFFSET for 0 ACC VGPRs on gfx90a.
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// FIXME: Assemble code objects from source at build time
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int gran_accvgprs = ((gran_vgprs + 1) * 8) / 4 - 1;
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@@ -1906,6 +1906,10 @@ static std::string ConvertOldTargetNameToNew(
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NewName = "amdgcn-amd-amdhsa--gfx90c";
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xnack_supported = true;
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}
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else if (OldName == "AMD:AMDGPU:9:4:0") {
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NewName = "amdgcn-amd-amdhsa--gfx940";
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xnack_supported = true;
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}
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else {
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// Code object v2 only supports asics up to gfx906 plus gfx90c. Do NOT add
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// handling of new asics into this if-else-if* block.
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@@ -297,6 +297,15 @@ constexpr size_t hsa_name_size = 63;
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ISAREG_ENTRY_GEN("gfx90c", 9, 0, 12, unsupported, any, 64)
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ISAREG_ENTRY_GEN("gfx90c:xnack-", 9, 0, 12, unsupported, disabled, 64)
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ISAREG_ENTRY_GEN("gfx90c:xnack+", 9, 0, 12, unsupported, enabled, 64)
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ISAREG_ENTRY_GEN("gfx940", 9, 4, 0, any, any, 64)
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ISAREG_ENTRY_GEN("gfx940:xnack-", 9, 4, 0, any, disabled, 64)
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ISAREG_ENTRY_GEN("gfx940:xnack+", 9, 4, 0, any, enabled, 64)
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ISAREG_ENTRY_GEN("gfx940:sramecc-", 9, 4, 0, disabled, any, 64)
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ISAREG_ENTRY_GEN("gfx940:sramecc+", 9, 4, 0, enabled, any, 64)
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ISAREG_ENTRY_GEN("gfx940:sramecc-:xnack-", 9, 4, 0, disabled, disabled, 64)
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ISAREG_ENTRY_GEN("gfx940:sramecc-:xnack+", 9, 4, 0, disabled, enabled, 64)
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ISAREG_ENTRY_GEN("gfx940:sramecc+:xnack-", 9, 4, 0, enabled, disabled, 64)
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ISAREG_ENTRY_GEN("gfx940:sramecc+:xnack+", 9, 4, 0, enabled, enabled, 64)
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ISAREG_ENTRY_GEN("gfx1010", 10, 1, 0, unsupported, any, 32)
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ISAREG_ENTRY_GEN("gfx1010:xnack-", 10, 1, 0, unsupported, disabled, 32)
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ISAREG_ENTRY_GEN("gfx1010:xnack+", 10, 1, 0, unsupported, enabled, 32)
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@@ -85,6 +85,7 @@ extern uint8_t ocl_blit_object_gfx908[];
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extern uint8_t ocl_blit_object_gfx909[];
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extern uint8_t ocl_blit_object_gfx90a[];
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extern uint8_t ocl_blit_object_gfx90c[];
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extern uint8_t ocl_blit_object_gfx940[];
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extern uint8_t ocl_blit_object_gfx1010[];
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extern uint8_t ocl_blit_object_gfx1011[];
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extern uint8_t ocl_blit_object_gfx1012[];
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@@ -1007,6 +1008,8 @@ hsa_status_t BlitKernel::GetPatchedBlitObject(const char* agent_name,
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*blit_code_object = ocl_blit_object_gfx90a;
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} else if (sname == "gfx90c") {
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*blit_code_object = ocl_blit_object_gfx90c;
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} else if (sname == "gfx940") {
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*blit_code_object = ocl_blit_object_gfx940;
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} else if (sname == "gfx1010") {
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*blit_code_object = ocl_blit_object_gfx1010;
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} else if (sname == "gfx1011") {
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@@ -47,7 +47,7 @@ find_package(Clang REQUIRED HINTS ${CMAKE_PREFIX_PATH}/llvm PATHS /opt/rocm/llvm
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# Determine the target devices if not specified
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if (NOT DEFINED TARGET_DEVICES)
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set (TARGET_DEVICES "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810;gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx1010;gfx1011;gfx1012;gfx1013;gfx1030;gfx1031;gfx1032;gfx1033;gfx1034;gfx1035;gfx1036;gfx1100;gfx1101;gfx1102;gfx1103")
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set(TARGET_DEVICES "gfx700;gfx701;gfx702;gfx801;gfx802;gfx803;gfx805;gfx810;gfx900;gfx902;gfx904;gfx906;gfx908;gfx909;gfx90a;gfx90c;gfx940;gfx1010;gfx1011;gfx1012;gfx1013;gfx1030;gfx1031;gfx1032;gfx1033;gfx1034;gfx1035;gfx1036;gfx1100;gfx1101;gfx1102;gfx1103")
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endif()
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set( TARGET_DEVICES ${TARGET_DEVICES} CACHE STRING "Build targets" FORCE )
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@@ -119,7 +119,7 @@ enum : unsigned {
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EF_AMDGPU_MACH_AMDGCN_GFX1035 = 0x03d,
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EF_AMDGPU_MACH_AMDGCN_GFX1034 = 0x03e,
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EF_AMDGPU_MACH_AMDGCN_GFX90A = 0x03f,
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EF_AMDGPU_MACH_AMDGCN_RESERVED_0X40 = 0x040,
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EF_AMDGPU_MACH_AMDGCN_GFX940 = 0x040,
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EF_AMDGPU_MACH_AMDGCN_GFX1100 = 0x041,
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EF_AMDGPU_MACH_AMDGCN_GFX1013 = 0x042,
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EF_AMDGPU_MACH_AMDGCN_GFX1103 = 0x044,
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@@ -643,6 +643,8 @@ namespace code {
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mach = ELF::EF_AMDGPU_MACH_AMDGCN_GFX906;
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else if (old_name == "AMD:AMDGPU:9:0:12")
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mach = ELF::EF_AMDGPU_MACH_AMDGCN_GFX90C;
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else if (old_name == "AMD:AMDGPU:9:4:0")
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mach = ELF::EF_AMDGPU_MACH_AMDGCN_GFX940;
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else if (old_name == "AMD:AMDGPU:11:0:0")
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mach = ELF::EF_AMDGPU_MACH_AMDGCN_GFX1100;
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else if (old_name == "AMD:AMDGPU:11:0:1")
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