Signed-off-by: Mike Li <Tianxinmike.Li@amd.com>
Change-Id: Icb1830fe186abc69fe7ee709b7f12b882cab9e87


[ROCm/ROCR-Runtime commit: bd98a1e5bf]
Tento commit je obsažen v:
Mike Li
2021-06-08 11:48:11 -04:00
odevzdal David Yat Sin
rodič bd8c4079da
revize fe9b01e916
8 změnil soubory, kde provedl 26 přidání a 6 odebrání
@@ -314,7 +314,8 @@ void GpuAgent::AssembleShader(const char* func_name, AssembleTarget assemble_tar
asic_shader = &compiled_shader_it->second.compute_8;
break;
case 9:
if((isa_->GetMinorVersion() == 0) && (isa_->GetStepping() == 10))
if(((isa_->GetMinorVersion() == 0) && (isa_->GetStepping() == 10)) ||
((isa_->GetMinorVersion() == 4) && (isa_->GetStepping() == 0)))
asic_shader = &compiled_shader_it->second.compute_90a;
else
asic_shader = &compiled_shader_it->second.compute_9;
@@ -368,8 +369,9 @@ void GpuAgent::AssembleShader(const char* func_name, AssembleTarget assemble_tar
AMD_HSA_BITS_SET(header->compute_pgm_rsrc2,
AMD_COMPUTE_PGM_RSRC_TWO_ENABLE_SGPR_WORKGROUP_ID_X, 1);
if ((isa_->GetMajorVersion() == 9) && (isa_->GetMinorVersion() == 0) &&
(isa_->GetStepping() == 10)) {
if ((isa_->GetMajorVersion() == 9) &&
(((isa_->GetMinorVersion() == 0) && (isa_->GetStepping() == 10)) ||
((isa_->GetMinorVersion() == 4) && (isa_->GetStepping() == 0)))) {
// Program COMPUTE_PGM_RSRC3.ACCUM_OFFSET for 0 ACC VGPRs on gfx90a.
// FIXME: Assemble code objects from source at build time
int gran_accvgprs = ((gran_vgprs + 1) * 8) / 4 - 1;
+4
Zobrazit soubor
@@ -1906,6 +1906,10 @@ static std::string ConvertOldTargetNameToNew(
NewName = "amdgcn-amd-amdhsa--gfx90c";
xnack_supported = true;
}
else if (OldName == "AMD:AMDGPU:9:4:0") {
NewName = "amdgcn-amd-amdhsa--gfx940";
xnack_supported = true;
}
else {
// Code object v2 only supports asics up to gfx906 plus gfx90c. Do NOT add
// handling of new asics into this if-else-if* block.
+9
Zobrazit soubor
@@ -297,6 +297,15 @@ constexpr size_t hsa_name_size = 63;
ISAREG_ENTRY_GEN("gfx90c", 9, 0, 12, unsupported, any, 64)
ISAREG_ENTRY_GEN("gfx90c:xnack-", 9, 0, 12, unsupported, disabled, 64)
ISAREG_ENTRY_GEN("gfx90c:xnack+", 9, 0, 12, unsupported, enabled, 64)
ISAREG_ENTRY_GEN("gfx940", 9, 4, 0, any, any, 64)
ISAREG_ENTRY_GEN("gfx940:xnack-", 9, 4, 0, any, disabled, 64)
ISAREG_ENTRY_GEN("gfx940:xnack+", 9, 4, 0, any, enabled, 64)
ISAREG_ENTRY_GEN("gfx940:sramecc-", 9, 4, 0, disabled, any, 64)
ISAREG_ENTRY_GEN("gfx940:sramecc+", 9, 4, 0, enabled, any, 64)
ISAREG_ENTRY_GEN("gfx940:sramecc-:xnack-", 9, 4, 0, disabled, disabled, 64)
ISAREG_ENTRY_GEN("gfx940:sramecc-:xnack+", 9, 4, 0, disabled, enabled, 64)
ISAREG_ENTRY_GEN("gfx940:sramecc+:xnack-", 9, 4, 0, enabled, disabled, 64)
ISAREG_ENTRY_GEN("gfx940:sramecc+:xnack+", 9, 4, 0, enabled, enabled, 64)
ISAREG_ENTRY_GEN("gfx1010", 10, 1, 0, unsupported, any, 32)
ISAREG_ENTRY_GEN("gfx1010:xnack-", 10, 1, 0, unsupported, disabled, 32)
ISAREG_ENTRY_GEN("gfx1010:xnack+", 10, 1, 0, unsupported, enabled, 32)