3115 Commit-ok

Szerző SHA1 Üzenet Dátum
Kent Russell 7ab82d773f kfdtest: Increase timeout in EvictTest
Increasing the timeout will avoid some test failures. This shouldn't
mask any issues as any incomplete shaders should still hang and would
just time out at 180 sec instead of 120 sec.

Signed-off-by: Kent Russell <kent.russell@amd.com>
Change-Id: If4e893ab80d9d159bd0b8b112aa7574abc5e4f44


[ROCm/ROCR-Runtime commit: 9168dfe041]
2021-05-12 14:06:03 -04:00
Sean Keely 9827a48f6b Update README.md
Remove reference to finalizer and images libs.

Change-Id: Ic673da77bb13dea77b477d7bfe799fc2c028ab2a


[ROCm/ROCR-Runtime commit: 5f0e39df63]
2021-05-10 17:53:19 -05:00
Sean Keely 4cad5320c9 Correct merge error.
Old memory properties info name used after removing branches.
This caused the CPU coarse grain pool to initialize with random
bits.

Change-Id: I397bc5ecf09fab69bdf1d7fafadcf54d71b64070


[ROCm/ROCR-Runtime commit: 0439dc90cd]
2021-05-06 18:40:56 -05:00
Sean Keely aff2056789 Add exception forwarding to tools API callbacks.
Prevents poorly written tools which throw in tools interface
callbacks from causing ROCr to catch and return a generic error
code.

Change-Id: I2f5bf7104dc7d4ee688eb48423c7ffdb06bd7702


[ROCm/ROCR-Runtime commit: c9ce27a640]
2021-05-04 02:14:20 -05:00
Mike Li a8ceb5c406 Add Size of VGPR and SGPR to HsaNodeProperties
Signed-off-by: Mike Li <Tianxinmike.Li@amd.com>
Change-Id: I7e6c0c5b9fd90c0bb5f3b7d35362a073afdcf9b8


[ROCm/ROCR-Runtime commit: 47ccc6604d]
2021-05-03 15:16:15 -04:00
Felix Kuehling 5c323f2611 kfdtest: Allow some CS to fail in EvictTest
amdgpu_cs_submit can fail intermittently if another process has too much
memory reserved at the time. Allow a small percental of command
submissions to fail to make the test more robust.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: If9f62b2b6f67be71420016d4e38d4dd6b6bca9a5


[ROCm/ROCR-Runtime commit: 8baf02e80b]
2021-05-03 11:01:35 -04:00
Felix Kuehling c621b721fe kfdtest: Workaround delayed page faults
Delayed page faults from a terminated process can be attributed to the
next process with the same PASID. Work around that by adding a delay
after the Exception tests to allow the kernel to clean up any fault
storms before the next test.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: Id310c13ea9eb92b04d37b95d91a0dd60bd9954e5


[ROCm/ROCR-Runtime commit: bd68646772]
2021-05-03 11:01:24 -04:00
Felix Kuehling 4da176c09d kfdtest: Handle EINTR in waitpid
If the signal arrives too late, it interrupts waitpid. Handle this
situation gracefully.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: If4925c352c81ba7fef8a940460b91f5e720b451e


[ROCm/ROCR-Runtime commit: 25288e07dc]
2021-05-03 11:01:11 -04:00
Felix Kuehling ec289d055f libhsakmt: Add a new device ID for gfx90a
It is gfx90a VF device ID, for virtualization support.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: I9e51d6b58c702d185e6758a9c511e9b8bc72c2f5


[ROCm/ROCR-Runtime commit: d8d8e3ddd6]
2021-04-30 13:42:27 -04:00
Alex Sierra 6ae996c151 kfdtest: SetGetAttributes default access attr returned based on xnack
After unregistered memory is added, now default access attribute
is returned based on xnack configuration.

Change-Id: I8ef44fe1e165ba009622e8112436c1f7a683f6cb
Signed-off-by: Alex Sierra <alex.sierra@amd.com>


[ROCm/ROCR-Runtime commit: 0a2d7d8319]
2021-04-27 14:18:15 -04:00
Harish Kasiviswanathan e4b86db92f libhsakmt: Add DIDs for gfx1032
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: I61e938db3763bc2cdb4e0ea74f9aaae810b5d27b


[ROCm/ROCR-Runtime commit: 9b95185a61]
2021-04-27 09:43:32 -04:00
Eric Huang 00bb7d4179 kfdtest: remove scc bit for cache coherence tests
It is to address gfx90a HW memory model changes.

Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
Change-Id: Ie5c5c5ee5ddfb75c0b4f625baf59ce37b4cc7c31


[ROCm/ROCR-Runtime commit: a6703395f6]
2021-04-26 19:55:49 -04:00
Philip Yang 92fe0df166 kfdtest: skip KFDSVMEvictTest.QueueTest on gfx10
KFDSVMEvictTest.QueueTest shader asm code need update to support gfx10
and gfx9, skip the test to unblock CI test.

Change-Id: Id2842127cf5fc98a652afa82035a4b3603bf5c33
Signed-off-by: Philip Yang <Philip.Yang@amd.com>


[ROCm/ROCR-Runtime commit: 7d53e94750]
2021-04-26 10:34:03 -04:00
Sean Keely ed740bfebc Correct scratch in use computation.
Old logic did not consider memory held in the scratch cache to be
free when deciding whether or not to reclaim.

Change-Id: I7f7c7549c72d743edbf7c53489fe9a453dc4177a


[ROCm/ROCR-Runtime commit: 0b7d9db964]
2021-04-22 20:07:25 -04:00
Sean Keely 13c8e534d3 Report HMM driver support status.
Implements HSA_AMD_SYSTEM_INFO_SVM_SUPPORTED.

Change-Id: If5182edcc1fa067fa514aa2c1bd326c4c42d1b64


[ROCm/ROCR-Runtime commit: ee8b1b64ad]
2021-04-21 21:44:42 -05:00
Sean Keely 1aae64e251 Revert "Revert SVM and XNACK support."
This reverts commit da41352a93.

Conflicts:
	opensrc/hsa-runtime/core/util/flag.h

Change-Id: I16daf41588e6139126d66af54b0693de2e7e39f3


[ROCm/ROCR-Runtime commit: 77046a1aaa]
2021-04-21 14:49:43 -05:00
Harish Kasiviswanathan 8bdbac1bf1 kfdtest: Remove GFX9 assembler meta information
Fixes assembler error. The SP3 backend if already set to FamilyId

Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: If127a71693b293e2748b06efb668a359b939cd14


[ROCm/ROCR-Runtime commit: e06d549337]
2021-04-21 14:27:16 -04:00
Sean Keely 58813ab760 Ensure ROCr created threads have no CPU affinity.
Change-Id: I53828dbaf055b65b61bdd11f0eadfcc806596821


[ROCm/ROCR-Runtime commit: 3127d1ffdc]
2021-04-19 19:47:06 -05:00
Joseph Greathouse cc17bcffee Update GWS tests for gfx1030
gfx10 GPUs such as gfx1030 need new assembly code to test
the GWS. Removed scalar stores and added proper usage of DLC and
VSCNT waits. Removed gfx9-specific assembler meta-values.

Change-Id: I2bbdb77692ace2dba10997f721ba9decaa9be82a


[ROCm/ROCR-Runtime commit: c1c46d9c97]
2021-04-19 10:21:21 -04:00
Mike Li 79a9c9fbcf Add cache information for GPU
Signed-off-by: Mike Li <Tianxinmike.Li@amd.com>
Change-Id: I93606e676ae944fa3d72886654566c75ab8f9806


[ROCm/ROCR-Runtime commit: 77f1bfa277]
2021-04-19 09:55:30 -04:00
Konstantin Zhuravlyov c79bc5fb22 Update documentation of hsa_ven_amd_loader_iterate_executables
Clarify behavior of hsa_ven_amd_loader_iterate_executables during
concurrent calls of executable creation and destruction.

Change-Id: Idc3e3981d4fcc0d58d9f1b7a7578deed20aa490b


[ROCm/ROCR-Runtime commit: 1bdc2f6854]
2021-04-16 20:51:48 -04:00
Konstantin Zhuravlyov b095fec147 Expose iterator for executables
Change-Id: I0c5d39fc33c15a6eb8ee10ff181c2dcf2e042675


[ROCm/ROCR-Runtime commit: 15e54d684d]
2021-04-16 20:51:48 -04:00
Konstantin Zhuravlyov 1c7abea61a Remove loaders.c/hpp
Change-Id: Ida507c2dd2de9172f250172f9c45a639953cb412


[ROCm/ROCR-Runtime commit: e826c365ea]
2021-04-16 20:51:48 -04:00
Mengbing Wang a69a3946c9 Add allocation size limit of 1/2 vram size in rocrtstPerf.Memory_Async_Copy test.
Add the hard limit of allocation size to be 1/2 available vram
to avoid allocation failure when allocation size equals to vram size.

Add printing block size in each round to report progress for long running
test

Add the block size skip info in result form(if any tests skipped).

Affected test:
rocrtstPerf.Memory_Async_Copy

Data Size             Avg Time(us)         Avg BW(GB/s)          MinTime(us)          Peak BW(GB/s)
  128M             638759.570200              0.195692		637569.991000               0.196057
  256M            1270058.822400              0.196841		1268425.758000               0.197095
Notice: Data Size larger than 512M is skipped due to hard limit of 1/2 vram size

Signed-off-by: Mengbing Wang <mengbing.wang@amd.com>
Change-Id: I4c4cea74a608272cc29d222b9399af26b34d7473


[ROCm/ROCR-Runtime commit: cf10c3bc35]
2021-04-16 02:23:48 -04:00
Felix Kuehling 582f013283 kfdtest: add SVM tests
KFD changes are ready, all SVM tests should pass now. Skip SVM tests if
the SVM API is not supported.

Change-Id: I5e358565a0458eea45eae0aaf4969ce3a36574a7
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Sierra <Alex.Sierra@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: e8990cf830]
2021-04-16 00:12:48 -04:00
Philip Yang 4d16b1158f libhsakmt: dynamic HMM and xnack detection
New properties SVMAPISupported added in Thunk spec HSA_CAPABILITY, read
from sysfs from KFD topology.

New local memory property flag CoherentHostAccess added to Thunk
HSA_MEMORYPROPERTY, read from sysfs from KFD topology.

Change-Id: I83933f0e5a61508508168873209dba4af0b77295
Signed-off-by: Philip Yang <Philip.Yang@amd.com>


[ROCm/ROCR-Runtime commit: e8f369b385]
2021-04-16 00:10:56 -04:00
Felix Kuehling 11e3516d74 libhsakmt: add XNACK API set/get mode
XNACK API for GPUs that support this mode. This API
makes calls to amdgpu driver to configure xnack mode.
It supports set xnack mode and query the current mode used.

Change-Id: If865fd0e3f900f008243dc49504e1a0694e1791a
Signed-off-by: Alex Sierra <alex.sierra@amd.com>


[ROCm/ROCR-Runtime commit: bb441d0bdd]
2021-04-16 00:10:41 -04:00
Felix Kuehling 024781d8e8 libhsakmt: add SVM thunk implementation
Implement SVM (Shared Virtual Memory) in the thunk.

Change-Id: I0380150d1d3da48070f9389a06f416d6059d6948
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Sean Keely <Sean.Keely@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Sierra <alex.sierra@amd.com>


[ROCm/ROCR-Runtime commit: dd72f236c1]
2021-04-16 00:10:25 -04:00
Felix Kuehling 71edb8509e libhsakmt: add API to support svm and xnack
Add function definitions to support SVM (shared virtual memory)
and xnack set.

Change-Id: Ia97ad9d0c449d8d500d799f702e1a58e87d65a56
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: c44a4be776]
2021-04-16 00:09:49 -04:00
Felix Kuehling ace48bdb53 libhsakmt: add kfd_ioctl.h svm and xnack support
Add svm (shared virtual memory) range and xnack mode
APIs.

Change-Id: Ibd8d7fe566dc200730da0c892caa71aad7589ebd
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Sierra <alex.sierra@amd.com>


[ROCm/ROCR-Runtime commit: ce26348f3a]
2021-04-16 00:09:17 -04:00
Felix Kuehling f267a5251c libhsakmt: Query KFD version once after opening /dev/kfd
Query the KFD interface version once and store it in a global variable.
This makes it more efficient for KFD APIs to query the API version
later.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: I267f3465f754e78fb21a7c42c5877cd68eaa9d05


[ROCm/ROCR-Runtime commit: 43ce63b68b]
2021-04-16 00:08:54 -04:00
Mike Li 3258d72d3b Get GPU cache information from KFD
Signed-off-by: Mike Li <Tianxinmike.Li@amd.com>
Change-Id: I8dc8c97ae81c3747b7cd88cf2cdb7a9e4694a88d


[ROCm/ROCR-Runtime commit: d077606e22]
2021-04-13 10:29:34 -04:00
Tony Tye e20cccb6e4 Add support for gfx909 and gfx90c
Change-Id: I88158789cdda44a173e3ca26d2c96b8e0ea0e221


[ROCm/ROCR-Runtime commit: a97c14abea]
2021-04-08 22:37:30 +00:00
Kent Russell 3f3b280a4c CMakelists: Build thunk as static by default
This can be overwritten by changing BUILD_SHARED_LIBS=true, but we
default it to static to allow for merging into ROCr

Change-Id: Ic286ef7903a5bc788fe3b84bb13b15bdd3a6f60b


[ROCm/ROCR-Runtime commit: d748d6dce7]
2021-04-08 14:38:20 -04:00
Kent Russell 91ce259273 kfdtest.exclude: Add some more SP3-shader tests to GFX10 exclude
These are failing as well, due to the SP3 shader merge. Blacklist them
as well to avoid more segfaults

Signed-off-by: Kent Russell <kent.russell@amd.com>
Change-Id: I07e142a1aad9b2a5304230f333eeaf4392bea4b7


[ROCm/ROCR-Runtime commit: 66da1c9cd2]
2021-04-05 13:50:15 -04:00
Roberto Di Remigio 1e3e88e20f Treat link flags as a string, rather than a list
Fixes linking failure with gold

Change-Id: Ie9d2a7f68e71a0a793b041d57b8078ead22a93c8
Signed-off-by: Roberto Di Remigio <roberto.diremigio@gmail.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: b6d613d284]
2021-04-05 13:18:33 -04:00
Sean Keely 2b25548eb0 Remove emulator SRAMECC override controls.
Change-Id: Iea9e7870dbf517032f34cebec673c90226b96960


[ROCm/ROCR-Runtime commit: 243e29ba8e]
2021-04-02 02:11:05 -04:00
Sean Keely da41352a93 Revert SVM and XNACK support.
KFD is not ready yet.

Change-Id: I61deb292ddb92185d33504c2115169888d56e211


[ROCm/ROCR-Runtime commit: 5bd153974d]
2021-04-02 02:10:59 -04:00
Ramesh Errabolu 29fa097a82 Override Cpu-Gpu link-weight for Alebaran until a proper fix is available
Change-Id: I1fbc38b788f71cc9c9fc62295223286004689bf9


[ROCm/ROCR-Runtime commit: 25f3dc305f]
2021-04-02 02:10:54 -04:00
Sean Keely dd42ca6dbe Squash merge of cfreehil/amd-temp-gfx90a onto amd-staging.
Includes some workarounds and HMM.
Conflicts:
	opensrc/hsa-runtime/core/runtime/amd_topology.cpp
	opensrc/hsa-runtime/core/util/flag.h

Change-Id: I22976f07964a43dbb228a6231777dbd599112b8d


[ROCm/ROCR-Runtime commit: 7333c77e22]
2021-04-02 02:10:15 -04:00
Sean Keely ea1f545fcc Correct hsa_agent_iterate_isas return code for CPUs.
When no isa's are available no callbacks should be invoked.  This
is not an error and should return success.

Change-Id: Ie4048aa8cbe5c3fdf5431f6a865021549ecf8a13


[ROCm/ROCR-Runtime commit: 4197461b7f]
2021-04-01 00:08:22 -04:00
Sean Keely 465ada0234 Block ROCm 4.1+ running against 4.0 and prior kfd.
Sramecc is misreported in kfd 4.0 and prior.  To prevent possible
corruption due to d16 instructions, deny use of gfx906 with older
kfds and correct misreport for gfx908.  Denial of gfx906 may be
overridden by setting HSA_IGNORE_SRAMECC_MISREPORT=1.

Change-Id: I7d5c3a716fad01c348f8b88cd508cedbf914c989


[ROCm/ROCR-Runtime commit: 45fbe5b192]
2021-04-01 00:03:32 -04:00
Cole Nelson ba4a8f6088 CMakeLists.txt: add ENABLE_LDCONFIG to support multi-version install
Depends-On: I58fdf1d0b4e864b5a61ffe8e335d430d424811ab
Change-Id: I8e3e873fde99eaec79651ce6c3581870e9c2112d
Signed-off-by: Cole Nelson <cole.nelson@amd.com>


[ROCm/ROCR-Runtime commit: a9ce8683eb]
2021-03-27 15:27:55 -07:00
Cole Nelson 7cd0a8435b hsa-runtime: add ENABLE_LDCONFIG to support multi-version install
Depends-On: I58fdf1d0b4e864b5a61ffe8e335d430d424811ab
Change-Id: I0cb6f8711ea5033e84b7e45ce20e7e23d84005c3
Signed-off-by: Cole Nelson <cole.nelson@amd.com>


[ROCm/ROCR-Runtime commit: 72fa4a17fa]
2021-03-26 18:37:04 -04:00
Mengbing Wang 97918cbd7c limit the memory allocation on vram to 3/4 of vram size.
1. As we cannot ganrantee that 100% apu vram are free to be allocated, limit
the allocation size be no more than 3/4 of vram size.
2. Keep the old 1GB allocation limit for dGPU case.
3. Add the alignment check for alloc_size.

Affected tests:

rocrtstStress.Memory_Concurrent_Allocate_Test
rocrtstStress.Memory_Concurrent_Free_Test

Change-Id: Id0023de132024d02f80980ae4237d9d74d9e27d3
Signed-off-by: Mengbing Wang <mengbing.wang@amd.com>


[ROCm/ROCR-Runtime commit: d5855c1658]
2021-03-23 18:59:42 +08:00
Chris Freehill 72dcc0520e Don't overwrite default CMAKE_CXX_FLAGS in tests & samples
Change-Id: I4a2bb0bcc320fb0645e9fc5447775e6a878b960b


[ROCm/ROCR-Runtime commit: 82b2dbe495]
2021-03-17 21:25:18 -05:00
Felix Kuehling 4493f63d55 libhsakmt: New SRAM EDC support bit
The old bit was deprecated, because old buggy user mode depends on it
being always 0. The correct value is now reported in a new bit. New user
mode handles the reported EDC setting correctly, so we can report the
correct value in a new bit.

Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: Ib5d5ed2519810e650458c6b69c97670dab435ddb


[ROCm/ROCR-Runtime commit: d287c60246]
2021-03-11 13:37:45 -05:00
Felix Kuehling 3be7292742 Revert "libhsakmt: add kfd_ioctl.h svm and xnack support"
This reverts commit 07b0758bee.
SVM is not ready yet. This was merged by accident.

Change-Id: I8901594a72e785ba5d25a6448718a570e76fe117
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 41cd7aea2f]
2021-03-10 22:33:49 -05:00
Felix Kuehling cb956dc239 Revert "libhsakmt: add API to support svm and xnack"
This reverts commit 08e65a397a.
SVM is not ready yet. This was merged by accident.

Change-Id: I1bee102823e7e612be8e8f2e0f50580e8692cc80
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 5edd00136d]
2021-03-10 22:33:49 -05:00
Felix Kuehling 9216fb99b8 Revert "libhsakmt: add SVM thunk implementation"
This reverts commit a247255a6a.
SVM is not ready yet. This was merged by accident.

Change-Id: I372f7d293fd38429ec570bc0e0add7e612871594
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>


[ROCm/ROCR-Runtime commit: 4ebda913cd]
2021-03-10 22:33:34 -05:00