76333 Commits

Author SHA1 Message Date
David Galiffi 21ae323dc8 Execute arguments via eval (#28)
Porting https://github.com/ROCm/omnitrace/pull/410.

As eval builtin interprets its arguments in the same way as shell would do, which would need some escape work, otherwise, it won't work if the input arguments contains e.g. a JSON string:

omnitrace-python -- ./test.py --json='{"foo": "bar"}'

[ROCm/rocprofiler-systems commit: ba0efacd3f]
2024-11-14 13:26:52 -05:00
David Galiffi ba0efacd3f Execute arguments via eval (#28)
Porting https://github.com/ROCm/omnitrace/pull/410.

As eval builtin interprets its arguments in the same way as shell would do, which would need some escape work, otherwise, it won't work if the input arguments contains e.g. a JSON string:

omnitrace-python -- ./test.py --json='{"foo": "bar"}'
2024-11-14 13:26:52 -05:00
Konstantin Zhuravlyov 4c7a9a0f67 loader: add gfx9-4-generic support
Change-Id: Icb148f7a78a4ce0fc661e35d0df605e05db2de3d
2024-11-14 12:47:46 -05:00
Konstantin Zhuravlyov bee079fc24 loader: add gfx9-4-generic support
Change-Id: Icb148f7a78a4ce0fc661e35d0df605e05db2de3d


[ROCm/ROCR-Runtime commit: 4c7a9a0f67]
2024-11-14 12:47:46 -05:00
Julia Jiang c4434379c0 SWDEV-497066 - Re-org some HIP APIs in Module management section
Change-Id: I298e1bc1ef743d88b43b598acd7813d35da970d9


[ROCm/hip commit: 5502f89189]
2024-11-14 11:45:20 -05:00
Julia Jiang 5502f89189 SWDEV-497066 - Re-org some HIP APIs in Module management section
Change-Id: I298e1bc1ef743d88b43b598acd7813d35da970d9
2024-11-14 11:45:20 -05:00
Julia Jiang 080687ffdc SWDEV-497324 - Rename CLR as Compute Language Runtime
Change-Id: I5cbb8ca5745c77ae877101ac76921e59dd221dee


[ROCm/hip commit: 5f70ceb5e5]
2024-11-14 11:44:42 -05:00
Julia Jiang 5f70ceb5e5 SWDEV-497324 - Rename CLR as Compute Language Runtime
Change-Id: I5cbb8ca5745c77ae877101ac76921e59dd221dee
2024-11-14 11:44:42 -05:00
jeffqjiangNew 04c28ec306 Added initial code for VP9 support. (#442)
* * rocDecode/VP9: Initial code for VP9.
 - Added structures for VA-API.
 - Added defines for uncompressed header and parsing functions.

* * rocDecode/VP9: Added decode frame call to VA-API.

* * rocDecode/VP9: Added new sequence notification function.

* * rocDecode/VP9: Intra decode started to work.

* * rocDecode/VP9: Minor changes based on review comments.

---------

Co-authored-by: Kiriti Gowda <kiritigowda@gmail.com>

[ROCm/rocdecode commit: 3eb6bc2192]
2024-11-14 10:17:46 -05:00
jeffqjiangNew 3eb6bc2192 Added initial code for VP9 support. (#442)
* * rocDecode/VP9: Initial code for VP9.
 - Added structures for VA-API.
 - Added defines for uncompressed header and parsing functions.

* * rocDecode/VP9: Added decode frame call to VA-API.

* * rocDecode/VP9: Added new sequence notification function.

* * rocDecode/VP9: Intra decode started to work.

* * rocDecode/VP9: Minor changes based on review comments.

---------

Co-authored-by: Kiriti Gowda <kiritigowda@gmail.com>
2024-11-14 10:17:46 -05:00
David Yat Sin f58aff630c rocr: Fix sem_post overflow errors
WaitSemaphore and PostSemaphore are used in the HybridMutex
implementation. If HybridMutex did not have to call WaitSemaphore when
acquired, then calling PostSemaphore would cause the internal count
inside sem_t to slowly grow to large values and eventually cause
overflow.

Change-Id: I173fc17c874b49926e56991405e9086ea8c138fc
2024-11-13 21:57:26 -05:00
David Yat Sin ed5bbc1eeb rocr: Fix sem_post overflow errors
WaitSemaphore and PostSemaphore are used in the HybridMutex
implementation. If HybridMutex did not have to call WaitSemaphore when
acquired, then calling PostSemaphore would cause the internal count
inside sem_t to slowly grow to large values and eventually cause
overflow.

Change-Id: I173fc17c874b49926e56991405e9086ea8c138fc


[ROCm/ROCR-Runtime commit: f58aff630c]
2024-11-13 21:57:26 -05:00
David Yat Sin 4ec730f1dc rocr: Add HSA_SIGNAL_WAIT_ABORT_TIMEOUT
Add support for abort timeout when hsa_signal_wait_relaxed is called and
signal does not clear within timeout.
timeout is in seconds

Change-Id: If1db5a8af33c82ddc4b48968c3d8eceb97d0ea6d
2024-11-13 21:57:02 -05:00
David Yat Sin 3e694d739a rocr: Add HSA_SIGNAL_WAIT_ABORT_TIMEOUT
Add support for abort timeout when hsa_signal_wait_relaxed is called and
signal does not clear within timeout.
timeout is in seconds

Change-Id: If1db5a8af33c82ddc4b48968c3d8eceb97d0ea6d


[ROCm/ROCR-Runtime commit: 4ec730f1dc]
2024-11-13 21:57:02 -05:00
Michael Xie b3dcbdaaf6 SWDEV-492356 - Install hip-test artifacts into a single folder
Change-Id: Ib2a2c021e2546c0233050f11d3dc84f2ea4ff03d


[ROCm/hip-tests commit: 72450ae7a1]
2024-11-13 18:22:32 -05:00
Michael Xie 72450ae7a1 SWDEV-492356 - Install hip-test artifacts into a single folder
Change-Id: Ib2a2c021e2546c0233050f11d3dc84f2ea4ff03d
2024-11-13 18:22:32 -05:00
gabrpham 21d3a831d7 [SWDEV-478748] Changing PCIE Read/Write message TEST FAILURE to WARNING
Signed-off-by: gabrpham <Gabriel.Pham@amd.com>
Change-Id: I534a94b358f7fddbe3c11d249c6e090cf3fa121e


[ROCm/rocm_smi_lib commit: 5428d29b19]
2024-11-13 15:05:26 -06:00
gabrpham 5428d29b19 [SWDEV-478748] Changing PCIE Read/Write message TEST FAILURE to WARNING
Signed-off-by: gabrpham <Gabriel.Pham@amd.com>
Change-Id: I534a94b358f7fddbe3c11d249c6e090cf3fa121e
2024-11-13 15:05:26 -06:00
Julia Jiang 7cc3970a3f SWDEV-497324 - Rename CLR as Compute Language Runtime
Change-Id: Ie2854eeac764fba770b296a63d76d547139d3cc0


[ROCm/clr commit: a27c627731]
2024-11-13 15:04:12 -05:00
Julia Jiang a27c627731 SWDEV-497324 - Rename CLR as Compute Language Runtime
Change-Id: Ie2854eeac764fba770b296a63d76d547139d3cc0
2024-11-13 15:04:12 -05:00
Pran Swarup 9e72fac06d Fix GPU resource data of GPU power and temperature is not present on … (#23)
* Fix GPU resource data of GPU power and temperature is not present on MI300A traces

[ROCm/rocprofiler-systems commit: 51446f715f]
2024-11-13 15:02:43 -05:00
Pran Swarup 51446f715f Fix GPU resource data of GPU power and temperature is not present on … (#23)
* Fix GPU resource data of GPU power and temperature is not present on MI300A traces
2024-11-13 15:02:43 -05:00
Jonathan Kim 865e32baf4 kfdtest: add per-pipe reset negative test
Add basic KFD per-pipe reset support.

Change-Id: I0f68c4d33e6d043de0b5cbda1d494640ba8175f1
2024-11-13 13:34:44 -05:00
Jonathan Kim 8af8a65320 kfdtest: add per-pipe reset negative test
Add basic KFD per-pipe reset support.

Change-Id: I0f68c4d33e6d043de0b5cbda1d494640ba8175f1


[ROCm/ROCR-Runtime commit: 865e32baf4]
2024-11-13 13:34:44 -05:00
Jonathan Kim 1a4adaf7bc hsakmt: Update HSA capabilites with per-queue reset
Per-queue reset is now supported and flagged in HSA capabilities.

Change-Id: I21e2421da73b9fafae19c903dc3eeeab1f84968d
2024-11-13 13:34:35 -05:00
Jonathan Kim 71bd95ed9e hsakmt: Update HSA capabilites with per-queue reset
Per-queue reset is now supported and flagged in HSA capabilities.

Change-Id: I21e2421da73b9fafae19c903dc3eeeab1f84968d


[ROCm/ROCR-Runtime commit: 1a4adaf7bc]
2024-11-13 13:34:35 -05:00
jeffqjiangNew d30754651f * rocDecode/HEVC: Added empty NAL detection. (#452)
[ROCm/rocdecode commit: b3f8fec41b]
2024-11-13 13:28:29 -05:00
jeffqjiangNew b3f8fec41b * rocDecode/HEVC: Added empty NAL detection. (#452) 2024-11-13 13:28:29 -05:00
Peter Park 23190fd3d9 [SWDEV-479054] update doc for rsmi_compute_process_info_get to note 2-step usage:w
Change-Id: I81608f807ab679a27be12be591193712d81232bd
Signed-off-by: Peter Park <peter.park@amd.com>


[ROCm/rocm_smi_lib commit: c3f1d2baf1]
2024-11-13 12:52:18 -05:00
Peter Park c3f1d2baf1 [SWDEV-479054] update doc for rsmi_compute_process_info_get to note 2-step usage:w
Change-Id: I81608f807ab679a27be12be591193712d81232bd
Signed-off-by: Peter Park <peter.park@amd.com>
2024-11-13 12:52:18 -05:00
Maisam Arif 67b269d112 Merge amd-dev into amd-master 20241113
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>
Change-Id: Iefd0cca227d24ba87769a65584240cf55754cf20
2024-11-13 11:49:43 -06:00
Maisam Arif 486599cdf6 Merge amd-dev into amd-master 20241113
Signed-off-by: Maisam Arif <Maisam.Arif@amd.com>
Change-Id: Iefd0cca227d24ba87769a65584240cf55754cf20


[ROCm/amdsmi commit: 67b269d112]
2024-11-13 11:49:43 -06:00
Justin Williams d3d6157854 [SWDEV-492047] Removed setup.cfg.in
Signed-off-by: Justin Williams <Justin.Williams@amd.com>
Change-Id: I97b14d05b17fefbb87368824f57bc4ab690f1bf0
2024-11-13 12:45:09 -05:00
Justin Williams 966d0d996f [SWDEV-492047] Removed setup.cfg.in
Signed-off-by: Justin Williams <Justin.Williams@amd.com>
Change-Id: I97b14d05b17fefbb87368824f57bc4ab690f1bf0


[ROCm/amdsmi commit: d3d6157854]
2024-11-13 12:45:09 -05:00
Peter Park cbfe403b1d remove duplicated changelog
black format docs/conf.py
add seealso to python api reference

Change-Id: I60fa754f0af662669282dc90eea4b7dc5c5030cc
Signed-off-by: Peter Park <peter.park@amd.com>
2024-11-13 11:46:47 -05:00
Peter Park 49592ef24f remove duplicated changelog
black format docs/conf.py
add seealso to python api reference

Change-Id: I60fa754f0af662669282dc90eea4b7dc5c5030cc
Signed-off-by: Peter Park <peter.park@amd.com>


[ROCm/amdsmi commit: cbfe403b1d]
2024-11-13 11:46:47 -05:00
Bill(Shuzhou) Liu 5e3ebecf80 Correct RDC_FI_PCIE_BANDWIDTH unit
The unit should be mbps instead of GB/second
2024-11-13 09:45:46 -05:00
Bill(Shuzhou) Liu b813ae3426 Correct RDC_FI_PCIE_BANDWIDTH unit
The unit should be mbps instead of GB/second


[ROCm/rdc commit: 5e3ebecf80]
2024-11-13 09:45:46 -05:00
Ioannis Assiouras bca7f67a2f SWDEV-487632,SWDEV-487634 - Fixed memleak in Unit_hipDrvMemcpy_Functional
Change-Id: If515c0f31acb5ca071f575458ef9eb06c5786df2


[ROCm/hip-tests commit: e248f1072a]
2024-11-13 07:06:19 -05:00
Ioannis Assiouras e248f1072a SWDEV-487632,SWDEV-487634 - Fixed memleak in Unit_hipDrvMemcpy_Functional
Change-Id: If515c0f31acb5ca071f575458ef9eb06c5786df2
2024-11-13 07:06:19 -05:00
Ioannis Assiouras d4ad29fd1e SWDEV-489354 - Fixed memleak in Unit_hipLaunchHostFunc_Diffpriority
Change-Id: I8a8b49b225e2b48973ae37727766a4af04d08f6f


[ROCm/hip-tests commit: 950bedf14f]
2024-11-13 07:06:00 -05:00
Ioannis Assiouras 950bedf14f SWDEV-489354 - Fixed memleak in Unit_hipLaunchHostFunc_Diffpriority
Change-Id: I8a8b49b225e2b48973ae37727766a4af04d08f6f
2024-11-13 07:06:00 -05:00
Ioannis Assiouras 2f4a9f3fd2 SWDEV-489358 - Fixed memleak in Unit_hipMultiStream_sameDevice
Change-Id: I5a662e46546125988d8a75f76aafcc905eab7147


[ROCm/hip-tests commit: d4f6a2defb]
2024-11-13 05:35:34 -05:00
Ioannis Assiouras d4f6a2defb SWDEV-489358 - Fixed memleak in Unit_hipMultiStream_sameDevice
Change-Id: I5a662e46546125988d8a75f76aafcc905eab7147
2024-11-13 05:35:34 -05:00
Rambabu Swargam c55f3d16b8 SWDEV-468261 - [catch2][dtest] Functional testcases for hipStreamLegacy
Change-Id: I37cf900d4cfdc244ba8d1d7e2e8c6d34f535a0c2


[ROCm/hip-tests commit: 96d4493c3a]
2024-11-13 00:00:43 -05:00
Rambabu Swargam 96d4493c3a SWDEV-468261 - [catch2][dtest] Functional testcases for hipStreamLegacy
Change-Id: I37cf900d4cfdc244ba8d1d7e2e8c6d34f535a0c2
2024-11-13 00:00:43 -05:00
stali d8fec06bab Enable RDCI policy subsystem
- Enable set and get for policy settings
- Enable register and clear policy events

Change-Id: If4eaaf9b80e668fb21691757210e0aa1532cecae
Signed-off-by: stali <Star.Li@amd.com>
2024-11-12 20:40:08 -06:00
stali f34e245ba1 Enable RDCI policy subsystem
- Enable set and get for policy settings
- Enable register and clear policy events

Change-Id: If4eaaf9b80e668fb21691757210e0aa1532cecae
Signed-off-by: stali <Star.Li@amd.com>


[ROCm/rdc commit: d8fec06bab]
2024-11-12 20:40:08 -06:00
Charis Poag 7756539bd1 Merge amd-dev into amd-master 20241112
Change-Id: I04105595f37bb2903a8c3901592b597084e7fc25
Signed-off-by: Charis Poag <Charis.Poag@amd.com>
2024-11-12 18:04:21 -06:00
Charis Poag 974eba783c Merge amd-dev into amd-master 20241112
Change-Id: I04105595f37bb2903a8c3901592b597084e7fc25
Signed-off-by: Charis Poag <Charis.Poag@amd.com>


[ROCm/amdsmi commit: 7756539bd1]
2024-11-12 18:04:21 -06:00