76333 Коммитов
Автор SHA1 Сообщение Дата
Jaydeep Patel cbd91bdc19 SWDEV-395559 - Move unsigned short up.
Change-Id: I3373a7bc22e632dc10b94b93ff023444d456b2b7
2023-05-02 00:43:36 -04:00
Saleel Kudchadker 44512e3228 SWDEV-301667 - Cleanup log
Change-Id: I9719ec8b19406a062727937471e7a845a522a0be


[ROCm/clr commit: 538d453b86]
2023-05-01 11:07:55 -07:00
Saleel Kudchadker 538d453b86 SWDEV-301667 - Cleanup log
Change-Id: I9719ec8b19406a062727937471e7a845a522a0be
2023-05-01 11:07:55 -07:00
Saleel Kudchadker a210535169 SWDEV-392427 - Invalidate Barrier Value AQL header
Change-Id: Id8e04ffe44da58641361468957d397af128443bb


[ROCm/clr commit: 9775c38725]
2023-05-01 14:06:05 -04:00
Saleel Kudchadker 9775c38725 SWDEV-392427 - Invalidate Barrier Value AQL header
Change-Id: Id8e04ffe44da58641361468957d397af128443bb
2023-05-01 14:06:05 -04:00
taosang2 3a37f33e4e SWDEV-396574 – Refactor device mapping functions
Refactor mapFrom(), mapTo(), mapElem(),
__hip_is_surf_channel_type() and
__hip_is_itex_channel_type()

Change-Id: I1692b92d407bad742d562678f218ebf8ca532e91


[ROCm/clr commit: 2f2d02649f]
2023-05-01 13:57:10 -04:00
taosang2 2f2d02649f SWDEV-396574 – Refactor device mapping functions
Refactor mapFrom(), mapTo(), mapElem(),
__hip_is_surf_channel_type() and
__hip_is_itex_channel_type()

Change-Id: I1692b92d407bad742d562678f218ebf8ca532e91
2023-05-01 13:57:10 -04:00
sdashmiz ebcab6e910 SWDEV-360031 - Correct APIs behaviour
- correct error for hipStreamWaitEvent when event recorded before
  capture
- correct hipEventSync when event is synced during capture

Signed-off-by: sdashmiz <shadi.dashmiz@amd.com>
Change-Id: I7ecbed5621eaf323846d4ccb20ec112aaa8a5757


[ROCm/clr commit: 544318fffe]
2023-05-01 13:38:59 -04:00
sdashmiz 544318fffe SWDEV-360031 - Correct APIs behaviour
- correct error for hipStreamWaitEvent when event recorded before
  capture
- correct hipEventSync when event is synced during capture

Signed-off-by: sdashmiz <shadi.dashmiz@amd.com>
Change-Id: I7ecbed5621eaf323846d4ccb20ec112aaa8a5757
2023-05-01 13:38:59 -04:00
victzhan 2278d7e0ad SWDEV-345751 - fix misinitialize arraySlice in partialMemCopyTo()
Change-Id: I622c368957b1bd39e973f9afa4ee01593dd9e8ac


[ROCm/clr commit: d9c00767dc]
2023-05-01 13:07:44 -04:00
victzhan d9c00767dc SWDEV-345751 - fix misinitialize arraySlice in partialMemCopyTo()
Change-Id: I622c368957b1bd39e973f9afa4ee01593dd9e8ac
2023-05-01 13:07:44 -04:00
shadidashmiz 276f262033 SWDEV-391555 - disable failing tests (#252)
* SWDEV-391555 - disable failing tests
Change-Id: I6ded26927720b77938022f37acf7513a7fc2575b
* SWDEV-391555 - disable more failing tests

[ROCm/hip-tests commit: b5d2ea28e1]
2023-05-01 09:59:45 -07:00
shadidashmiz b5d2ea28e1 SWDEV-391555 - disable failing tests (#252)
* SWDEV-391555 - disable failing tests
Change-Id: I6ded26927720b77938022f37acf7513a7fc2575b
* SWDEV-391555 - disable more failing tests
2023-05-01 09:59:45 -07:00
Alex Xie 1678c03e90 SWDEV-390565 - ocltst test failing
part 2 of the fix

Change-Id: I4ff2cf0f82b5cf57c7ee51a60bbac770a605a837


[ROCm/clr commit: 42f8b9183d]
2023-05-01 12:31:37 -04:00
Alex Xie 42f8b9183d SWDEV-390565 - ocltst test failing
part 2 of the fix

Change-Id: I4ff2cf0f82b5cf57c7ee51a60bbac770a605a837
2023-05-01 12:31:37 -04:00
Alex Xie e9b17e263a SWDEV-389541 - mipmap tests failed
Change-Id: I8dec8ff9515c55a3a6b16157f7d064b2b109d5f3


[ROCm/clr commit: 475f80ee0e]
2023-05-01 12:31:17 -04:00
Alex Xie 475f80ee0e SWDEV-389541 - mipmap tests failed
Change-Id: I8dec8ff9515c55a3a6b16157f7d064b2b109d5f3
2023-05-01 12:31:17 -04:00
Alex Xie c271c5cb29 SWDEV-390565 - ocltst test failing
Change-Id: I76a12878a1d3c029b771335eb23b129cac125517


[ROCm/clr commit: a0c1f496a4]
2023-05-01 09:37:36 -04:00
Alex Xie a0c1f496a4 SWDEV-390565 - ocltst test failing
Change-Id: I76a12878a1d3c029b771335eb23b129cac125517
2023-05-01 09:37:36 -04:00
German 5af1af9c57 SWDEV-353281 - Move VirtualMem map update to memobj
- The implementation in mempool graphs requires refcounting VA object.
That requires release() to update the map only on the actual destruction.
- Add GPU event tracking for paging operation. Otherwise, runtime
may not always flush IB.

Change-Id: Idf99ffb894321a38e04b490116a7ca435635918d


[ROCm/clr commit: 7ef2da5aba]
2023-04-28 17:22:11 -04:00
German 7ef2da5aba SWDEV-353281 - Move VirtualMem map update to memobj
- The implementation in mempool graphs requires refcounting VA object.
That requires release() to update the map only on the actual destruction.
- Add GPU event tracking for paging operation. Otherwise, runtime
may not always flush IB.

Change-Id: Idf99ffb894321a38e04b490116a7ca435635918d
2023-04-28 17:22:11 -04:00
Bill(Shuzhou) Liu 8e686daa7d Rebuild librdc_ras.so on RHEL7
Build the library on lower OS for compatibility.

Change-Id: I24c5670d98131b739753e66fdd49b2e69759073c
2023-04-28 14:00:11 -05:00
Bill(Shuzhou) Liu 302c78b62b Rebuild librdc_ras.so on RHEL7
Build the library on lower OS for compatibility.

Change-Id: I24c5670d98131b739753e66fdd49b2e69759073c


[ROCm/rdc commit: 8e686daa7d]
2023-04-28 14:00:11 -05:00
Ajay 858a32a24a SWDEV-374386 - hipGraphAddMemcpyNode negative cases
validate 3d memcpy params -
pitch, extend - height/width/depth, src/dst offsets and total size

Change-Id: I629fc242264ebbc3e9dbfd9233da8d3a127500b4


[ROCm/clr commit: 22eae6ac9e]
2023-04-28 12:11:24 -04:00
Ajay 22eae6ac9e SWDEV-374386 - hipGraphAddMemcpyNode negative cases
validate 3d memcpy params -
pitch, extend - height/width/depth, src/dst offsets and total size

Change-Id: I629fc242264ebbc3e9dbfd9233da8d3a127500b4
2023-04-28 12:11:24 -04:00
gobhardw 591e3d734b Ignoring commented lines in input for profiling
Change-Id: I31c089024473f0b22e26d54d6db7e5818a064a0d
2023-04-28 10:13:04 -04:00
gobhardw 5ab5d37fb9 Ignoring commented lines in input for profiling
Change-Id: I31c089024473f0b22e26d54d6db7e5818a064a0d


[ROCm/rocprofiler commit: 591e3d734b]
2023-04-28 10:13:04 -04:00
Dalibor Stanisavljevic b36f040bf9 SWDEV-397055 - Remove mm_ip_list from caps
Change-Id: Ia4f337d24744fc545e8336705fe7a2b2d9b5f8db
Signed-off-by: Dalibor Stanisavljevic <Dalibor.Stanisavljevic@amd.com>
2023-04-28 03:54:24 -04:00
Dalibor Stanisavljevic dbd6fe5768 SWDEV-397055 - Remove mm_ip_list from caps
Change-Id: Ia4f337d24744fc545e8336705fe7a2b2d9b5f8db
Signed-off-by: Dalibor Stanisavljevic <Dalibor.Stanisavljevic@amd.com>


[ROCm/amdsmi commit: b36f040bf9]
2023-04-28 03:54:24 -04:00
Graham Sider 7a4c9273d7 rocrtst: Move kernel object loading outside of loops
Negative queue validation tests were doing many redundant from-file
kernel object loads in a loop. This was creating many simulataneous open
file handles within many dynamically allocated CodeObject objects. While
the CodeObject class implements RAII on the file handles to cleanup on
destruction, clear_code_object() only gets called on the destruction of
the TestBase-derived test objects (these being a suite abstraction).

Due to this we were hitting file open() EMFILE errors (too many open
files) in gfx94x CPX mode. Move LoadKernelFromObjFile outside of the
test loops and clear_code_object() for each test on each agent.

Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I6f9d23fd122720c49a58c22698f097906d2fc97c
2023-04-27 16:16:12 -04:00
Graham Sider e2fc46c189 rocrtst: Move kernel object loading outside of loops
Negative queue validation tests were doing many redundant from-file
kernel object loads in a loop. This was creating many simulataneous open
file handles within many dynamically allocated CodeObject objects. While
the CodeObject class implements RAII on the file handles to cleanup on
destruction, clear_code_object() only gets called on the destruction of
the TestBase-derived test objects (these being a suite abstraction).

Due to this we were hitting file open() EMFILE errors (too many open
files) in gfx94x CPX mode. Move LoadKernelFromObjFile outside of the
test loops and clear_code_object() for each test on each agent.

Signed-off-by: Graham Sider <Graham.Sider@amd.com>
Change-Id: I6f9d23fd122720c49a58c22698f097906d2fc97c


[ROCm/ROCR-Runtime commit: 7a4c9273d7]
2023-04-27 16:16:12 -04:00
David Yat Sin a180c9ee78 Add env var to override SRAM ECC
Add HSA_ENABLE_SRAMECC environment variable that can be used to
override SRAM ECC mode reported by KFD

Change-Id: I2b95511820a2d3d146a76b03070659c0695b61fd
2023-04-27 16:16:05 -04:00
David Yat Sin 11541cc283 Add env var to override SRAM ECC
Add HSA_ENABLE_SRAMECC environment variable that can be used to
override SRAM ECC mode reported by KFD

Change-Id: I2b95511820a2d3d146a76b03070659c0695b61fd


[ROCm/ROCR-Runtime commit: a180c9ee78]
2023-04-27 16:16:05 -04:00
David Yat Sin f024d21e3d Add query for number of XCCs per agent
Change-Id: I4b694b4904ba0326c998356388a62c19a972a7ff
2023-04-27 16:15:59 -04:00
David Yat Sin 101755c207 Add query for number of XCCs per agent
Change-Id: I4b694b4904ba0326c998356388a62c19a972a7ff


[ROCm/ROCR-Runtime commit: f024d21e3d]
2023-04-27 16:15:59 -04:00
Mike Li 46b667e530 Return failure with any IMAGE attribute for gfx940
The gfx940 does not support IMAGE instructions. Any get_info with
IMAGE attributes should return failure.

Signed-off-by: Mike Li <Tianxinmike.Li@amd.com>
Change-Id: I12005628f92780f551ab6f8b41526c66b54c6a59
2023-04-27 16:15:51 -04:00
Mike Li 15114271be Return failure with any IMAGE attribute for gfx940
The gfx940 does not support IMAGE instructions. Any get_info with
IMAGE attributes should return failure.

Signed-off-by: Mike Li <Tianxinmike.Li@amd.com>
Change-Id: I12005628f92780f551ab6f8b41526c66b54c6a59


[ROCm/ROCR-Runtime commit: 46b667e530]
2023-04-27 16:15:51 -04:00
Mike Li d7fa654338 Do not use the function part of the location_id
The function IDs used to be 0 on previous asics but on gfx94x and newer
asics, these bits are set. These bits are used by user applications to
uniquely identify the locations of GPU nodes. These exta bits break
hwloc and are not needed for rocrtst.

Signed-off-by: Mike Li <Tianxinmike.Li@amd.com>
Signed-off-by: David Yat Sin <David.YatSin@amd.com>
Change-Id: I1202f504645b0662d009b9c0926eebb7ddc08d73
2023-04-27 16:15:43 -04:00
Mike Li e495a4b16a Do not use the function part of the location_id
The function IDs used to be 0 on previous asics but on gfx94x and newer
asics, these bits are set. These bits are used by user applications to
uniquely identify the locations of GPU nodes. These exta bits break
hwloc and are not needed for rocrtst.

Signed-off-by: Mike Li <Tianxinmike.Li@amd.com>
Signed-off-by: David Yat Sin <David.YatSin@amd.com>
Change-Id: I1202f504645b0662d009b9c0926eebb7ddc08d73


[ROCm/ROCR-Runtime commit: d7fa654338]
2023-04-27 16:15:43 -04:00
Mike Li 9554e95de0 Scratch memory changes to support multi-xcc
Change-Id: I115ba4cfe250c59cb7421217cfe0fad6302f25b3
2023-04-27 16:15:30 -04:00
Mike Li dae51188d8 Scratch memory changes to support multi-xcc
Change-Id: I115ba4cfe250c59cb7421217cfe0fad6302f25b3


[ROCm/ROCR-Runtime commit: 9554e95de0]
2023-04-27 16:15:30 -04:00
Laurent Morichetti f31b312611 Update the trap handler for gfx940
gfx940 uses ttmp11 to hold the queue packet index so the first level
trap handler uses ttmp13 instead to save ib_sts.

Repurpose ttmp11[31] to mean that the ttmps are initialized. The issue
was that the debugger could not tell whether ttmp6 was written by the
trap handler when determining the stop reason.

If ttmp11[31]=0, then the trap handler has not been executed and ttmp6
should be assumed to be 0.  If ttmp11[31]=1, then ttmp6 holds the
trap_id, if an s_trap instruction caused the exception.

Signed-off-by: Laurent Morichetti <laurent.morichetti@amd.com>
Signed-off-by: Lancelot Six <lancelot.six@amd.com>

Change-Id: I9af903abae044b9ec530306229caf3b883f3ee46
2023-04-27 16:15:14 -04:00
Laurent Morichetti 3603303bc7 Update the trap handler for gfx940
gfx940 uses ttmp11 to hold the queue packet index so the first level
trap handler uses ttmp13 instead to save ib_sts.

Repurpose ttmp11[31] to mean that the ttmps are initialized. The issue
was that the debugger could not tell whether ttmp6 was written by the
trap handler when determining the stop reason.

If ttmp11[31]=0, then the trap handler has not been executed and ttmp6
should be assumed to be 0.  If ttmp11[31]=1, then ttmp6 holds the
trap_id, if an s_trap instruction caused the exception.

Signed-off-by: Laurent Morichetti <laurent.morichetti@amd.com>
Signed-off-by: Lancelot Six <lancelot.six@amd.com>

Change-Id: I9af903abae044b9ec530306229caf3b883f3ee46


[ROCm/ROCR-Runtime commit: f31b312611]
2023-04-27 16:15:14 -04:00
Mike Li de4d1ce424 Add gfx940 to AmdHsaCode
Signed-off-by: Mike Li <Tianxinmike.Li@amd.com>
Change-Id: Ib4f7c801c3d3bac9a04c880c5bf86b72bfa3404f
2023-04-27 16:09:26 -04:00
Mike Li 547d2aa3c8 Add gfx940 to AmdHsaCode
Signed-off-by: Mike Li <Tianxinmike.Li@amd.com>
Change-Id: Ib4f7c801c3d3bac9a04c880c5bf86b72bfa3404f


[ROCm/ROCR-Runtime commit: de4d1ce424]
2023-04-27 16:09:26 -04:00
Mike Li bd98a1e5bf Added gfx940 ISA
Signed-off-by: Mike Li <Tianxinmike.Li@amd.com>
Change-Id: Icb1830fe186abc69fe7ee709b7f12b882cab9e87
2023-04-27 16:08:58 -04:00
Mike Li fe9b01e916 Added gfx940 ISA
Signed-off-by: Mike Li <Tianxinmike.Li@amd.com>
Change-Id: Icb1830fe186abc69fe7ee709b7f12b882cab9e87


[ROCm/ROCR-Runtime commit: bd98a1e5bf]
2023-04-27 16:08:58 -04:00
Pedram Alizadeh aa5f75aa9c fixing the error message for mpirun when number of requested GPUs exceeds the limits (#37)
[ROCm/rccl-tests commit: d16d1fb16b]
2023-04-27 14:06:17 -04:00
Pedram Alizadeh d16d1fb16b fixing the error message for mpirun when number of requested GPUs exceeds the limits (#37) 2023-04-27 14:06:17 -04:00
Galantsev, Dmitrii 3d00ae1240 CMake: Install amdsmitst.exclude
Change-Id: I166cbd265cf9074e17cad39fddac77988e2fd686
Signed-off-by: Galantsev, Dmitrii <dmitrii.galantsev@amd.com>
2023-04-27 11:58:03 -04:00