Create symlink directory before attmpting to create the symlink.
Change-Id: Ic4d07052e5bfc32280c7d71e58784cbba3536e2a
[ROCm/ROCR-Runtime commit: d163fac13d]
Default is OFF to conform to latest cmake standard (3.15) and
because this feature can cause some confusion for unaware developers.
Change-Id: I6fdbd5ab76c90b73ac6451a383334a83cabef438
Signed-off-by: Sean Keely <Sean.Keely@amd.com>
[ROCm/ROCR-Runtime commit: f0b0555996]
Immediate benefit is that this enables cmake native find_package
support including transitive passthrough of link dependencies,
options, and include paths.
It does require a bump to cmake 3.6 to enable proper package file
names.
Change-Id: I3f4e2f2db745c04a7f686111b080098a0d92fbf5
Signed-off-by: Sean Keely <Sean.Keely@amd.com>
[ROCm/ROCR-Runtime commit: 06add334b9]
Initialize all the fields in the HSA queue object to known values
before calling the thunk to create the KFD queue. This ensures that
when the debugger detects that a KFD queue is created it can access
the values it requires. The values it requires include the apperture
addresses, queue scratch memory base, and the HSA queue kind.
Change-Id: Ic985755b0402c6794d5987e60aff50d223f09eb9
[ROCm/ROCR-Runtime commit: a74660c69a]
- Check address is in the range of the mapped file.
- Correct calculation of offset within the file.
Change-Id: I848a3ead4422698c2ef1c140bc8ae5e000a717f7
[ROCm/ROCR-Runtime commit: 5f614c31f5]
Set ttmp11[8] and send a signal for the debugger when the handler
is entered because of an address watch exception.
Change-Id: Icc83a79027bb7ca1e50e19e2f00464cb9ca862f3
[ROCm/ROCR-Runtime commit: da6d892058]
Adds the following:
- New factory method to create a code object reader from
file with offset and size.
- A pair of queries on a loaded code object to get the URI name/length.
- A bump to the AMD vendor loader extension API and its associated table.
Change-Id: I17c83e9c2447d29a43c438459395365f786a3611
[ROCm/ROCR-Runtime commit: 9eb735ec24]
Signed-off-by: Gang Ba <gaba@amd.com>
Change-Id: I5c23a8dacf9bc50c740908aabe391432f2c7112e
Signed-off-by: Gang Ba <gaba@amd.com>
[ROCm/ROCR-Runtime commit: d675d1cce1]
Zero size pools have no numa bindings. Selecting a pool with numa
bindings should prevent thrashing due to numa balancing daemon.
Change-Id: Ib0082cb9af66e24e07a2adbb83c1045145d51403
[ROCm/ROCR-Runtime commit: 32bb10086d]
This has nothing to do with registering agents.
Moved to Runtime::Load.
Change-Id: I0f84c9d8f5a68d458717111113f02af56c92f4f6
[ROCm/ROCR-Runtime commit: 40d1931209]
Memory from the suballocator may be exported via IPC. If this
happens then the allocating process should not reuse that memory
since it would still be connected to the remote process. IPC exported
memory must be released back to the driver.
Change-Id: I2ab0c814f63191f753fc3640cc4140ee144bf07f
[ROCm/ROCR-Runtime commit: 29b660c91e]
All types which could be generated from a fragment need to take this branch.
Taking the branch is correct for all types, it was a performance optimization
only and was missing IPC. Branch removal simplifies updates for any future
fragment use and will allow CQE to report any performance issues that might
require bringing the branch back.
Change-Id: I8041788c422e880b764e144eb1877f5126ba76f3
[ROCm/ROCR-Runtime commit: 09ebc21d13]
Thunk may report nullptr for host base if the host does not have
access. Use agent base in this case.
Change-Id: I44883d35a3fff0941b1e3037d16b059591a6c511
[ROCm/ROCR-Runtime commit: 397608e2c0]
KFD now passes the ASIC revision to user level through some bits
in the HSA topology's capability field. Some user-level software
wants this because different ASIC revisions may require user-level
software to do different things (e.g. patch code for things that
are changed in later hardware revisions).
Change-Id: I16f2a15ae0875edd01ebdb1f1685ec7865f7049e
[ROCm/ROCR-Runtime commit: 5ddd8fb68b]
The 1st level trap handler jumps to the 2nd level trap handler on
context save requests or regular traps if (mode.debug_en
&& !status.halt) is true.
If we return from the 2nd level trap handler without status.halt=1, then
we need to make sure mode.debug_en is cleared, or we will re-enter the
2nd level trap handler again and again when trapsts.savectx is set.
Change-Id: I4db6369de8c91a32842f488a4df5c9d94fa65aa9
[ROCm/ROCR-Runtime commit: 584ef1e1ca]
Using static_assert breaks in "Many Linux" build environment. It is not
supported by that libc version. _Static_assert is a compiler built-in
and does not depend on the libc version.
Change-Id: I37cf0ad10de94d8f6fc8cefc4fdda55c9520d599
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
[ROCm/ROCR-Runtime commit: df16950a0c]
Missing attribute type. Also remove dangling word in
HSA_AMD_AGENT_INFO_MEMORY_WIDTH.
No code change, documentation only.
Change-Id: I1d0efdb721eaa0e2fb0bdb21f8d5e034beaf8857
[ROCm/ROCR-Runtime commit: 012ffed459]
Update the non-upstream ioctl numbers to align with the change in the
kernel.
Signed-off-by: Amber Lin <Amber.Lin@amd.com>
Change-Id: Ie0ddccb343a023b55eb18477c59341acaa666e99
[ROCm/ROCR-Runtime commit: a37a88ddcb]
In the case where SQ_WAVE_TRAPSTS_XNACK_ERROR_MASK is set, we also need
to set the TTMP11_EXCP_RAISED_BIT in ttmp11. If we don't, the debugger
may think that the wave is halted at launch (halted without events).
Change-Id: I8c19605bbfc145275728de4ad1979d3ba8bb478a
[ROCm/ROCR-Runtime commit: 838c6bd6ad]
Mesa address lib faults if the only acceptable swizzle modes are
forbidden. The old address lib simply ignored the forbidden list
in this case. Mesa addrlib will not select linear unless there
is no other option so allowing linear mode for tiled images will
still use tiled modes when possible.
Change-Id: I1aa44d072db902c968484dbff67b482af03b45d9
[ROCm/ROCR-Runtime commit: c60364e1e0]
The purpose of this KFDTest is to investigate the behaviour of an
SDMA queue when an invalid memory address is used.
v2: Don't wait for SDMA queue to finish - it won't finish because of
the gpuvm fault.
v3: Create kfd event before SDMA queue submission. This fix the issue
that gpuvm fault happens earlier than kfd event is created then KFD
exception handler can't find the kfd event (to wake up kfd test)
v4: Instead of using 0x12345678 as the invalid VA, map one page of
FB to gpu and unmap it. Use the mapped GPUVA as the
invalid address
Change-Id: I58af1511f75d869adddede302b238c2725f3fe5a
Signed-off-by: Ori Messinger <Ori.Messinger@amd.com>
Signed-off-by: Oak Zeng <Oak.Zeng@amd.com>
[ROCm/ROCR-Runtime commit: 46f5e83066]
Peer accessibility query was not previously directed at the peer agent.
Change-Id: I259f0afac827a6e4778a56419a3acd296d00391b
[ROCm/ROCR-Runtime commit: 9c9064c2b7]
We need HostAccess for large-bar XGMI configs for this test,
but we can't use it on small-bar XGMI configs, so deal with it
appropriately
Change-Id: Ic16b810de03adfc63de21a00c55e5f3ea1ce66d1
[ROCm/ROCR-Runtime commit: dc784ba482]
Contructor function must not be attempted twice even if the construction
attempt returns nullptr.
Change-Id: I75353e5e511769a96e4332f7f60887f6559c1cd5
[ROCm/ROCR-Runtime commit: 2fbacccaed]
New queue suspend/resume update can now return the number of successful
queue requests so return success if IOCTL return is non-negative.
This should be backwards compatible since old queue suspend/resume returns
0 on success.
Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com>
Change-Id: I06b70d95d203b2bfc19a0cc1b88c5719c695159a
[ROCm/ROCR-Runtime commit: 93c333711a]
- Correct defintion of HSA_QUEUE_TYPE_COOPERATIVE to be a queue type
and not a bit mask.
- Correct implementation of hsa_queue_type_t to treat is as an
enumeration type and not a bit mask. In particular
HSA_QUEUE_TYPE_COOPERATIVE is a distinct queue type that uses the
multi producer protocol, and is not a bit set value.
Change-Id: I9415be8853671e5511e16e306caf16020e8c84af
[ROCm/ROCR-Runtime commit: bccb25fc33]
There are a couple problems with this. First, llvm-dis is an unstable
llvm development tool and 3rd party users should generally not rely on
it. The text format is unstable, and the regex here isn't even
explicitly looking for the target triple field, so it could
accidentally find something else. Second, picking the target to
compile based on the library you are linking is a fundamentally
backwards decision. The target you're compiling for changes the
library you would want to link. The device libraries are only ever
compiled with amdgcn-amd-amdhsa. If we had a second triple, this
should be explicitly building for any it cares about.
Change-Id: I3bae8398f60f78df61ab2177aa9e83f47ec6dea4
[ROCm/ROCR-Runtime commit: 96d4140609]
The ROCR trap handler should check for all end program instructions
and not halt on them. Mask off the imm16 before comparing the
instruction to the s_endpgm opcode.
Change-Id: I669ffc7f5b699d7daf0c8ec5761ed7bb193f07a7
[ROCm/ROCR-Runtime commit: df03a377f5]
This is needed to allow gdb to access the memory.
Change-Id: I96c084b714e952d7b7000f0dd41e1c530fdd092f
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
[ROCm/ROCR-Runtime commit: e5062c4383]
Image swizzle mode will be set by the preferred surface info
function.
Change-Id: I41e639be53cafbb4db6cf15c159aa2bd457ec5be
[ROCm/ROCR-Runtime commit: 1440da3e15]
New trap handler ABI: Record in ttmp11[8:7] the event that caused the
trap handler to be entered. We currently record 2 events, trap_raised
if an s_trap instruction was executed, or excp_raised if an exception
(MEM_VIOL or ILLEGAL_INST) was raised.
Change-Id: Ie278c8277437b3b67c2737dcd1a12fe6511df428
[ROCm/ROCR-Runtime commit: 00da82f951]
Remove the hard-coding of "SHARED" as the lib type, and move any
SO-specific linking to only happen if the .so exists in the first place
Change-Id: I3f0bfd5c03f19b2425423b4dc8eed8fd87acc1d6
[ROCm/ROCR-Runtime commit: 33133ebd07]
Make the hsakmt library take the value from CMake regarding
static/shared
KFDTest automatically grabs the right one due to it checking the normal
shared folders. Tested locally (and via automation by the time that this
is merged)
Also set the default to building SOs if BUILD_SHARED_LIBS is not defined
Change-Id: I7f8b76a7e60f3b41e5981f472b388301ae09e2c6
Signed-off-by: Kent Russell <kent.russell@amd.com>
[ROCm/ROCR-Runtime commit: ddd38deab7]
Changes in the compiler are being made to add controls for XNACK and SRAM ECC
for all targets which can support these features. By default the conservatively
correct settings of XNACK on and SRAM ECC on will be used. This change is to
facilitate these backend updates.
Change-Id: I2fd6b6bc1d32937737e7f56d8e08c70fe781c745
[ROCm/ROCR-Runtime commit: 87202d4408]
Using the building OS isn't guaranteed, as we can theoretically build
RPMs in Ubuntu or DEBs in CentOS. Use CPack's DEB/RPM-specific variables
to get around this issue
Change-Id: I404246c070eac2c74b45ae4b763c612891d66de1
Signed-off-by: Kent Russell <kent.russell@amd.com>
[ROCm/ROCR-Runtime commit: b72bbeac3e]
Sean Keely
Yong Zhao
Tony
Evgeny
Konstantin Zhuravlyov
Laurent Morichetti
Gang Ba
Joseph Greathouse
Philip.Cox@amd.com
Felix Kuehling
Ranieri Althoff
Amber Lin
Ori Messinger
Kent Russell
Jonathan Kim
Matt Arsenault
Ramesh Errabolu
Austin Kerbow