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04dc7ca51f9da83b66ea1663c9e606d9fb6572cd
Wykres commitów

119 Commity

Autor SHA1 Wiadomość Data
taosang2 27e87ccca6 SWDEV-513458 - Add gfx950 target ID 
Add gfx950 target ID

Cherry-picked
https://gerrit-git.amd.com/c/compute/ec/clr/+/997678
https://gerrit-git.amd.com/c/compute/ec/clr/+/1063519

Change-Id: I0228c5e87ceec366983fd4afb1c25e7f8161c2c2


[ROCm/clr commit: 29cc394510]
 2025-02-04 18:30:23 -05:00
Jimbo Xie 0a30936c67 SWDEV-510869 - add gfx1153 id 
Change-Id: I36d39a1db2392990ad9b01d70676c3c986435707


[ROCm/clr commit: 4abedf2a0e]
 2025-01-28 18:15:46 -05:00
Saleel Kudchadker d4594531ef SWDEV-506251 - Disable blit copy thresold for OpenCL 
Change-Id: Id0ca43b13d5792791a42da263f6aa4496382cea6


[ROCm/clr commit: 39801b5750]
 2025-01-08 02:46:01 +00:00
Ioannis Assiouras 7670376748 SWDEV-489255 - Update stack size limit in rocvirtual 
Change-Id: I2aac9d211f64b3d6c121d8b010d215dcbdeac3aa


[ROCm/clr commit: a808c4b23a]
 2024-12-16 09:30:39 -05:00
Tao Sang fb76b9620c SWDEV-496667 - Support gfx9-4-generic target 
Support gfx9-4-generic target to cover mi3XX.
Support features sramecc and xnack in generic target.
Improve some code formats.
Add more log on compiler.

Change-Id: I6b3c6af55c60cffd43ce6f17b75998f751b75713


[ROCm/clr commit: 3ad8f1b811]
 2024-12-12 14:43:39 -05:00
taosang2 f3e3d8178b SWDEV-447973 - Support generic targets 
Change-Id: I32db83843e45e0f013591493aafd7a532c881e16


[ROCm/clr commit: f1f4f40c5b]
 2024-11-29 10:12:10 -05:00
Aidan Belton-Schure c59a9b3253 SWDEV-485827 release initial_heap_buffer_ 
This PR adds the initialization and release of initial_heap_buffer_
to prevent memory leaks.

Change-Id: I4ab8721b439a1a3a6f6e53d63d870e572f7c984a


[ROCm/clr commit: f42a87dc2f]
 2024-11-28 10:31:26 -05:00
Saleel Kudchadker 4f83e7775a SWDEV-495987 - Use shared mutex for MemObj maps 
- Remove binning logic, although useful it doesnt work in current
  scenario as there is no upper limit on the size of allocation. If an
app or framework uses entire VRAM and then creates suballocs, binning
would result in failure.

Change-Id: Icc27c13e433bb4a1f03e82028d8718488b43bfa5


[ROCm/clr commit: e4d29e228d]
 2024-11-19 04:28:20 -05:00
Saleel Kudchadker a2b25be61c SWDEV-491375 - Improve MemObjMap perf 
- Create bins each with its own map and lock. This would help cases
where the hash of a VA is differnet than ther one which falls in
different bin, and there is no lock contention
- Use STL shared mutexes, that way we can unique_lock for map updates
vs simple reads which can use shared_lock

Change-Id: I118818be65c6373700f5e511045babb6a398938a


[ROCm/clr commit: e23ff0520b]
 2024-10-30 05:37:33 +00:00
Anusha GodavarthySurya f278ac9ea0 SWDEV-485904 - Fix virtual,physical mem obj leaks 
Change-Id: Ie0456b5dcfec206ae54a6aabfc2a15a620cac693


[ROCm/clr commit: 870842201d]
 2024-09-19 23:04:20 -04:00
kjayapra-amd f19260d568 SWDEV-480772 - Remove name variable from amd::Monitor class. 
Change-Id: Ie2a4fa44f485786227230f8a892e090e718aa30e


[ROCm/clr commit: 12a39fbf22]
 2024-09-19 11:55:01 -04:00
Jaydeep Patel 7fa7a7cae5 SWDEV-475938 - Update dynamic stack in submit kernel internal. 
Change-Id: I816bf9cfe8aaac5486ff3b719dbdc4f4d6134e01


[ROCm/clr commit: 9c90bc43a5]
 2024-09-11 00:59:45 -04:00
Jimbo Xie 2036d66b95 SWDEV-403363 - add gfx1152 runtime support 
Change-Id: I2f59ddb38a98d9f8edec5d1548232d4d826b7d04
(cherry picked from commit 5e94656f744e315ee7ae1285d3e6dd515f9d66a8)


[ROCm/clr commit: 3bdbc1eaf3]
 2024-09-03 17:12:24 -04:00
ksankisa 3bcd901f06 [SWDEV-469495] Compile blit kernels with -fsanitize=address when asan is enabled. 
Change-Id: I96e1abef43317cd58329c4a159f807878bc48cf4


[ROCm/clr commit: e76bf653fb]
 2024-08-27 01:27:31 -04:00
kjayapra-amd cf28e2b27a SWDEV-439234 - Implement Set/Get Access APIs in PAL/Windows. 
Change-Id: I997c330880da70c5128b187e1ef4d9c449218880


[ROCm/clr commit: 11817b4405]
 2024-07-19 10:42:41 -04:00
Jaydeep Patel ca6d126f81 SWDEV-471298 - Use same context during child creation as parent's context. 
Change-Id: I41e534b6194cef9aa8e96b28b8e811906cb362f0


[ROCm/clr commit: fb2b87db56]
 2024-07-11 23:15:41 -04:00
Ioannis Assiouras d9a6402c12 SWDEV-468151 - Fixed segfault during destruction of arena_mem_obj 
Change-Id: I1ebfa965bd243890dcb54d9b55992ae68c497bf0


[ROCm/clr commit: aee0b1db39]
 2024-06-17 15:27:08 +01:00
Ioannis Assiouras 75104df3b2 SWDEV-464648 - code and comment cleanups 
Change-Id: I5ba3f1bff500b3cd5903c2f441017735e688f83f


[ROCm/clr commit: 8f42ad6aa3]
 2024-06-07 22:38:09 +01:00
Ioannis Assiouras 407d1346f2 SWDEV-463865 - changed device,roc and pal namespaces to be nested under amd 
Change-Id: Icad342843c039c634e249a13a7aa31400730b1dd


[ROCm/clr commit: 775dc204aa]
 2024-06-07 12:23:06 -04:00
kjayapra-amd 27bc1632f1 SWDEV-417091 - Disable GWS Init for PAL/Windows side. 
Change-Id: Ib6295f063daa835c1f33f21f50c083241a9026ff


[ROCm/clr commit: 931431fc38]
 2024-05-28 06:31:10 +00:00
kjayapra-amd 3ca0dbc4d7 SWDEV-460151 - Enabling gfx12 in HIP runtime. 
Change-Id: I374ea7c3119b0c61f9846a862c4a448ddb179748


[ROCm/clr commit: f5d0ee650b]
 2024-05-28 06:28:07 +00:00
kjayapra-amd 154a113a88 SWDEV-413997 - Changes to use GlobalContext in views. 
Change-Id: I1f8411eae9ed49632667e244a25f223fed92c720


[ROCm/clr commit: 0e1a0572e6]
 2024-04-29 16:41:39 -04:00
kjayapra-amd d49fa8d06b SWDEV-413997 - Handling cases where multiple phys_mem is mapped into a single virtual address. 
Change-Id: Ie678e607a64f2e5c35a10b9083185f041c5527ac


[ROCm/clr commit: 49b4aef8c9]
 2024-04-28 08:28:12 -04:00
kjayapra-amd 765e6f5d2f SWDEV-413997 - Fixing multiple device cases. 
Change-Id: I10ad3fbfca887e92cd81f68392fa1acf753cbd2b


[ROCm/clr commit: d52d16c8e6]
 2024-04-13 06:14:03 -04:00
German Andryeyev f29d608ca3 SWDEV-455254 - Add kernel arg optimization 
Add kernel arguments optimization into blit path.
Enabled by default on MI300.

Change-Id: I2694a81b90d48ad07d86dfe4c0c64fe187bada8e


[ROCm/clr commit: f0c7ecf617]
 2024-04-10 18:08:37 -04:00
Ioannis Assiouras e97c777df1 SWDEV-442421 - Fixed case where hipIpcGetMemHandle erroneously returns hipSuccess 
Change-Id: Ie322a1a0165111d2ca129e68f49b54fe93aa088e


[ROCm/clr commit: b5fadf9cd1]
 2024-02-05 05:08:11 +00:00
German ab59c1e7fa SWDEV-301667 - Fix HSAIL compilation path for Blit 
Recently some unused compiler options for HSAIL path were removed,
 but it affected blit kernels compilation. Hence, remove those options.
Also delete assert for device to device copy in SDMA path for now.

Change-Id: Ib5d7f063af2ab4a3fc5d73d426e39c391b1011ac


[ROCm/clr commit: eaa61fc740]
 2024-01-09 17:51:30 -05:00
German 3f4bbcfdba SWDEV-407533 - [ABI Break]Purge unused env vars 
Change-Id: I627950e8ebb6299affc602754a20d442dbe42b14


[ROCm/clr commit: 077311153a]
 2023-08-24 14:11:40 -04:00
Lang Yu 11873d4eff SWDEV-396372 - Add support for gfx1150 and gfx1151 
Change-Id: If97710f18fbb61bead5cfe92ce11e11b4895b029
Signed-off-by: Lang Yu <Lang.Yu@amd.com>


[ROCm/clr commit: c674d94a12]
 2023-07-24 20:11:03 -04:00
Todd tiantuo Li 677c88a9a6 SWDEV-333557 - 1.Add support for IPC memory to enable hipIpcGetMemHandle() and hipIpcOpenMemHandle() in PAL path. Set interprocess flag for device allocations in HIP PAL. 2.Fix PAL IPC path with ResourceCache and SubAllocation 3.Minor fixes for IpcBuffer constructor and IpcAttach 4.Remove redundant checks that may go wrong 
Change-Id: Ie9d99847c7c2c7b3b2aaefaaf60d23bf71b68635


[ROCm/clr commit: 8434feed16]
 2023-07-12 17:49:32 -04:00
German c8e65415ea SWDEV-311270 - Clean-up IPC path in ROCclr 
- Make IPC interfaces generic between devices and rely on the IPC buffer
for attach/detach logic

Change-Id: Id3c18d122030329b7ee532bbb6317de9dd6a0bbe


[ROCm/clr commit: 9aa6f25f1c]
 2023-06-20 15:18:21 -04:00
Jaydeep Patel d6086f9d69 SWDEV-403766 - Release mem obj while device reset. 
Change-Id: I8a93061c9c4ed692bf7ba1b872af370f79a13a5d


[ROCm/clr commit: ec75a3e60e]
 2023-06-15 09:52:50 -04:00
kjayapra-amd 23584feba4 SWDEV-393910 - Port gfx94x changes to mainline. 
Change-Id: Ibf727223bbe5230b132b47c39e0fc1d87cbd3b9c


[ROCm/clr commit: f14e8a2dba]
 2023-05-05 15:16:23 -04:00
Rahul Garg 67536316e7 SWDEV-389676 - Update stack size limit 
Change-Id: Id0cf66820e76e1bbd7f6c17ceb110782cdb5f978


[ROCm/clr commit: 7b419f42eb]
 2023-04-05 07:50:06 +00:00
Maneesh Gupta d7fdd9fcb8 SWDEV-368235 - Revert "Remove obsolete env variables" 
This reverts commit dfa7790030.

Reason for revert: Deferred to a future release.

Change-Id: Ia66c37f0ab9734dee73c930d10d7469d5fd57254


[ROCm/clr commit: 5dc104b3ea]
 2023-02-15 07:25:00 +00:00
German dfa7790030 SWDEV-368235 - Remove obsolete env variables 
Change-Id: I7e14d53297e79e2f68b3a6cc40251ad7db9eb5ab


[ROCm/clr commit: 7b50c935f8]
 2023-02-03 13:44:24 -05:00
kjayapra-amd b4ffe0e810 SWDEV-378006 - Adding a new guarantee macro to support printing args. 
Change-Id: I9c838644e31a84d96a44b2bd10525a08d805a047


[ROCm/clr commit: b968394b4e]
 2023-01-21 06:26:50 -05:00
German Andryeyev 8ad3120e25 SWDEV-355281 - Add offset calculation 
Calculate memory location offset for requested memory

Change-Id: I7919523df1790d9eaad5827ee5bd98e4263a7554


[ROCm/clr commit: 5d83345c20]
 2023-01-16 14:19:40 -05:00
Anusha GodavarthySurya 379781ea65 SWDEV-364576 - initialize device malloc heap state using blit kernel 
Change-Id: I5d0172aff7d2c04b322a4d828b8a2b438158b80f


[ROCm/clr commit: 274f2de391]
 2023-01-07 06:53:53 +00:00
German e7d9a3f450 SWDEV-368308 - Remove HW debug extension 
Change-Id: If0c68023c09f0dac9111d52ecc0ad63719aa4e70


[ROCm/clr commit: e5a36ab1ad]
 2022-11-18 10:29:44 -05:00
Saleel Kudchadker 41d911d637 SWDEV-356482 - Improve logging 
Change-Id: I0c6286fcdb9d94398ed66262e95e8837898ff9fe


[ROCm/clr commit: eef2f99513]
 2022-10-06 11:13:24 -04:00
Yifan Zhang 87847a38ba SWDEV-354850 - Enable gfx1103 on ROCm backend. 
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Change-Id: Ia420444fd0cb703fcdca1ed7e3d2e262ffd7f4db


[ROCm/clr commit: d6c35273e3]
 2022-09-01 18:58:00 +08:00
Sarbojit Sarkar e6f0d30295 SWDEV-343921 - Updating default stack size for OpenCl tasks 
Change-Id: I37cdd8808dddaa7ac0544b76d18de64b27e443bd


[ROCm/clr commit: c72a396c1f]
 2022-08-26 04:57:00 -04:00
jie1zhan e668b22b11 SWDEV-352127 - Fix clinfo issue, add new asic id 
Change-Id: Idc6ff6fe647878f32f8dbb0613cbb879ea21ecdf


[ROCm/clr commit: 2aa7e5819f]
 2022-08-25 08:23:21 +08:00
Satyanvesh Dittakavi af659de4c1 SWDEV-336448 - Support loading comgr versioned dll 
Change-Id: I03283fc2a200d778c5efa43e509624bba9ce0541


[ROCm/clr commit: 64c1c4757f]
 2022-08-19 00:38:19 -04:00
Alex Xie 3a32ec1232 SWDEV-351337 - Add new asic id 
Change-Id: Ie07f7a6b9a4bb797124e6644c91fb62ba014cf6b


[ROCm/clr commit: aafa057c9a]
 2022-08-12 13:14:06 -04:00
Sarbojit Sarkar a0981a092b SWDEV-343921 - added Max stack size 
Change-Id: I5c1a088e05215ca951afc9d92f8d298c5e3a65f1


[ROCm/clr commit: 27a08a132f]
 2022-08-02 07:13:18 -04:00
sdashmiz 3389e6077a SWDEV-334233 - add support for p2p in windows 
Signed-off-by: sdashmiz <shadi.dashmiz@amd.com>
Change-Id: I9109120b5444c400e65cfff869cb36e876ffd1fc


[ROCm/clr commit: e176e27bf7]
 2022-07-14 15:07:33 -04:00
kjayapra-amd dafc544279 SWDEV-344950 - Enable gfx1100 and gfx1102 on ROCm backend. 
Change-Id: Ic559a804e6d504b73a7cea4aba086790956ee018


[ROCm/clr commit: e2b49690f2]
 2022-07-05 20:25:42 -07:00
Christophe Paquot dc2aab85b2 SWDEV-322620 - Virtual Memory Management 
Introducing a VirtualMemObj map as it is needed to differentiate
between virtual address ranges and actual physical memory
This is because a whole VA range can have several physical memories
as chunks.

Change-Id: Ie2a972b4faf3f7d552cfa53e77898f80ad75740a


[ROCm/clr commit: 905088e4e7]
 2022-06-06 11:32:22 -07:00