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Gráfico de cometimentos

758 Cometimentos

Autor(a) SHA1 Mensagem Data
David Yat Sin 11541cc283 Add env var to override SRAM ECC
Add HSA_ENABLE_SRAMECC environment variable that can be used to
override SRAM ECC mode reported by KFD

Change-Id: I2b95511820a2d3d146a76b03070659c0695b61fd


[ROCm/ROCR-Runtime commit: a180c9ee78]
2023-04-27 16:16:05 -04:00
David Yat Sin 101755c207 Add query for number of XCCs per agent
Change-Id: I4b694b4904ba0326c998356388a62c19a972a7ff


[ROCm/ROCR-Runtime commit: f024d21e3d]
2023-04-27 16:15:59 -04:00
Mike Li 15114271be Return failure with any IMAGE attribute for gfx940
The gfx940 does not support IMAGE instructions. Any get_info with
IMAGE attributes should return failure.

Signed-off-by: Mike Li <Tianxinmike.Li@amd.com>
Change-Id: I12005628f92780f551ab6f8b41526c66b54c6a59


[ROCm/ROCR-Runtime commit: 46b667e530]
2023-04-27 16:15:51 -04:00
Mike Li dae51188d8 Scratch memory changes to support multi-xcc
Change-Id: I115ba4cfe250c59cb7421217cfe0fad6302f25b3


[ROCm/ROCR-Runtime commit: 9554e95de0]
2023-04-27 16:15:30 -04:00
Laurent Morichetti 3603303bc7 Update the trap handler for gfx940
gfx940 uses ttmp11 to hold the queue packet index so the first level
trap handler uses ttmp13 instead to save ib_sts.

Repurpose ttmp11[31] to mean that the ttmps are initialized. The issue
was that the debugger could not tell whether ttmp6 was written by the
trap handler when determining the stop reason.

If ttmp11[31]=0, then the trap handler has not been executed and ttmp6
should be assumed to be 0.  If ttmp11[31]=1, then ttmp6 holds the
trap_id, if an s_trap instruction caused the exception.

Signed-off-by: Laurent Morichetti <laurent.morichetti@amd.com>
Signed-off-by: Lancelot Six <lancelot.six@amd.com>

Change-Id: I9af903abae044b9ec530306229caf3b883f3ee46


[ROCm/ROCR-Runtime commit: f31b312611]
2023-04-27 16:15:14 -04:00
Mike Li 547d2aa3c8 Add gfx940 to AmdHsaCode
Signed-off-by: Mike Li <Tianxinmike.Li@amd.com>
Change-Id: Ib4f7c801c3d3bac9a04c880c5bf86b72bfa3404f


[ROCm/ROCR-Runtime commit: de4d1ce424]
2023-04-27 16:09:26 -04:00
Mike Li fe9b01e916 Added gfx940 ISA
Signed-off-by: Mike Li <Tianxinmike.Li@amd.com>
Change-Id: Icb1830fe186abc69fe7ee709b7f12b882cab9e87


[ROCm/ROCR-Runtime commit: bd98a1e5bf]
2023-04-27 16:08:58 -04:00
Alex Sierra bd8c4079da use mkstemp instead tempnam for temp file
tempnam has been marked as obsolete.

Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Change-Id: Ie64d9a351bf386da00a96ceff059f685e11f2cca


[ROCm/ROCR-Runtime commit: e82025bffa]
2023-04-17 15:38:59 -04:00
Lancelot SIX 5313f40ae2 linux os_thread: improve error handling
On Linux, the os_thread abstraction is built on top of pthread.  Many of
the pthread calls might fail and return error codes.  The error
conditions are only checked via assertions (if ever checked) which means
that when doing a release build, no error condition is checked.  The
same goes for dlsym/dlinfo and clock_gettime.

This commit improves the situation this by checking the error conditions
and acting accordingly.  When the error condition is detected in a
function with a mean to indicate some error to its caller, then this
patch prints some error message and returns.  If there is no way to
propagate the error up the call stack, print some error message and
abort the process.

For the os_info::os_info ctor, the only user is CreateThread, which
checks that the built thread is Valid().  If not, nullptr is returned to
the caller.

It could be possible to use exceptions when functions cannot pass
errors, but for now I only use abort as it is what abort would do with
debug build.

Change-Id: I815703c3b95777cc29bb89a7d654ac879c14a759


[ROCm/ROCR-Runtime commit: 183f5d90aa]
2023-04-17 09:48:11 -04:00
Lancelot SIX 68167b62ba Runtime::GetSystemInfo: Supress parentheses warning
When building with g++-11.3.0, I have the following warning:

    /home/.../core/runtime/runtime.cpp: In member function ‘hsa_status_t rocr::core::Runtime::GetSystemInfo(hsa_system_info_t, void*)’:
    /home/.../core/runtime/runtime.cpp:693:56: warning: suggest parentheses around ‘&&’ within ‘||’ [-Wparentheses]
      693 |           kfd_version.KernelInterfaceMajorVersion == 1 &&
          |           ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~
      694 |               kfd_version.KernelInterfaceMinorVersion >= 12)
          |               ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

This patch adds the parenthesis as suggested.  This silences the
compiler warning.

No functional change expected.

Change-Id: I69c1a73a432b0f2393dbaf36d4424cf0056c535f


[ROCm/ROCR-Runtime commit: 72219b8237]
2023-04-17 09:43:02 -04:00
David Yat Sin 6812573d06 Change error reported when receiving code 128
We used to report HSA_STATUS_ERROR_INVALID_ISA when receiving error code
128, but there are several other reasons why we could be exceeding
number of VGPRs, so updating the error code.

Change-Id: I6a6980d5b07b09c93d00dee5207a0d52399bc77e


[ROCm/ROCR-Runtime commit: f43a284b8e]
2023-04-14 09:12:07 -04:00
David Yat Sin 6c4528ba33 Fix assertion when _GLIBCXX_ASSERTIONS is enabled
One some platforms, e.g Arch Linux, -D_GLIBCXX_ASSERTIONS compile flag
is enabled by default, causing a runtime assertion.
Avoid assertion by using std::vector accessor function data().

Change-Id: I118cdf102c3e353f32c618823e363ee1059f3453


[ROCm/ROCR-Runtime commit: 511855d344]
2023-04-11 11:40:10 +00:00
David Yat Sin f84f83702c Fix for overwriting pointer info size
Fix for overwriting pointer info size provided by caller of
hsa_amd_pointer_info.

Change-Id: I2e5d73ab9ba1a32bc9b4d112bc29b4a99fd8b3b5


[ROCm/ROCR-Runtime commit: c5bf7eb112]
2023-04-06 16:35:37 -04:00
David Yat Sin d476ff16eb Adding scratch memory reservation
Some applications will keep trying to allocate device memory until the
allocation fails. This causes all device memory to be used up and we are
then unable to allocate scratch memory for dispatches. Reserve enough
memory for 1 small scratch allocation.

Change-Id: I968400d41540ba1aca8f28581f229693eec02225


[ROCm/ROCR-Runtime commit: 8ebf5f9c48]
2023-04-06 15:13:36 +00:00
Konstantin Zhuravlyov 536f0aa118 Loader: Skip vdso.so code objects in GetUriFromMemoryInExecutableFile
Change-Id: Ie2cac880c406ed90d6fa614707fa8df7b87458da


[ROCm/ROCR-Runtime commit: a5932ef5ef]
2023-03-17 09:57:15 -04:00
Lang Yu 44b940e033 Switch to completion signal wait for amd_aql_pm4_ib processing
Wait on completion signal for amd_aql_pm4_ib processing
on ASICs with gfx version >= 9.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Change-Id: Ia704d9cc5b2535dcf8564a30f694262b113f77a2


[ROCm/ROCR-Runtime commit: aec7200cb2]
2023-03-16 20:23:53 -04:00
Jonathan Kim ad1a3fc9c4 Fix Invalid Engine Offset Check
Engine offset that is the maximum number of engines is still valid
as offset enum 0 is occupied by blit copies so raise the limit by 1.

Change-Id: I6fcab106290e6647702efe297a4281861da4e0b8


[ROCm/ROCR-Runtime commit: fc8f3f9fd5]
2023-03-16 09:50:10 -04:00
Shweta Khatri 2bb7d9cfe8 By default, disable mwaitx feature.
This can be enabled by setting HSA_ENABLE_MWAITX=1

Change-Id: I4be00892780beeb8b14c3c5f34aa10b158921bff


[ROCm/ROCR-Runtime commit: 83a307c449]
2023-03-15 19:57:25 -04:00
Ranjith Ramakrishnan 1851235878 ASAN packaging for hsa
Package ASAN libraries and license file
Suffix "asan" added to package name

Change-Id: I2af416d86a9068a41e3880836a21c9005e45271b


[ROCm/ROCR-Runtime commit: dd9b7b3b3a]
2023-03-13 23:32:30 -07:00
Ranjith Ramakrishnan 0ba8268db3 Compile time flag to switch between #warning and #error message
Using backward compatibility paths will provide an #error message. Compile time option added to enable/disable the #error message.
Disabling the same will provide a #warning message

Change-Id: Ib48e361b72176e2845c8f74f980f0234e7eb4a7d


[ROCm/ROCR-Runtime commit: 629ddde072]
2023-03-10 08:39:54 -08:00
Konstantin Zhuravlyov c05cf2ea0f ISA/NFC: Change tabs to spaces
Change-Id: Iabc541ec78607881a2828cd79916a928b39dcfcb


[ROCm/ROCR-Runtime commit: 7e403f08a6]
2023-03-08 19:39:15 -05:00
Konstantin Zhuravlyov d861267d20 Loader/NFC: Factor out mach information into the struct
Change-Id: I9304c96336c434570bd5da92cd197ee764945907


[ROCm/ROCR-Runtime commit: 8043fe9ee0]
2023-03-07 14:41:03 -05:00
Sean Keely deee152909 Add support for exporting portable handles to GPU allocations.
Adds hsa_amd_portable_export_dmabuf and hsa_amd_portable_close_dmabuf
which allow obtaining dmabuf handles to rocr allocations.  These handles
may be shared with other APIs to support cross vendor & cross device
memory sharing.
Adds query to return whether dmabuf export is supported

Signed-off-by: Jonathan Kim <Jonathan.Kim@amd.com>
Signed-off-by: David Yat Sin <David.YatSin@amd.com>

Change-Id: I7f98501087d9563d07fc2cb428cc886b1e518b1e


[ROCm/ROCR-Runtime commit: 42243c1e8f]
2023-03-06 12:39:01 -05:00
Jonathan Kim 57064af98d Fix Engine Offsetting for Copy on Engine
Forgot SDMA blit engine indices are offset by DevToDev 0-position in
a couple of places.

Change-Id: Ie811d8281bc812738ed0107694f3dffde5e93685


[ROCm/ROCR-Runtime commit: 7364a93b98]
2023-03-03 20:45:35 -05:00
David Yat Sin 908a2b1eba Revert "Add flag for external memory allocations"
This reverts commit 000f4c0547.

Change-Id: I32a92672553c4c38ffae53a085f83c0403c160ae


[ROCm/ROCR-Runtime commit: 7ed6d73b6d]
2023-02-23 11:31:15 -05:00
David Yat Sin a2e4ba149c Revert "Enforce uncached memory on AllocatePCIeRW request"
This reverts commit 36da397f96.

Change-Id: I5a7fe9e99685f589f95dd89eacf04d44e5587f2f


[ROCm/ROCR-Runtime commit: 37b5b421b3]
2023-02-22 21:55:48 -05:00
David Yat Sin d022746cb7 Use mwaitx when busy-waiting signals
Use mwaitx instructions when busy waiting for signals to reduce CPU
energy usage.
This can be disabled by setting HSA_ENABLE_MWAITX=0

Change-Id: Ic207895a491b2bf6dacba47ef0921df3faad5b5a


[ROCm/ROCR-Runtime commit: cc48dfdbff]
2023-02-22 16:55:43 +00:00
David Yat Sin 72e7fe7aec Add function for parse CPUID information
Used to detect whether mwaitx instruction is supported

Change-Id: I66fe906325aa523c8815133cf782df3a17a7edab


[ROCm/ROCR-Runtime commit: 0ed1568afc]
2023-02-22 16:55:42 +00:00
Ranjith Ramakrishnan 1ff8eae7be File reorg backward compatibility message changed to #error
Change-Id: I699dee834865ee573a516d58b8b8faa1da4f288a


[ROCm/ROCR-Runtime commit: 3636d487c9]
2023-02-14 21:46:43 -08:00
Jonathan Kim ff620e9fdc Add interface to DMA copy directly to a target engine.
Change-Id: Ic87cfeabb11c1a465f98f3f444d39955f5300525


[ROCm/ROCR-Runtime commit: 30920fc94d]
2023-02-13 13:50:49 -05:00
Jonathan Kim f161963c09 Make SDMA engine availability status queryable.
Report the availability of SDMA engines for memory copies.

Change-Id: Ie31b02d6b65355122bb8c98bc73700a59bee166e


[ROCm/ROCR-Runtime commit: 8f27f495c6]
2023-02-13 13:50:49 -05:00
Jonathan Kim 9021f5970d Make the number of per agent SDMA engines queryable.
Change-Id: Iae1cc9b7ec783fdda05f9384f0ad0327ea1a8cc3


[ROCm/ROCR-Runtime commit: 4f283d9bb3]
2023-02-13 13:50:49 -05:00
Cordell Bloor 921ccf5f60 Fix static initialization order
Change-Id: I1d51e150b526d050b988fe5a422644667a561cd7


[ROCm/ROCR-Runtime commit: 5873a78d58]
2023-02-09 13:51:08 -05:00
David Yat Sin 000f4c0547 Add flag for external memory allocations
ROCr internally uses the same allocation_map_ list to track memory
allocations that are both for internal allocations and allocations by
users of ROCr library. In some edge cases, the library user would call
hsa_amd_pointer_info on an invalid pointer, but ROCR would return the
pointer as valid because this pointer belongs to a memory range that
was allocated internally within ROCr. Adding a flag to differentiate
between internal and external allocations.

Change-Id: I98c52bd85f3985d1ba1b0e3101d2254b003412cf


[ROCm/ROCR-Runtime commit: 59685f4492]
2023-02-09 13:21:43 -05:00
Sean Keely c6d7c62307 Track size of pending operations in blits.
Track and report the size, in bytes, of pending unexecuted blit
commands.  To be used in copy ganging.

Change-Id: Ia7453ff88571e927df771c6c819b73c17e67708e


[ROCm/ROCR-Runtime commit: 27596aef0c]
2023-02-06 12:38:40 -05:00
Konstantin Zhuravlyov e51d58a646 Compile image blit kernels with code object v4
Change-Id: I4b1923fe8f22dda1277409794d0856419228eceb


[ROCm/ROCR-Runtime commit: f115a3505c]
2023-02-02 17:33:15 -05:00
Shweta Khatri 4f670d6df7 Fixes hang due to change in order of initialization of libraries
Fixes hang due to change in order of initialization of libraries
that have cyclical dependencies and they call hsa_init() during their
initialization phase.
This implementation looks for a symbol called "HSA_AMD_TOOL_PRIORITY"
across all loaded shared libraries using dynamic section entries of the
loaded lib instead of using dlopen and dlsym for the same purpose.

Change-Id: I4865f2fd18dd186ec311a432ec38fbb5583805d2


[ROCm/ROCR-Runtime commit: 8aac885318]
2023-01-26 01:17:22 -05:00
David Yat Sin 8a86cddd3a Add query for IOMMU support
Reporting whether IOMMU V2 is supported.
IOMMU V1 support is not relevant to user, so not reporting it.

Change-Id: I77389484a87a352da9c2f7b2a5d9de264f90ee53


[ROCm/ROCR-Runtime commit: e30be76f37]
2023-01-19 11:33:21 -05:00
David Yat Sin 580ce4fd25 Add memory pool query to return location
Change-Id: I240b77119d7b8ccfc5ff6a3190d6669d69f243e8


[ROCm/ROCR-Runtime commit: 722794e258]
2023-01-19 08:45:05 -05:00
David Yat Sin 523bdde26f Add env variable to print image SRD contents
Add environment variable HSA_IMAGE_PRINT_SRD to print contents of SRD
registers for image functions

Change-Id: Ifb47a73dcfad8745ee7445e20de96e1021b80bd6


[ROCm/ROCR-Runtime commit: a4f898ad15]
2023-01-13 11:01:04 -05:00
Alexander Turek e907b85904 isa: Add fix for hsa_isa_iterate_wavefronts always returns 64
Currently, Wavefront::GetInfo(HSA_WAVEFRONT_INFO_SIZE.. always returns
64. Instead, return the proper wavefront size based on the ISA.

Temporarily, we only return 1 wavefront size for each ISA. As we do not
have mechanism from upper layers to determine correct wavefront when
there are multiple wavefronts supported. We are temporarily
returning 32 for all gfx1xxx cards even though they support 64 as the
kernels for gfx1xxx are compiled for wavefront-32 by default.

Change-Id: Ic6c2917b7e6d3704daf742d243f5ec7f49430de9


[ROCm/ROCR-Runtime commit: f7e3782b42]
2023-01-12 08:40:07 -05:00
Shweta Khatri 36da397f96 Enforce uncached memory on AllocatePCIeRW request
Change-Id: Ib5a624ab979220d50205448ef37b4550672fb97d


[ROCm/ROCR-Runtime commit: ed0a1be2c3]
2023-01-11 16:52:15 -05:00
Ranjith Ramakrishnan 829d6536f8 Revert "Remove RPATH/RUNPATH from ROCm libraries"
This reverts commit 993b1dee7e.

Reason for revert:  is blocked due to new proposal. so reverting the changes 

Change-Id: Id9b8cc1560ba3eea6e484e67df3fdc647da9f37d


[ROCm/ROCR-Runtime commit: dbf8905dd1]
2023-01-10 13:52:02 -05:00
Shweta Khatri 811c411e78 Fixed GFX11 Texture, Buffer and Sampler Resource Descriptor definitions
Change-Id: I101806f9f91ec2ad78339dabc98375bd09946dd0


[ROCm/ROCR-Runtime commit: e72329ab76]
2023-01-05 15:40:47 -05:00
Ranjith Ramakrishnan 2d2992ea65 Corrected libelf package name in depends list
libelf1 package contains libelf.so.1. Updated the package name
Improvement: Removed the initialization of cmake_install_libdir in  source code
Build scripts is initializing  the variable to "lib" and passed as build argument

Change-Id: I16a8cdc4c231487410c1114b818e9d01df4854de


[ROCm/ROCR-Runtime commit: 5c90c762f9]
2022-12-15 23:30:22 -08:00
David Yat Sin 93c4ffe473 Add Stream Performance Monitor(SPM) APIs
Change-Id: I0d48782887814ef245b7e0182e2d5570aa8c3f50


[ROCm/ROCR-Runtime commit: 6bfe57aeb2]
2022-12-08 13:56:29 -05:00
David Yat Sin 652a617846 Add agent info for fw and sdma ucode
Add two new agent info fields:
HSA_AMD_AGENT_INFO_UCODE_VERSION
HSA_AMD_AGENT_INFO_SDMA_UCODE_VERSION

Change-Id: I51cb853724b23a26e945e5c1ac32c16d0cb3bc31


[ROCm/ROCR-Runtime commit: ecdebef0b9]
2022-12-07 19:07:31 -05:00
raghavmedicherla 2b666f57fa [hsa-runtime] Modify elfsection checks in amd_elf_image class
Modified If condition checks in GElfImage::pullElf() of amd_elf_image.cpp to
 check using section types instead of a string check.

Change-Id: I1ab92f0a9118fb2382652a1cc900a3150cbee2da


[ROCm/ROCR-Runtime commit: 5727a10a1b]
2022-12-05 14:42:02 -05:00
David Yat Sin 736e5ae731 Check for debug support after parsing topology
Thunk keeps an internal cache of system topology that can be used to
speed up subsequent calls to hsaKmtAcquireSystemProperties(). This cache
is cleared by calling hsaKmtReleaseSystemProperties() at the beginning
of BuildTopology().
hsaKmtRuntimeEnable() also calls hsaKmtAcquireSystemProperties() inside
Thunk. Move call to hsaKmtRuntimeEnable() after BuildTopology() so that
we can re-use Thunks internal cache.
Parsing of of topology can take ~150 ms on systems for large number of
nodes.

Change-Id: I741709d49d67d244f5fbd707fe8f01ab923bb153


[ROCm/ROCR-Runtime commit: e39ad34d9c]
2022-12-02 11:26:00 -05:00
Shweta Khatri c236e10be6 Fixed callback method for dl_iterate_phdr api which is called for each loaded shared object
Simplified the callback method. Also fixed the way, loaded shared object were getting appended into a string vector,
which was not being passed to this callback method.

Change-Id: I68661dd73f61a11c42fa92f670e8e7b6ffcb5711


[ROCm/ROCR-Runtime commit: 8751e65b79]
2022-11-21 19:00:34 -05:00