Device cgroup can limit accessible devices. Handle the cases where
p2p_links are not accessible
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: I513dc75ad14e4f2d426cf2fbd301bcba12b4ee54
[ROCm/ROCR-Runtime commit: e28b3fe8b3]
blacklist some svm related test cases until they are solved.
Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Change-Id: I05e2d965d89bcbf3d43bed2873297e98ad0738ef
[ROCm/ROCR-Runtime commit: 9e0fc7f3c6]
It needs to skip LocalMemoryTest because it doesn't support local memory
with no dgpu path.
Change-Id: Iedb6f6deba55e239b21747d933cf2d7005623106
Signed-off-by: changzhu <Changfeng.Zhu@amd.com>
[ROCm/ROCR-Runtime commit: 55cb03dbae]
The updated sp3 compiler does not support GFX10 temperaly.
Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Change-Id: Idd9336663814b7925d9742eee0bd310d00945d3e
[ROCm/ROCR-Runtime commit: b8ef20e35c]
Fixes assembler error. The SP3 backend if already set to FamilyId.
Change-Id: I7721a555b05688b16993a03242a765694594825a
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
[ROCm/ROCR-Runtime commit: 86a68b2774]
Increasing the timeout will avoid some test failures. This shouldn't
mask any issues as any incomplete shaders should still hang and would
just time out at 180 sec instead of 120 sec.
Signed-off-by: Kent Russell <kent.russell@amd.com>
Change-Id: If4e893ab80d9d159bd0b8b112aa7574abc5e4f44
[ROCm/ROCR-Runtime commit: 9168dfe041]
Old memory properties info name used after removing branches.
This caused the CPU coarse grain pool to initialize with random
bits.
Change-Id: I397bc5ecf09fab69bdf1d7fafadcf54d71b64070
[ROCm/ROCR-Runtime commit: 0439dc90cd]
Prevents poorly written tools which throw in tools interface
callbacks from causing ROCr to catch and return a generic error
code.
Change-Id: I2f5bf7104dc7d4ee688eb48423c7ffdb06bd7702
[ROCm/ROCR-Runtime commit: c9ce27a640]
amdgpu_cs_submit can fail intermittently if another process has too much
memory reserved at the time. Allow a small percental of command
submissions to fail to make the test more robust.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: If9f62b2b6f67be71420016d4e38d4dd6b6bca9a5
[ROCm/ROCR-Runtime commit: 8baf02e80b]
Delayed page faults from a terminated process can be attributed to the
next process with the same PASID. Work around that by adding a delay
after the Exception tests to allow the kernel to clean up any fault
storms before the next test.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: Id310c13ea9eb92b04d37b95d91a0dd60bd9954e5
[ROCm/ROCR-Runtime commit: bd68646772]
If the signal arrives too late, it interrupts waitpid. Handle this
situation gracefully.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: If4925c352c81ba7fef8a940460b91f5e720b451e
[ROCm/ROCR-Runtime commit: 25288e07dc]
It is gfx90a VF device ID, for virtualization support.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: I9e51d6b58c702d185e6758a9c511e9b8bc72c2f5
[ROCm/ROCR-Runtime commit: d8d8e3ddd6]
After unregistered memory is added, now default access attribute
is returned based on xnack configuration.
Change-Id: I8ef44fe1e165ba009622e8112436c1f7a683f6cb
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
[ROCm/ROCR-Runtime commit: 0a2d7d8319]
It is to address gfx90a HW memory model changes.
Signed-off-by: Eric Huang <jinhuieric.huang@amd.com>
Change-Id: Ie5c5c5ee5ddfb75c0b4f625baf59ce37b4cc7c31
[ROCm/ROCR-Runtime commit: a6703395f6]
KFDSVMEvictTest.QueueTest shader asm code need update to support gfx10
and gfx9, skip the test to unblock CI test.
Change-Id: Id2842127cf5fc98a652afa82035a4b3603bf5c33
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
[ROCm/ROCR-Runtime commit: 7d53e94750]
Old logic did not consider memory held in the scratch cache to be
free when deciding whether or not to reclaim.
Change-Id: I7f7c7549c72d743edbf7c53489fe9a453dc4177a
[ROCm/ROCR-Runtime commit: 0b7d9db964]
Fixes assembler error. The SP3 backend if already set to FamilyId
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Change-Id: If127a71693b293e2748b06efb668a359b939cd14
[ROCm/ROCR-Runtime commit: e06d549337]
gfx10 GPUs such as gfx1030 need new assembly code to test
the GWS. Removed scalar stores and added proper usage of DLC and
VSCNT waits. Removed gfx9-specific assembler meta-values.
Change-Id: I2bbdb77692ace2dba10997f721ba9decaa9be82a
[ROCm/ROCR-Runtime commit: c1c46d9c97]
Clarify behavior of hsa_ven_amd_loader_iterate_executables during
concurrent calls of executable creation and destruction.
Change-Id: Idc3e3981d4fcc0d58d9f1b7a7578deed20aa490b
[ROCm/ROCR-Runtime commit: 1bdc2f6854]
Add the hard limit of allocation size to be 1/2 available vram
to avoid allocation failure when allocation size equals to vram size.
Add printing block size in each round to report progress for long running
test
Add the block size skip info in result form(if any tests skipped).
Affected test:
rocrtstPerf.Memory_Async_Copy
Data Size Avg Time(us) Avg BW(GB/s) MinTime(us) Peak BW(GB/s)
128M 638759.570200 0.195692 637569.991000 0.196057
256M 1270058.822400 0.196841 1268425.758000 0.197095
Notice: Data Size larger than 512M is skipped due to hard limit of 1/2 vram size
Signed-off-by: Mengbing Wang <mengbing.wang@amd.com>
Change-Id: I4c4cea74a608272cc29d222b9399af26b34d7473
[ROCm/ROCR-Runtime commit: cf10c3bc35]
KFD changes are ready, all SVM tests should pass now. Skip SVM tests if
the SVM API is not supported.
Change-Id: I5e358565a0458eea45eae0aaf4969ce3a36574a7
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Sierra <Alex.Sierra@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
[ROCm/ROCR-Runtime commit: e8990cf830]
New properties SVMAPISupported added in Thunk spec HSA_CAPABILITY, read
from sysfs from KFD topology.
New local memory property flag CoherentHostAccess added to Thunk
HSA_MEMORYPROPERTY, read from sysfs from KFD topology.
Change-Id: I83933f0e5a61508508168873209dba4af0b77295
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
[ROCm/ROCR-Runtime commit: e8f369b385]
XNACK API for GPUs that support this mode. This API
makes calls to amdgpu driver to configure xnack mode.
It supports set xnack mode and query the current mode used.
Change-Id: If865fd0e3f900f008243dc49504e1a0694e1791a
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
[ROCm/ROCR-Runtime commit: bb441d0bdd]
Add function definitions to support SVM (shared virtual memory)
and xnack set.
Change-Id: Ia97ad9d0c449d8d500d799f702e1a58e87d65a56
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
[ROCm/ROCR-Runtime commit: c44a4be776]
Add svm (shared virtual memory) range and xnack mode
APIs.
Change-Id: Ibd8d7fe566dc200730da0c892caa71aad7589ebd
Signed-off-by: Philip Yang <Philip.Yang@amd.com>
Signed-off-by: Alex Sierra <alex.sierra@amd.com>
[ROCm/ROCR-Runtime commit: ce26348f3a]
Query the KFD interface version once and store it in a global variable.
This makes it more efficient for KFD APIs to query the API version
later.
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Change-Id: I267f3465f754e78fb21a7c42c5877cd68eaa9d05
[ROCm/ROCR-Runtime commit: 43ce63b68b]
This can be overwritten by changing BUILD_SHARED_LIBS=true, but we
default it to static to allow for merging into ROCr
Change-Id: Ic286ef7903a5bc788fe3b84bb13b15bdd3a6f60b
[ROCm/ROCR-Runtime commit: d748d6dce7]
These are failing as well, due to the SP3 shader merge. Blacklist them
as well to avoid more segfaults
Signed-off-by: Kent Russell <kent.russell@amd.com>
Change-Id: I07e142a1aad9b2a5304230f333eeaf4392bea4b7
[ROCm/ROCR-Runtime commit: 66da1c9cd2]
Includes some workarounds and HMM.
Conflicts:
opensrc/hsa-runtime/core/runtime/amd_topology.cpp
opensrc/hsa-runtime/core/util/flag.h
Change-Id: I22976f07964a43dbb228a6231777dbd599112b8d
[ROCm/ROCR-Runtime commit: 7333c77e22]